📄 stm32f10x_it.txt
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; generated by ARM/Thumb C/C++ Compiler with , RVCT3.1 [Build 919] for uVision
; commandline ArmCC [--debug -c --asm --interleave -o..\obj\stm32f10x_it.o --depend=..\obj\stm32f10x_it.d --device=DARMSTM --apcs=interwork -O0 -I..\..\LAB5 -I..\..\library\inc -IC:\Keil\ARM\INC\ST\STM32F10x -DVECT_TAB_RAM --omf_browse=..\obj\stm32f10x_it.crf stm32f10x_it.c]
THUMB
AREA ||.text||, CODE, READONLY, ALIGN=2
NMIException PROC
;;;45 {
;;;46 }
000000 4770 BX lr
;;;47
ENDP
HardFaultException PROC
;;;56 {
;;;57 }
000002 4770 BX lr
;;;58
ENDP
MemManageException PROC
;;;67 {
;;;68 }
000004 4770 BX lr
;;;69
ENDP
BusFaultException PROC
;;;78 {
;;;79 }
000006 4770 BX lr
;;;80
ENDP
UsageFaultException PROC
;;;89 {
;;;90 }
000008 4770 BX lr
;;;91
ENDP
DebugMonitor PROC
;;;100 {
;;;101 }
00000a 4770 BX lr
;;;102
ENDP
SVCHandler PROC
;;;111 {
;;;112 }
00000c 4770 BX lr
;;;113
ENDP
PendSVC PROC
;;;122 {
;;;123 }
00000e 4770 BX lr
;;;124
ENDP
SysTickHandler PROC
;;;132 void SysTickHandler(void)
;;;133 {
000010 b510 PUSH {r4,lr}
;;;134 if(NVIC_GetIRQChannelActiveBitStatus(EXTI0_IRQChannel) != RESET)
000012 2006 MOVS r0,#6
000014 f7fff7ff BL NVIC_GetIRQChannelActiveBitStatus
000018 b110 CBZ r0,|L1.32|
;;;135 {
;;;136 PreemptionOccured = TRUE;
00001a 2001 MOVS r0,#1
00001c 4932 LDR r1,|L1.232|
00001e 7008 STRB r0,[r1,#0] ; PreemptionOccured
|L1.32|
;;;137 }
;;;138 }
000020 bd10 POP {r4,pc}
;;;139
ENDP
WWDG_IRQHandler PROC
;;;148 {
;;;149 }
000022 4770 BX lr
;;;150
ENDP
PVD_IRQHandler PROC
;;;159 {
;;;160 }
000024 4770 BX lr
;;;161
ENDP
TAMPER_IRQHandler PROC
;;;170 {
;;;171 }
000026 4770 BX lr
;;;172
ENDP
RTC_IRQHandler PROC
;;;181 {
;;;182 }
000028 4770 BX lr
;;;183
ENDP
FLASH_IRQHandler PROC
;;;192 {
;;;193 }
00002a 4770 BX lr
;;;194
ENDP
RCC_IRQHandler PROC
;;;203 {
;;;204 }
00002c 4770 BX lr
;;;205
ENDP
EXTI0_IRQHandler PROC
;;;213 void EXTI0_IRQHandler(void)
;;;214 {
00002e b510 PUSH {r4,lr}
;;;215 /* Generate SysTick exception */
;;;216 NVIC_SetSystemHandlerPendingBit(SystemHandler_SysTick);
000030 482e LDR r0,|L1.236|
000032 f7fff7ff BL NVIC_SetSystemHandlerPendingBit
;;;217
;;;218 /* Clear EXTI Line0 pending bit */
;;;219 EXTI_ClearITPendingBit(EXTI_Line0);
000036 2001 MOVS r0,#1
000038 f7fff7ff BL EXTI_ClearITPendingBit
;;;220 }
00003c bd10 POP {r4,pc}
;;;221
ENDP
EXTI1_IRQHandler PROC
;;;230 {
;;;231 }
00003e 4770 BX lr
;;;232
ENDP
EXTI2_IRQHandler PROC
;;;241 {
;;;242 }
000040 4770 BX lr
;;;243
ENDP
EXTI3_IRQHandler PROC
;;;252 {
;;;253 }
000042 4770 BX lr
;;;254
ENDP
EXTI4_IRQHandler PROC
;;;263 {
;;;264 }
000044 4770 BX lr
;;;265
ENDP
DMAChannel1_IRQHandler PROC
;;;274 {
;;;275 }
000046 4770 BX lr
;;;276
ENDP
DMAChannel2_IRQHandler PROC
;;;285 {
;;;286 }
000048 4770 BX lr
;;;287
ENDP
DMAChannel3_IRQHandler PROC
;;;296 {
;;;297 }
00004a 4770 BX lr
;;;298
ENDP
DMAChannel4_IRQHandler PROC
;;;307 {
;;;308 }
00004c 4770 BX lr
;;;309
ENDP
DMAChannel5_IRQHandler PROC
;;;318 {
;;;319 }
00004e 4770 BX lr
;;;320
ENDP
DMAChannel6_IRQHandler PROC
;;;329 {
;;;330 }
000050 4770 BX lr
;;;331
ENDP
DMAChannel7_IRQHandler PROC
;;;340 {
;;;341 }
000052 4770 BX lr
;;;342
ENDP
ADC_IRQHandler PROC
;;;351 {
;;;352 }
000054 4770 BX lr
;;;353
ENDP
USB_HP_CAN_TX_IRQHandler PROC
;;;363 {
;;;364 }
000056 4770 BX lr
;;;365
ENDP
USB_LP_CAN_RX0_IRQHandler PROC
;;;375 {
;;;376 }
000058 4770 BX lr
;;;377
ENDP
CAN_RX1_IRQHandler PROC
;;;386 {
;;;387 }
00005a 4770 BX lr
;;;388
ENDP
CAN_SCE_IRQHandler PROC
;;;397 {
;;;398 }
00005c 4770 BX lr
;;;399
ENDP
EXTI9_5_IRQHandler PROC
;;;407 void EXTI9_5_IRQHandler(void)
;;;408 {
00005e b508 PUSH {r3,lr}
;;;409 NVIC_InitTypeDef NVIC_InitStructure;
;;;410
;;;411 if(EXTI_GetITStatus(EXTI_Line9) != RESET)
000060 f44ff44f MOV r0,#0x200
000064 f7fff7ff BL EXTI_GetITStatus
000068 b348 CBZ r0,|L1.190|
;;;412 {
;;;413 PreemptionPriorityValue = !PreemptionPriorityValue;
00006a 4821 LDR r0,|L1.240|
00006c 7800 LDRB r0,[r0,#0] ; PreemptionPriorityValue
00006e b908 CBNZ r0,|L1.116|
000070 2001 MOVS r0,#1
000072 e000 B |L1.118|
|L1.116|
000074 2000 MOVS r0,#0
|L1.118|
000076 491e LDR r1,|L1.240|
000078 7008 STRB r0,[r1,#0] ; PreemptionPriorityValue
;;;414 PreemptionOccured = FALSE;
00007a 2000 MOVS r0,#0
00007c 491a LDR r1,|L1.232|
00007e 7008 STRB r0,[r1,#0] ; PreemptionOccured
;;;415
;;;416 /* Enable the EXTI0 Interrupt */
;;;417 NVIC_InitStructure.NVIC_IRQChannel = EXTI0_IRQChannel;
000080 2006 MOVS r0,#6
000082 f88df88d STRB r0,[sp,#0]
;;;418 NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = PreemptionPriorityValue;
000086 481a LDR r0,|L1.240|
000088 7800 LDRB r0,[r0,#0] ; PreemptionPriorityValue
00008a f88df88d STRB r0,[sp,#1]
;;;419 NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
00008e 2000 MOVS r0,#0
000090 f88df88d STRB r0,[sp,#2]
;;;420 NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
000094 2001 MOVS r0,#1
000096 f88df88d STRB r0,[sp,#3]
;;;421 NVIC_Init(&NVIC_InitStructure);
00009a 4668 MOV r0,sp
00009c f7fff7ff BL NVIC_Init
;;;422
;;;423 /* Configure the SysTick Handler Priority: Preemption priority and subpriority */
;;;424 NVIC_SystemHandlerPriorityConfig(SystemHandler_SysTick, !PreemptionPriorityValue, 0);
0000a0 4813 LDR r0,|L1.240|
0000a2 7800 LDRB r0,[r0,#0] ; PreemptionPriorityValue
0000a4 b908 CBNZ r0,|L1.170|
0000a6 2001 MOVS r0,#1
0000a8 e000 B |L1.172|
|L1.170|
0000aa 2000 MOVS r0,#0
|L1.172|
0000ac b2c1 UXTB r1,r0
0000ae 2200 MOVS r2,#0
0000b0 480e LDR r0,|L1.236|
0000b2 f7fff7ff BL NVIC_SystemHandlerPriorityConfig
;;;425
;;;426 EXTI_ClearITPendingBit(EXTI_Line9);
0000b6 f44ff44f MOV r0,#0x200
0000ba f7fff7ff BL EXTI_ClearITPendingBit
|L1.190|
;;;427 }
;;;428 }
0000be bd08 POP {r3,pc}
;;;429
ENDP
TIM1_BRK_IRQHandler PROC
;;;438 {
;;;439 }
0000c0 4770 BX lr
;;;440
ENDP
TIM1_UP_IRQHandler PROC
;;;450 {
;;;451 }
0000c2 4770 BX lr
;;;452
ENDP
TIM1_TRG_COM_IRQHandler PROC
;;;462 {
;;;463 }
0000c4 4770 BX lr
;;;464
ENDP
TIM1_CC_IRQHandler PROC
;;;473 {
;;;474 }
0000c6 4770 BX lr
;;;475
ENDP
TIM2_IRQHandler PROC
;;;484 {
;;;485 }
0000c8 4770 BX lr
;;;486
ENDP
TIM3_IRQHandler PROC
;;;495 {
;;;496 }
0000ca 4770 BX lr
;;;497
ENDP
TIM4_IRQHandler PROC
;;;506 {
;;;507 }
0000cc 4770 BX lr
;;;508
ENDP
I2C1_EV_IRQHandler PROC
;;;517 {
;;;518 }
0000ce 4770 BX lr
;;;519
ENDP
I2C1_ER_IRQHandler PROC
;;;528 {
;;;529 }
0000d0 4770 BX lr
;;;530
ENDP
I2C2_EV_IRQHandler PROC
;;;539 {
;;;540 }
0000d2 4770 BX lr
;;;541
ENDP
I2C2_ER_IRQHandler PROC
;;;550 {
;;;551 }
0000d4 4770 BX lr
;;;552
ENDP
SPI1_IRQHandler PROC
;;;561 {
;;;562 }
0000d6 4770 BX lr
;;;563
ENDP
SPI2_IRQHandler PROC
;;;572 {
;;;573 }
0000d8 4770 BX lr
;;;574
ENDP
USART1_IRQHandler PROC
;;;583 {
;;;584 }
0000da 4770 BX lr
;;;585
ENDP
USART2_IRQHandler PROC
;;;594 {
;;;595 }
0000dc 4770 BX lr
;;;596
ENDP
USART3_IRQHandler PROC
;;;605 {
;;;606 }
0000de 4770 BX lr
;;;607
ENDP
EXTI15_10_IRQHandler PROC
;;;616 {
;;;617 }
0000e0 4770 BX lr
;;;618
ENDP
RTCAlarm_IRQHandler PROC
;;;627 {
;;;628 }
0000e2 4770 BX lr
;;;629
ENDP
USBWakeUp_IRQHandler PROC
;;;638 {
;;;639 }
0000e4 4770 BX lr
;;;640
ENDP
0000e6 0000 DCW 0x0000
|L1.232|
0000e8 00000000 DCD PreemptionOccured
|L1.236|
0000ec 0002c39a DCD 0x0002c39a
|L1.240|
0000f0 00000000 DCD PreemptionPriorityValue
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