stm32f10x_usart.txt

STM32 demo板的例程

;;;575      if (NewState != DISABLE)
00022a  b121              CBZ      r1,|L1.566|
;;;576      {
;;;577        /* Enable the SC mode by setting the SCEN bit in the CR3 register */
;;;578        USARTx->CR3 |= CR3_SCEN_Set;
00022c  8a82              LDRH     r2,[r0,#0x14]
00022e  f042f042          ORR      r2,r2,#0x20
000232  8282              STRH     r2,[r0,#0x14]
000234  e004              B        |L1.576|
                  |L1.566|
;;;579      }
;;;580      else
;;;581      {
;;;582        /* Disable the SC mode by clearing the SCEN bit in the CR3 register */
;;;583        USARTx->CR3 &= CR3_SCEN_Reset;
000236  8a82              LDRH     r2,[r0,#0x14]
000238  f64ff64f          MOV      r3,#0xffdf
00023c  401a              ANDS     r2,r2,r3
00023e  8282              STRH     r2,[r0,#0x14]
                  |L1.576|
;;;584      }
;;;585    }
000240  4770              BX       lr
                          ENDP

                  USART_SmartCardNACKCmd PROC
;;;601       
;;;602      if (NewState != DISABLE)
000242  b121              CBZ      r1,|L1.590|
;;;603      {
;;;604        /* Enable the NACK transmission by setting the NACK bit in the CR3 register */
;;;605        USARTx->CR3 |= CR3_NACK_Set;
000244  8a82              LDRH     r2,[r0,#0x14]
000246  f042f042          ORR      r2,r2,#0x10
00024a  8282              STRH     r2,[r0,#0x14]
00024c  e004              B        |L1.600|
                  |L1.590|
;;;606      }
;;;607      else
;;;608      {
;;;609        /* Disable the NACK transmission by clearing the NACK bit in the CR3 register */
;;;610        USARTx->CR3 &= CR3_NACK_Reset;
00024e  8a82              LDRH     r2,[r0,#0x14]
000250  f64ff64f          MOV      r3,#0xffef
000254  401a              ANDS     r2,r2,r3
000256  8282              STRH     r2,[r0,#0x14]
                  |L1.600|
;;;611      }
;;;612    
;;;613    }
000258  4770              BX       lr
                          ENDP

                  USART_HalfDuplexCmd PROC
;;;629      
;;;630      if (NewState != DISABLE)
00025a  b121              CBZ      r1,|L1.614|
;;;631      {
;;;632        /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
;;;633        USARTx->CR3 |= CR3_HDSEL_Set;
00025c  8a82              LDRH     r2,[r0,#0x14]
00025e  f042f042          ORR      r2,r2,#8
000262  8282              STRH     r2,[r0,#0x14]
000264  e004              B        |L1.624|
                  |L1.614|
;;;634      }
;;;635      else
;;;636      {
;;;637        /* Disable the Half-Duplex mode by clearing the HDSEL bit in the CR3 register */
;;;638        USARTx->CR3 &= CR3_HDSEL_Reset;
000266  8a82              LDRH     r2,[r0,#0x14]
000268  f64ff64f          MOV      r3,#0xfff7
00026c  401a              ANDS     r2,r2,r3
00026e  8282              STRH     r2,[r0,#0x14]
                  |L1.624|
;;;639      }
;;;640    }
000270  4770              BX       lr
                          ENDP

                  USART_IrDAConfig PROC
;;;658        
;;;659      USARTx->CR3 &= CR3_IRLP_Mask;
000272  8a82              LDRH     r2,[r0,#0x14]
000274  f64ff64f          MOV      r3,#0xfffb
000278  401a              ANDS     r2,r2,r3
00027a  8282              STRH     r2,[r0,#0x14]
;;;660      USARTx->CR3 |= USART_IrDAMode;
00027c  8a82              LDRH     r2,[r0,#0x14]
00027e  430a              ORRS     r2,r2,r1
000280  8282              STRH     r2,[r0,#0x14]
;;;661    }
000282  4770              BX       lr
                          ENDP

                  USART_IrDACmd PROC
;;;677        
;;;678      if (NewState != DISABLE)
000284  b121              CBZ      r1,|L1.656|
;;;679      {
;;;680        /* Enable the IrDA mode by setting the IREN bit in the CR3 register */
;;;681        USARTx->CR3 |= CR3_IREN_Set;
000286  8a82              LDRH     r2,[r0,#0x14]
000288  f042f042          ORR      r2,r2,#2
00028c  8282              STRH     r2,[r0,#0x14]
00028e  e004              B        |L1.666|
                  |L1.656|
;;;682      }
;;;683      else
;;;684      {
;;;685        /* Disable the IrDA mode by clearing the IREN bit in the CR3 register */
;;;686        USARTx->CR3 &= CR3_IREN_Reset;
000290  8a82              LDRH     r2,[r0,#0x14]
000292  f64ff64f          MOV      r3,#0xfffd
000296  401a              ANDS     r2,r2,r3
000298  8282              STRH     r2,[r0,#0x14]
                  |L1.666|
;;;687      }
;;;688    }
00029a  4770              BX       lr
                          ENDP

                  USART_GetFlagStatus PROC
;;;710    FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, u16 USART_FLAG)
;;;711    {
00029c  4602              MOV      r2,r0
;;;712      FlagStatus bitstatus = RESET;
00029e  2000              MOVS     r0,#0
;;;713      
;;;714      /* Check the parameters */
;;;715      assert(IS_USART_FLAG(USART_FLAG));
;;;716      
;;;717      if ((USARTx->SR & USART_FLAG) != (u16)RESET)
0002a0  8813              LDRH     r3,[r2,#0]
0002a2  420b              TST      r3,r1
0002a4  d001              BEQ      |L1.682|
;;;718      {
;;;719        bitstatus = SET;
0002a6  2001              MOVS     r0,#1
0002a8  e000              B        |L1.684|
                  |L1.682|
;;;720      }
;;;721      else
;;;722      {
;;;723        bitstatus = RESET;
0002aa  2000              MOVS     r0,#0
                  |L1.684|
;;;724      }
;;;725      return bitstatus;
;;;726    }
0002ac  4770              BX       lr
                          ENDP

                  USART_ClearFlag PROC
;;;752       
;;;753      USARTx->SR &= (u16)~USART_FLAG;
0002ae  8802              LDRH     r2,[r0,#0]
0002b0  43cb              MVNS     r3,r1
0002b2  b29b              UXTH     r3,r3
0002b4  401a              ANDS     r2,r2,r3
0002b6  8002              STRH     r2,[r0,#0]
;;;754    }
0002b8  4770              BX       lr
                          ENDP

                  USART_GetITStatus PROC
;;;776    ITStatus USART_GetITStatus(USART_TypeDef* USARTx, u16 USART_IT)
;;;777    {
0002ba  b570              PUSH     {r4-r6,lr}
0002bc  4602              MOV      r2,r0
;;;778      u32 bitpos = 0x00, itmask = 0x00, usartreg = 0;
0002be  2300              MOVS     r3,#0
0002c0  2400              MOVS     r4,#0
0002c2  2500              MOVS     r5,#0
;;;779      ITStatus bitstatus = RESET;
0002c4  2000              MOVS     r0,#0
;;;780    
;;;781      /* Check the parameters */
;;;782      assert(IS_USART_IT(USART_IT));
;;;783      
;;;784      /* Get the USART register index */
;;;785      usartreg = (((u8)USART_IT) >> 0x05);
0002c6  f3c1f3c1          UBFX     r5,r1,#5,#3
;;;786    
;;;787      /* Get the interrupt position */
;;;788      itmask = USART_IT & USART_IT_Mask;
0002ca  f001f001          AND      r4,r1,#0x1f
;;;789    
;;;790      itmask = (u32)0x01 << itmask;
0002ce  2601              MOVS     r6,#1
0002d0  fa06fa06          LSL      r4,r6,r4
;;;791      
;;;792      if (usartreg == 0x01) /* The IT  is in CR1 register */
0002d4  2d01              CMP      r5,#1
0002d6  d102              BNE      |L1.734|
;;;793      {
;;;794        itmask &= USARTx->CR1;
0002d8  8996              LDRH     r6,[r2,#0xc]
0002da  4034              ANDS     r4,r4,r6
0002dc  e006              B        |L1.748|
                  |L1.734|
;;;795      }
;;;796      else if (usartreg == 0x02) /* The IT  is in CR2 register */
0002de  2d02              CMP      r5,#2
0002e0  d102              BNE      |L1.744|
;;;797      {
;;;798        itmask &= USARTx->CR2;
0002e2  8a16              LDRH     r6,[r2,#0x10]
0002e4  4034              ANDS     r4,r4,r6
0002e6  e001              B        |L1.748|
                  |L1.744|
;;;799      }
;;;800      else /* The IT  is in CR3 register */
;;;801      {
;;;802        itmask &= USARTx->CR3;
0002e8  8a96              LDRH     r6,[r2,#0x14]
0002ea  4034              ANDS     r4,r4,r6
                  |L1.748|
;;;803      }
;;;804      
;;;805      bitpos = USART_IT >> 0x08;
0002ec  120b              ASRS     r3,r1,#8
;;;806    
;;;807      bitpos = (u32)0x01 << bitpos;
0002ee  2601              MOVS     r6,#1
0002f0  fa06fa06          LSL      r3,r6,r3
;;;808      bitpos &= USARTx->SR;
0002f4  8816              LDRH     r6,[r2,#0]
0002f6  4033              ANDS     r3,r3,r6
;;;809    
;;;810      if ((itmask != (u16)RESET)&&(bitpos != (u16)RESET))
0002f8  b114              CBZ      r4,|L1.768|
0002fa  b10b              CBZ      r3,|L1.768|
;;;811      {
;;;812        bitstatus = SET;
0002fc  2001              MOVS     r0,#1
0002fe  e000              B        |L1.770|
                  |L1.768|
;;;813      }
;;;814      else
;;;815      {
;;;816        bitstatus = RESET;
000300  2000              MOVS     r0,#0
                  |L1.770|
;;;817      }
;;;818      return bitstatus;
;;;819    }
000302  bd70              POP      {r4-r6,pc}
                          ENDP

                  USART_ClearITPendingBit PROC
;;;841    void USART_ClearITPendingBit(USART_TypeDef* USARTx, u16 USART_IT)
;;;842    {
000304  b510              PUSH     {r4,lr}
;;;843      u32 bitpos = 0x00, itmask = 0x00;
000306  2200              MOVS     r2,#0
000308  2300              MOVS     r3,#0
;;;844      
;;;845      /* Check the parameters */
;;;846      assert(IS_USART_IT(USART_IT));
;;;847      
;;;848      bitpos = USART_IT >> 0x08;
00030a  120a              ASRS     r2,r1,#8
;;;849    
;;;850      itmask = (u32)0x01 << bitpos;
00030c  2401              MOVS     r4,#1
00030e  fa04fa04          LSL      r3,r4,r2
;;;851      USARTx->SR &= ~itmask;
000312  8804              LDRH     r4,[r0,#0]
000314  439c              BICS     r4,r4,r3
000316  8004              STRH     r4,[r0,#0]
;;;852    }
000318  bd10              POP      {r4,pc}
                          ENDP

00031a  0000              DCW      0x0000
                  |L1.796|
00031c  bfffbc00          DCD      0xbfffbc00
                  |L1.800|
000320  40013800          DCD      0x40013800