ch375.h

CH375芯片设置驱动源码

/*****************************************************/
/*            File name : CH375.h                                                   */
/* Description : Head file of ch375.c                                          */
/* Platform     : AVRStudio4.13 + WinAVR20070525  for AVR     */
/* Author       : Michael Zhang - 章其波                            */
/* Email         : [e-mail]                                          */
/* MSN          : [e-mail]                          */
/* Date          : 2007-10-21                                                    */
/* NOT FOR COMMERCIAL USE,     ALL RIGHT RESERVED!         */
/*****************************************************/
/* Change Log:                                                                      */
/*                   20071021: original version                                 */
/*****************************************************/


#ifndef __CH375_H__
#define __CH375_H__

#include<avr/io.h>

#define uint8  unsigned char
#define uint16 unsigned int
#define uint32 unsigned long

//#define CH375_CMD_PORT  (*(volatile unsigned char *)0x2001)
//#define CH375_DAT_PORT  (*(volatile unsigned char *)0x2000)

#define CH375_PORT PORTD
#define CH375_DDR  DDRD
#define CH375_PIN  PIND

#define CH375_WR_PORT PORTG
#define CH375_WR_DDR  DDRG
#define CH375_WR_PIN  PING
#define CH375_WR_BIT  PG4

#define CH375_RD_PORT PORTG
#define CH375_RD_DDR  DDRG
#define CH375_RD_PIN  PING
#define CH375_RD_BIT  PG3

#define CH375_A0_PORT PORTG
#define CH375_A0_DDR  DDRG
#define CH375_A0_PIN  PING
#define CH375_A0_BIT  PG1

#define CH375_CS_PORT PORTG
#define CH375_CS_DDR  DDRG
#define CH375_CS_PIN  PING
#define CH375_CS_BIT  PG2

#define CH375_INT_PORT PORTG
#define CH375_INT_DDR  DDRG
#define CH375_INT_PIN  PING
#define CH375_INT_BIT  PG0


#define CH375_PORT_INI() {\
							CH375_DDR = 0x00;\
							CH375_PORT = 0xff;\
														\
							CH375_WR_PORT |= 1<<CH375_WR_BIT;\
							CH375_WR_DDR  |= 1<<CH375_WR_BIT;\
														\
							CH375_RD_PORT |= 1<<CH375_RD_BIT;\
							CH375_RD_DDR  |= 1<<CH375_RD_BIT;\
														\
							CH375_A0_PORT |= 1<<CH375_A0_BIT;\
							CH375_A0_DDR  |= 1<<CH375_A0_BIT;\
														\
							CH375_CS_PORT |= 1<<CH375_CS_BIT;\
							CH375_CS_DDR  |= 1<<CH375_CS_BIT;\
														\
							CH375_INT_PORT |= 1<<CH375_INT_BIT;\
							CH375_INT_DDR  &= ~(1<<CH375_INT_BIT);\
							}

#define CH375_WR_H CH375_WR_PORT |= 1<<CH375_WR_BIT
#define CH375_WR_L CH375_WR_PORT &= ~(1<<CH375_WR_BIT)

#define CH375_RD_H CH375_WR_PORT |= 1<<CH375_RD_BIT
#define CH375_RD_L CH375_RD_PORT &= ~(1<<CH375_RD_BIT)

#define CH375_A0_H CH375_A0_PORT |= 1<<CH375_A0_BIT
#define CH375_A0_L CH375_A0_PORT &= ~(1<<CH375_A0_BIT)

#define CH375_CS_H CH375_CS_PORT |= 1<<CH375_CS_BIT
#define CH375_CS_L CH375_CS_PORT &= ~(1<<CH375_CS_BIT)

#define CH375_INT_ACTIVE ((CH375_INT_PIN & 1<<CH375_INT_BIT) == 0)

#define CH375_TO_MCU CH375_DDR = 0x00
#define MCU_TO_CH375 CH375_DDR = 0xff

#define CH375_DAT_IN CH375_PORT
#define CH375_DAT_OUT  CH375_PIN

#define GET_IC_VER		0x01
#define SET_BAUDRATE	0x02
#define ENTER_SLEEP		0x03
#define RESET_ALL		0x05
#define CHECK_EXIST		0x06
#define GET_TOGGLE		0x0a
#define SET_RETRY		0x0b
#define SET_DISK_LUN	0x0b
#define CHECK_SUSPEND	0x0b
#define DELAY_100US		0x0f
#define SET_USB_ID		0x12
#define SET_USB_ADDR	0x13
#define SET_USB_MODE	0x15
	#define DEVICE_INACTIVE				0x00
	#define DEVICE_ACTIVE_INT_FIRMWARE	0x01
	#define DEVICE_ACTIVE_EXT_FIRMWARE	0x02
	#define HOST_INACTIVE				0x04
	#define HOST_ACTIVE_NO_EOF			0x05
	#define HOST_ACTIVE_EOF				0x06
	#define HOST_RESET_BUS				0x07
#define TEST_CONNECT	0x16
#define ABORT_NAK		0x17
#define SET_ENDP2		0x18
#define SET_ENDP3		0x19
#define SET_ENDP4		0x1a
#define SET_ENDP5		0x1b
#define SET_ENDP6		0x1c
#define SET_ENDP7		0x1d
#define GET_STATUS		0x22
	#define USB_INT_EP0_OUT				0x00
	#define USB_INT_EP1_OUT				0x01
	#define USB_INT_EP2_OUT				0x02
	#define USB_INT_BUS_RESET1			0x03
	#define USB_INT_USB_SUSPEND			0x05
	#define USB_INT_WAKE_UP				0x06
	#define USB_INT_BUS_RESET2			0x07
	#define USB_INT_EP0_IN				0x08
	#define USB_INT_EP1_IN				0x09
	#define USB_INT_EP2_IN				0x0a
	#define USB_INT_USB_RESET3			0x0b
	#define USB_INT_EP0_SETUP			0x0c
	#define USB_INT_BUS_RESET4			0x0f
	#define USB_INT_SUCCESS				0x14
	#define USB_INT_CONNECT				0x15
	#define USB_INT_DISCONNECT			0x16
	#define USB_INT_BUF_OVER			0x17
	#define USB_INT_DISK_READ			0x1d
	#define USB_INT_DISK_WRITE			0x1e
	#define USB_INT_DISK_ERR			0x1f
#define UNLOCK_USB		0x23
#define RD_USB_DATA0	0x27
#define RD_USB_DATA		0x28
#define WR_USB_DATA3	0x29
#define WR_USB_DATA5	0x2a
#define WR_USB_DATA7	0x2b
#define WR_USB_DATA		0x2b
#define CLR_STALL		0x41
#define SET_ADDRESS		0x45
#define GET_DESCR		0x46
#define SET_CONFIG		0x49
#define ISSUE_TKN_X		0x4e
#define AUTO_SETUP		0x4d
#define ISSUE_TOKEN		0x4f
#define DISK_INIT		0x51
#define DISK_SIZE		0x53
#define DISK_READ		0x54
#define DISK_RD_GO		0x55
#define DISK_WRITE		0x56
#define DISK_WR_GO		0x57
#define DISK_INQUIRY	0x58
#define DISK_READY		0x59
#define DISK_R_SENSE	0x5a
#define DISK_MAX_LUN	0x5d

#define CMD_RET_SUCCESS 0x51
#define CMD_RET_ABORT	0x5f

extern uint8 CH375_IniDisk(void);
extern uint8 CH375_ReadOneSector(uint32 LBA,uint8 *buffer);
extern uint8 CH375_WriteOneSector(uint32 LBA,uint8 *buffer);
extern uint32 CH375_ReadDiskSize(void);
extern uint8 CH375_CheckExist(void);
#endif