📄 chap2.asm
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; Chapter 2 6811 assembly language programs; Jonathan W. Valvano; This software accompanies the book,; Real Time Embedded Systems published by Brooks Cole;; Program 2.1. Memory allocation places variables in RAM and programs in ROM.; MC68HC11A8 org $0000 ;RAMcnt rmb 1 ;global org $B600 ;EEPROMconst fcb 5 ;amount to add org $E000 ;ROMinit ldaa #$FF staa DDRC ;outputs clr cnt rtsmain lds #$00FF ;sp=>RAM bsr initloop ldaa cnt staa PORTC ;output adda const staa cnt bra loop org $FFFE ;ROM fdb main ;reset vectorProgram 2.5. 6811 assembly implementation of a Mealy Finite State Machine. org $B600 Put in EEPROM so it can be changed* Finite State MachineTime equ 0 Index for time to wait in this stateOut0 equ 1 Index for output pattern if input=0Out1 equ 2 Index for output pattern if input=1Next0 equ 3 Index for next state if input=0Next1 equ 5 Index for next state if input=1IS fdb SA Initial stateSA fcb 100 Time to wait fcb 0,0 Outputs for inputs 0,1 fdb SB Next state if Input=0 fdb SD Next state if Input=1SB fcb 100 Time to wait fcb 0,8 Outputs for inputs 0,1 fdb SC Next state if Input=0 fdb SA Next state if Input=1SC fcb 15 Time to wait fcb 0,0 Outputs for inputs 0,1 fdb SB Next state if Input=0 fdb SD Next state if Input=1SD fcb 15 Time to wait fcb 8,8 Outputs for inputs 0,1 fdb SC Next state if Input=0 fdb SA Next state if Input=1 org $E000 Place assembly program in ROM* 6811 program * Initialization of 6811 and linked structureGO lds #$00FF Initialize stack ldaa #$08 PC3=output, rest are input staa $1007 Set DDRC ldx IS Reg X => current state*Linked structure interpreterLL ldaa Time,X Time to wait bsr WAIT Reg A is call by value ldaa $1003 bita #$80 Test input PC7 bpl is0 Go to is0 if Input=0is1 ldaa Out1,X Get desired output from linked structure staa $1003 Set PC3=output ldx Next1,X Input is 1 bra LLis0 ldaa Out0,X Get desired output from linked structure staa $1003 Set PC3=output ldx Next0,X Input is 0 bra LL Infinite loop org $FFFE fdb GO reset vector; Program 2.8: An assembly subroutine that uses ; comments to delineate its beginning and end.;***************Abs*************************; Input: RegA is signed 8 bit; Output: Reg A is absolute value 0 to 127Abs: tsta ; already positive? bpl ok negaok rts* ------------end of Abs -----------------; Program 2.9: Sometimes we can remove a conditional branch and simplify the program.; 6811/6812; uses conditional branchadd16a ldaa u1+1 ;lsb adda u2+1 staa u3+1 ldaa u1 ;msb bcc noc inca ;carrynoc adda u2 staa u3 rts; no conditional branchadd16b ldaa u1+1 ;lsb adda u2+1 staa u3+1 ldaa u1 ;msb adca u2 staa u3 rts; Program 2.10: Assembly implementation of a 3 layer software system.***************************High level**************************** org $E000 ; High level routines start at $F000main: lds #$00FF bsr Initialize ; simple call to a function in the same layerloop: bsr PrintInfo ; simple call to a function in the same layer bra loopInitialize: ldaa #1 ; function code for InitPrinter swi ; call to middle level rts org $FFFE ; high level vector (reset) fdb main***************************Middle level**************************** org $F400 ; Middle level routines start at $F400swihandler: cmpa #1 ; function code for InitPrinter bne notIP bsr InitPrinter bra swidonenotIP: cmpa #2 ; function code for PrintInfo bne notPI bsr PrintInfo bra swidonenotPI: ; ****errorswidone: rtiInitPrinter: ldaa #1 ; function code for InitIEEE ldx $FF80 ; vector address into the lower level jsr 0,x ; call lower level rts org $FFF6 ; middle level vector (SWI) fdb swihandler***************************Lower level**************************** org $F800 ; Lower level routines start at $F800lowhandler: cmpa #1 ; function code for InitIEEE bne notInit bsr InitIEEE bra lowdonenotInit: cmpa #2 ; function code for SetDAV bne notDAV bsr SetDAV bra lowdonenotDAV: ; rest of the functionslowdone: rtsInitIEEE: ; lower level implementation, access to hardware rts org $FF80 ; Lower level vector fdb lowhandler; Program 2.11: Assembly implementation of SCI initialization.; MC68HC11A8init ldaa #$33 ;1200 baud staa BAUD ldaa #$00 ;mode staa SCCR1 ldaa #$0C ;tie=rie=0, staa SCCR2 ;te=re=1 rts; Program 2.12: Assembly implementation of SCI input.; MC68HC11A8InChar ldaa SCSR ;status bita #$20 ;rdrf? beq InChar ldaa SCDR ;SCI data rts; Program 2.13: Assembly implementation of SCI output.; MC68HC11A8OutChar ldab SCSR ;status bitb #$80 ;tdre? beq OutChar staa SCDR ;output rts; Program 2.15: Assembly implementation of input decimal number.; MC68HC11A8 or MC68HC812A4; Input a byte from the SCI ; Inputs: none; Outputs: Reg B 0 to 255; C=1 if errorDIGIT rmb 1 ;globalInUDec clrb ;N=0 InUDloop bsr InChar ;Next input bsr OutChar ;Echo cmpa #13 ;done if cr beq InUDret ;with C=0 cmpa #'0 blo InUDerr ;error? cmpa #'9 bhi InUDerr ;error? anda #$0F ;0-9 digit staa DIGIT ldaa #10 mul tsta ;overflow? bne InUDerr addb DIGIT ;N=10*N+DIGIT bra InUDloop InUDerr ldaa #'? bsr OutChar clrb sec ;error flagInUDret rts; Program 2.16: Assembly implementation of SCI output string.; MC68HC11A8 or MC68HC812A4; Output a string to the SCI ; Inputs: Reg X points to string; String ends with 0; Outputs: noneOutString ldaa 0,X beq OSdone ;0 at end bsr OutChar inx bra OutString OSdone rts; Program 2.17: Assembly implementation of SCI output decimal number.; MC68HC11A8 or MC68HC812A4; Output unsigned byte to the SCI ; Inputs: Reg B= 0 to 255, ; print as 3 digit ascii; Outputs: none OutUDec clra ;Reg D=number ldx #100 idiv ;X=num/100, xgdx ;B=100s digit tba adda #'0 ;A=100's ascii bsr OutCh xgdx ;D=num ldx #10 idiv ;X=num/10, xgdx ;B=tens digit tba adda #'0 ;A=tens ascii bsr OutCh xgdx ;D=num tba adda #'0 ;A=ones ascii bsr OutCh rts⌨️ 快捷键说明
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