xd_io.c

来自「AMLOGIC DPF source code」· C语言 代码 · 共 127 行

#include <Drivers/cardreader/card_io.h>

//Don't change the name of any following variabls or delete any variabls
unsigned xd_backup_input_val = -1;
unsigned xd_backup_output_val = 0;
unsigned XD_BACKUP_INPUT_REG = (unsigned)&xd_backup_input_val;
unsigned XD_BACKUP_OUTPUT_REG = (unsigned)&xd_backup_output_val;

unsigned XD_DAT_OUTPUT_EN_REG;
unsigned XD_DAT0_7_OUTPUT_EN_MASK;
unsigned XD_DAT_INPUT_REG;
unsigned XD_DAT_OUTPUT_REG;
unsigned XD_DAT0_7_INPUT_MASK;
unsigned XD_DAT0_7_OUTPUT_MASK;
unsigned XD_DAT_INPUT_OFFSET;
unsigned XD_DAT_OUTPUT_OFFSET;

unsigned XD_RB_OUTPUT_EN_REG;
unsigned XD_RB_OUTPUT_EN_MASK;
unsigned XD_RB_INPUT_REG;
unsigned XD_RB_INPUT_MASK;

unsigned XD_RE_OUTPUT_EN_REG;
unsigned XD_RE_OUTPUT_EN_MASK;
unsigned XD_RE_OUTPUT_REG;
unsigned XD_RE_OUTPUT_MASK;

unsigned XD_CE_OUTPUT_EN_REG;
unsigned XD_CE_OUTPUT_EN_MASK;
unsigned XD_CE_OUTPUT_REG;
unsigned XD_CE_OUTPUT_MASK;

unsigned XD_ALE_OUTPUT_EN_REG;
unsigned XD_ALE_OUTPUT_EN_MASK;
unsigned XD_ALE_OUTPUT_REG;
unsigned XD_ALE_OUTPUT_MASK;

unsigned XD_CLE_OUTPUT_EN_REG;
unsigned XD_CLE_OUTPUT_EN_MASK;
unsigned XD_CLE_OUTPUT_REG;
unsigned XD_CLE_OUTPUT_MASK;

unsigned XD_WE_OUTPUT_EN_REG;
unsigned XD_WE_OUTPUT_EN_MASK;
unsigned XD_WE_OUTPUT_REG;
unsigned XD_WE_OUTPUT_MASK;

unsigned XD_WP_OUTPUT_EN_REG;
unsigned XD_WP_OUTPUT_EN_MASK;
unsigned XD_WP_OUTPUT_REG;
unsigned XD_WP_OUTPUT_MASK;

unsigned XD_INS_OUTPUT_EN_REG;
unsigned XD_INS_OUTPUT_EN_MASK;
unsigned XD_INS_INPUT_REG;
unsigned XD_INS_INPUT_MASK;

unsigned XD_PWR_OUTPUT_EN_REG;
unsigned XD_PWR_OUTPUT_EN_MASK;
unsigned XD_PWR_OUTPUT_REG;
unsigned XD_PWR_OUTPUT_MASK;
unsigned XD_PWR_EN_LEVEL;
/////////////////////////////////////////////////////////////////////////
void xd_io_init()
{
	XD_DAT_OUTPUT_EN_REG = ATAPI_GPIO_ENABLE;
	XD_DAT0_7_OUTPUT_EN_MASK = PREG_IO_8_15_MASK;
	XD_DAT_INPUT_REG = ATAPI_GPIO_INPUT;
	XD_DAT_OUTPUT_REG = ATAPI_GPIO_OUTPUT;
	XD_DAT0_7_INPUT_MASK = PREG_IO_8_15_MASK;
	XD_DAT0_7_OUTPUT_MASK = PREG_IO_8_15_MASK;
	XD_DAT_INPUT_OFFSET = 8;
	XD_DAT_OUTPUT_OFFSET = 8;

	XD_RB_OUTPUT_EN_REG = ATAPI_GPIO_ENABLE;
	XD_RB_OUTPUT_EN_MASK = PREG_IO_2_MASK;
	XD_RB_INPUT_REG = ATAPI_GPIO_INPUT;
	XD_RB_INPUT_MASK = PREG_IO_2_MASK;

	XD_RE_OUTPUT_EN_REG = ATAPI_GPIO_ENABLE;
	XD_RE_OUTPUT_EN_MASK = PREG_IO_0_MASK;
	XD_RE_OUTPUT_REG = ATAPI_GPIO_OUTPUT;
	XD_RE_OUTPUT_MASK = PREG_IO_0_MASK;

	XD_CE_OUTPUT_EN_REG = ATAPI_GPIO_ENABLE;
	XD_CE_OUTPUT_EN_MASK = PREG_IO_3_MASK;
	XD_CE_OUTPUT_REG = ATAPI_GPIO_OUTPUT;
	XD_CE_OUTPUT_MASK = PREG_IO_3_MASK;

	XD_ALE_OUTPUT_EN_REG = ATAPI_GPIO_ENABLE;
	XD_ALE_OUTPUT_EN_MASK = PREG_IO_4_MASK;
	XD_ALE_OUTPUT_REG = ATAPI_GPIO_OUTPUT;
	XD_ALE_OUTPUT_MASK = PREG_IO_4_MASK;

	XD_CLE_OUTPUT_EN_REG = ATAPI_GPIO_ENABLE;
	XD_CLE_OUTPUT_EN_MASK = PREG_IO_5_MASK;
	XD_CLE_OUTPUT_REG = ATAPI_GPIO_OUTPUT;
	XD_CLE_OUTPUT_MASK = PREG_IO_5_MASK;

	XD_WE_OUTPUT_EN_REG = ATAPI_GPIO_ENABLE;
	XD_WE_OUTPUT_EN_MASK = PREG_IO_1_MASK;
	XD_WE_OUTPUT_REG = ATAPI_GPIO_OUTPUT;
	XD_WE_OUTPUT_MASK = PREG_IO_1_MASK;

	XD_WP_OUTPUT_EN_REG = ATAPI_GPIO_ENABLE;
	XD_WP_OUTPUT_EN_MASK = PREG_IO_6_MASK;
	XD_WP_OUTPUT_REG = ATAPI_GPIO_OUTPUT;
	XD_WP_OUTPUT_MASK = PREG_IO_6_MASK;

	XD_INS_OUTPUT_EN_REG = ATAPI_GPIO_ENABLE;
	XD_INS_OUTPUT_EN_MASK = PREG_IO_20_MASK;
	XD_INS_INPUT_REG = ATAPI_GPIO_INPUT;
	XD_INS_INPUT_MASK = PREG_IO_20_MASK;

	XD_PWR_OUTPUT_EN_REG = ATAPI_GPIO_ENABLE;
	XD_PWR_OUTPUT_EN_MASK = PREG_IO_7_MASK;
	XD_PWR_OUTPUT_REG = ATAPI_GPIO_OUTPUT;
	XD_PWR_OUTPUT_MASK = PREG_IO_7_MASK;
	XD_PWR_EN_LEVEL = 0;
}

void xd_gpio_enable()
{
	set_atapi_enable(0,0);
	set_sdio_disable(SDIO_PAD_AT_D15_10);
}