sm_io.c

来自「AMLOGIC DPF source code」· C语言 代码 · 共 209 行

#include <Drivers/cardreader/card_io.h>
#include "bsp.h"

//Don't change the name of any following variabls or delete any variabls
unsigned sm_backup_input_val = -1;
unsigned sm_backup_output_val = 0;
unsigned SM_BACKUP_INPUT_REG = (unsigned)&sm_backup_input_val;
unsigned SM_BACKUP_OUTPUT_REG = (unsigned)&sm_backup_output_val;

unsigned SM_DAT_OUTPUT_EN_REG;
unsigned SM_DAT0_7_OUTPUT_EN_MASK;
unsigned SM_DAT_INPUT_REG;
unsigned SM_DAT_OUTPUT_REG;
unsigned SM_DAT0_7_INPUT_MASK;
unsigned SM_DAT0_7_OUTPUT_MASK;
unsigned SM_DAT_INPUT_OFFSET;
unsigned SM_DAT_OUTPUT_OFFSET;

unsigned SM_RB_OUTPUT_EN_REG;
unsigned SM_RB_OUTPUT_EN_MASK;
unsigned SM_RB_INPUT_REG;
unsigned SM_RB_INPUT_MASK;

unsigned SM_RE_OUTPUT_EN_REG;
unsigned SM_RE_OUTPUT_EN_MASK;
unsigned SM_RE_OUTPUT_REG;
unsigned SM_RE_OUTPUT_MASK;

unsigned SM_CE_OUTPUT_EN_REG;
unsigned SM_CE_OUTPUT_EN_MASK;
unsigned SM_CE_OUTPUT_REG;
unsigned SM_CE_OUTPUT_MASK;

unsigned SM_ALE_OUTPUT_EN_REG;
unsigned SM_ALE_OUTPUT_EN_MASK;
unsigned SM_ALE_OUTPUT_REG;
unsigned SM_ALE_OUTPUT_MASK;

unsigned SM_CLE_OUTPUT_EN_REG;
unsigned SM_CLE_OUTPUT_EN_MASK;
unsigned SM_CLE_OUTPUT_REG;
unsigned SM_CLE_OUTPUT_MASK;

unsigned SM_WE_OUTPUT_EN_REG;
unsigned SM_WE_OUTPUT_EN_MASK;
unsigned SM_WE_OUTPUT_REG;
unsigned SM_WE_OUTPUT_MASK;

unsigned SM_WP_OUTPUT_EN_REG;
unsigned SM_WP_OUTPUT_EN_MASK;
unsigned SM_WP_OUTPUT_REG;
unsigned SM_WP_OUTPUT_MASK;

unsigned SM_INS_OUTPUT_EN_REG;
unsigned SM_INS_OUTPUT_EN_MASK;
unsigned SM_INS_INPUT_REG;
unsigned SM_INS_INPUT_MASK;

unsigned SM_WPD_OUTPUT_EN_REG;
unsigned SM_WPD_OUTPUT_EN_MASK;
unsigned SM_WPD_INPUT_REG;
unsigned SM_WPD_INPUT_MASK;

unsigned SM_PWR_OUTPUT_EN_REG;
unsigned SM_PWR_OUTPUT_EN_MASK;
unsigned SM_PWR_OUTPUT_REG;
unsigned SM_PWR_OUTPUT_MASK;
unsigned SM_PWR_EN_LEVEL;
/////////////////////////////////////////////////////////////////////////
#ifdef CARD_VER_3

void sm_io_init()
{
	SM_DAT_OUTPUT_EN_REG = M2_GPIO_ENABLE;
	SM_DAT0_7_OUTPUT_EN_MASK = PREG_IO_0_7_MASK;
	SM_DAT_INPUT_REG = M2_GPIO_INPUT;
	SM_DAT_OUTPUT_REG = M2_GPIO_OUTPUT;
	SM_DAT0_7_INPUT_MASK = PREG_IO_0_7_MASK;
	SM_DAT0_7_OUTPUT_MASK = PREG_IO_0_7_MASK;
	SM_DAT_INPUT_OFFSET = 0;
	SM_DAT_OUTPUT_OFFSET = 0;

	SM_RB_OUTPUT_EN_REG = M2_GPIO_ENABLE;
	SM_RB_OUTPUT_EN_MASK = PREG_IO_13_MASK;
	SM_RB_INPUT_REG = M2_GPIO_INPUT;
	SM_RB_INPUT_MASK = PREG_IO_13_MASK;

	SM_RE_OUTPUT_EN_REG = M2_GPIO_ENABLE;
	SM_RE_OUTPUT_EN_MASK = PREG_IO_9_MASK;
	SM_RE_OUTPUT_REG = M2_GPIO_OUTPUT;
	SM_RE_OUTPUT_MASK = PREG_IO_9_MASK;

	SM_CE_OUTPUT_EN_REG = M2_GPIO_ENABLE;
	SM_CE_OUTPUT_EN_MASK = PREG_IO_8_MASK;
	SM_CE_OUTPUT_REG = M2_GPIO_OUTPUT;
	SM_CE_OUTPUT_MASK = PREG_IO_8_MASK;

	SM_ALE_OUTPUT_EN_REG = M2_GPIO_ENABLE;
	SM_ALE_OUTPUT_EN_MASK = PREG_IO_11_MASK;
	SM_ALE_OUTPUT_REG = M2_GPIO_OUTPUT;
	SM_ALE_OUTPUT_MASK = PREG_IO_11_MASK;

	SM_CLE_OUTPUT_EN_REG = M2_GPIO_ENABLE;
	SM_CLE_OUTPUT_EN_MASK = PREG_IO_12_MASK;
	SM_CLE_OUTPUT_REG = M2_GPIO_OUTPUT;
	SM_CLE_OUTPUT_MASK = PREG_IO_12_MASK;

	SM_WE_OUTPUT_EN_REG = M2_GPIO_ENABLE;
	SM_WE_OUTPUT_EN_MASK = PREG_IO_10_MASK;
	SM_WE_OUTPUT_REG = M2_GPIO_OUTPUT;
	SM_WE_OUTPUT_MASK = PREG_IO_10_MASK;

	SM_WP_OUTPUT_EN_REG = PREG_EGPIO_ENABLE;
	SM_WP_OUTPUT_EN_MASK = PREG_IO_24_MASK;
	SM_WP_OUTPUT_REG = PREG_EGPIO_OUTPUT;
	SM_WP_OUTPUT_MASK = PREG_IO_24_MASK;

	SM_INS_OUTPUT_EN_REG = PREG_EGPIO_ENABLE;
	SM_INS_OUTPUT_EN_MASK = PREG_IO_0_MASK;
	SM_INS_INPUT_REG = PREG_EGPIO_INPUT;
	SM_INS_INPUT_MASK = PREG_IO_0_MASK;

	SM_WPD_OUTPUT_EN_REG = M2_CTRL_GPIO_ENABLE;
	SM_WPD_OUTPUT_EN_MASK = M2_CTRL_GPIO_0_MASK;
	SM_WPD_INPUT_REG = M2_CTRL_GPIO_INPUT;
	SM_WPD_INPUT_MASK = M2_CTRL_GPIO_0_MASK;

	SM_PWR_OUTPUT_EN_REG = PREG_EGPIO_ENABLE;
	SM_PWR_OUTPUT_EN_MASK = PREG_IO_21_MASK;
	SM_PWR_OUTPUT_REG = PREG_EGPIO_OUTPUT;
	SM_PWR_OUTPUT_MASK = PREG_IO_21_MASK;
	SM_PWR_EN_LEVEL = 0;
}

void sm_gpio_enable()
{
	set_sdio_disable(SDIO_PAD_M2_D5_0);
}
#else

void sm_io_init()
{
	SM_DAT_OUTPUT_EN_REG = SM_BACKUP_OUTPUT_REG;
	SM_DAT0_7_OUTPUT_EN_MASK = 1;
	SM_DAT_INPUT_REG = SM_BACKUP_INPUT_REG;
	SM_DAT_OUTPUT_REG = SM_BACKUP_OUTPUT_REG;
	SM_DAT0_7_INPUT_MASK = 1;
	SM_DAT0_7_OUTPUT_MASK = 1;
	SM_DAT_INPUT_OFFSET = 0;
	SM_DAT_OUTPUT_OFFSET = 0;

	SM_RB_OUTPUT_EN_REG = SM_BACKUP_OUTPUT_REG;
	SM_RB_OUTPUT_EN_MASK = 1;
	SM_RB_INPUT_REG = SM_BACKUP_INPUT_REG;
	SM_RB_INPUT_MASK = 1;

	SM_RE_OUTPUT_EN_REG = SM_BACKUP_OUTPUT_REG;
	SM_RE_OUTPUT_EN_MASK = 1;
	SM_RE_OUTPUT_REG = SM_BACKUP_OUTPUT_REG;
	SM_RE_OUTPUT_MASK = 1;

	SM_CE_OUTPUT_EN_REG = SM_BACKUP_OUTPUT_REG;
	SM_CE_OUTPUT_EN_MASK = 1;
	SM_CE_OUTPUT_REG = SM_BACKUP_OUTPUT_REG;
	SM_CE_OUTPUT_MASK = 1;

	SM_ALE_OUTPUT_EN_REG = SM_BACKUP_OUTPUT_REG;
	SM_ALE_OUTPUT_EN_MASK = 1;
	SM_ALE_OUTPUT_REG = SM_BACKUP_OUTPUT_REG;
	SM_ALE_OUTPUT_MASK = 1;

	SM_CLE_OUTPUT_EN_REG = SM_BACKUP_OUTPUT_REG;
	SM_CLE_OUTPUT_EN_MASK = 1;
	SM_CLE_OUTPUT_REG = SM_BACKUP_OUTPUT_REG;
	SM_CLE_OUTPUT_MASK = 1;

	SM_WE_OUTPUT_EN_REG = SM_BACKUP_OUTPUT_REG;
	SM_WE_OUTPUT_EN_MASK = 1;
	SM_WE_OUTPUT_REG = SM_BACKUP_OUTPUT_REG;
	SM_WE_OUTPUT_MASK = 1;

	SM_WP_OUTPUT_EN_REG = SM_BACKUP_OUTPUT_REG;
	SM_WP_OUTPUT_EN_MASK = 1;
	SM_WP_OUTPUT_REG = SM_BACKUP_OUTPUT_REG;
	SM_WP_OUTPUT_MASK = 1;

	SM_INS_OUTPUT_EN_REG = SM_BACKUP_OUTPUT_REG;
	SM_INS_OUTPUT_EN_MASK = 1;
	SM_INS_INPUT_REG = SM_BACKUP_INPUT_REG;
	SM_INS_INPUT_MASK = 1;

	SM_WPD_OUTPUT_EN_REG = SM_BACKUP_OUTPUT_REG;
	SM_WPD_OUTPUT_EN_MASK = 1;
	SM_WPD_INPUT_REG = SM_BACKUP_INPUT_REG;
	SM_WPD_INPUT_MASK = 1;

	SM_PWR_OUTPUT_EN_REG = SM_BACKUP_OUTPUT_REG;
	SM_PWR_OUTPUT_EN_MASK = 1;
	SM_PWR_OUTPUT_REG = SM_BACKUP_OUTPUT_REG;
	SM_PWR_OUTPUT_MASK = 1;
	SM_PWR_EN_LEVEL = 0;
}

void sm_gpio_enable()
{
	//set_sdio_disable(SDIO_PAD_M2_D5_0);
}
#endif