os_cpu.h

来自「AMLOGIC DPF source code」· C头文件 代码 · 共 176 行

/*******************************************************************
 * 
 *  Copyright C 2005 by Amlogic, Inc. All Rights Reserved.
 *
 *  Description: 
 *
 *  Author: Amlogic Software
 *  Created: Thu Nov 17 16:13:47 2005
 *
 *******************************************************************/
#ifndef OS_CPU_H
#define OS_CPU_H

#ifdef  OS_CPU_GLOBALS
#define OS_CPU_EXT
#else
#define OS_CPU_EXT  extern
#endif

/*
*********************************************************************************************************
*                                              DATA TYPES
*                                         (Compiler Specific)
*********************************************************************************************************
*/

typedef unsigned char  BOOLEAN;
typedef unsigned char  INT8U;                    /* Unsigned  8 bit quantity                           */
typedef signed   char  INT8S;                    /* Signed    8 bit quantity                           */
typedef unsigned short INT16U;                   /* Unsigned 16 bit quantity                           */
typedef signed   short INT16S;                   /* Signed   16 bit quantity                           */
typedef unsigned int   INT32U;                   /* Unsigned 32 bit quantity                           */
typedef signed   int   INT32S;                   /* Signed   32 bit quantity                           */
typedef float          FP32;                     /* Single precision floating point                    */
typedef double         FP64;                     /* Double precision floating point                    */
typedef char           CHARSTR;                  /* Character string */

typedef unsigned int   OS_STK;                   /* Each stack entry is 32-bit wide                    */
typedef unsigned int   OS_CPU_SR;                /* Define size of CPU status register (PSW = 32 bits) */

#define UBYTE          INT8U                     
#define WORD           INT16S                    
#define UWORD          INT16U
#define LONG           INT32S
#define ULONG          INT32U


#define  OS_CRITICAL_METHOD    3

// Should stick to this method for the ARC
#if      OS_CRITICAL_METHOD == 3
#define DECLARE_CPU_SR OS_CPU_SR cpu_sr
#define  OS_ENTER_CRITICAL()  (cpu_sr = OSCPUSaveSR())    /* Disable interrupts                        */
#define  OS_EXIT_CRITICAL()   (OSCPURestoreSR(cpu_sr))    /* Enable  interrupts                        */

#define  OS_ENABLE_ALL() _flag(6)
#define  OS_DISABLE_ALL() _flag(0)
#define  OS_GLOBAL_ENABLE() _ASM("sr 0x3c, [0x111]")      /* set the global interrupts register */
#endif



/*
*********************************************************************************************************
*                          ARC Miscellaneous
*********************************************************************************************************
*/

#define  OS_STK_GROWTH        1                       /* Stack grows from HIGH to LOW memory on 80x86  */

// not required for ARC
//#define  uCOS                 0x80                    /* Interrupt vector # used for context switch    */

// we need to branch and save the interrupt flasg to preserve the state when returning
//#define  OS_TASK_SW()         _ASM("bl.f  OSCtxSw")
// amlogic
#define  OS_TASK_SW()         _ASM("bl  OSCtxSw") 

/*
*********************************************************************************************************
*                                            GLOBAL VARIABLES
*********************************************************************************************************
*/

/*
*********************************************************************************************************
*                                              PROTOTYPES
*********************************************************************************************************
*/

#if OS_CRITICAL_METHOD == 3                      /* Allocate storage for CPU status register           */
OS_CPU_SR  OSCPUSaveSR(void);
void       OSCPURestoreSR(OS_CPU_SR cpu_sr);
#endif

/*
*****************************************
* DEFINE TASK STACK POSITIONS
*****************************************
*/

#define METAWARE_BACK_TRACE_SIZE	    16 // requires adding to stack size

/* byte offsets into the task stack */

#define STACK_TYPE_POSITION				0
#define STACK_TYPE_BLINK				0	//task context switch
#define STACK_TYPE_ILINK1				1	// interrupt 1 context switch
#define STACK_TYPE_ILINK2				2	// interrupt 2 context switch

#define STACK_RETURN_ADDRESS			4   // value of blink, ilink1 or Ilink2

#define TASK_STACK_PDATA				8
#define TASK_STACK_SP					12
#define TASK_STACK_R13					16
#define TASK_STACK_R14					20
#define TASK_STACK_R15					24
#define TASK_STACK_R16					28
#define TASK_STACK_R17					32
#define TASK_STACK_R18					36
#define TASK_STACK_R19					40
#define TASK_STACK_R20					44
#define TASK_STACK_R21					48
#define TASK_STACK_R22					52
#define TASK_STACK_R23					56
#define TASK_STACK_R24					60
#define TASK_STACK_R25					64
#define TASK_STACK_FP					68
#define TASK_STACK_GP					72
#define TASK_STACK_LPS					76
#define TASK_STACK_LPE					80
#define TASK_STACK_LPC					84
#define TASK_STACK_MLO                  88
#define TASK_STACK_MHI                  92

#define TASK_STACK_SIZE					96


// function decalarations
#define _invalidate_dcache ARC_invalidate_dcache
#define _disable_dcache    ARC_disable_dcache

/* ARC control register definitions */
#define DC_IVDC_REG 0x47
#define DC_CTRL_REG 0x48

#define DC_CTRL_DIS  (1<<0) /* Data cache control disable */
#define DC_CTRL_FS   (1<<8)

/* 
 * Perform blocking invalidate, making sure that the flush
 * completes before we continue 
 */
static inline void ARC_invalidate_dcache(void)
{
	/* nop instruction is needed to finish ARC instruction pipeline for previous data fetching */
    _ASM("nop");
    _ASM("nop");
    _ASM("nop");
    _ASM("nop");
    _sr(DC_IVDC_REG, DC_IVDC_REG);
    while(_lr(DC_CTRL_REG)&DC_CTRL_FS)
	;
}

static inline void ARC_disable_dcache(void)
{
    _sr(_lr(DC_CTRL_REG)|DC_CTRL_DIS, DC_CTRL_REG);
}

void ARCStartTimer(void);
void Am_Init(void);
void Am_Timer1Init(void);

#endif