cc1020_ctrl.c

基于TI公司的CC1020芯片的无线通讯程序,程序的MCU是TI公司的MSP430系列。

#include "global.h"
#include "cc1020.h"
#include "msp430x14x.h" 

void cc1020_init(void)
{
   spi_wr(MAIN,MAIN_V);
   delay(DELAY_TIME);
   spi_wr(INTERFACE,INTERFACE_V);
   delay(DELAY_TIME);
   spi_wr(SEQUENCING,SEQUENCING_V);
   delay(DELAY_TIME);
   spi_wr(FREQ_2A,FREQ_2A_V);         //433MHz
   delay(DELAY_TIME);
   spi_wr(FREQ_1A,FREQ_1A_V);
   delay(DELAY_TIME);
   spi_wr(FREQ_0A,FREQ_0A_V);
   delay(DELAY_TIME);
   spi_wr(CLOCK_A,CLOCK_A_V);    //9.6kbps
   delay(DELAY_TIME);
   spi_wr(FREQ_2B,FREQ_2B_V);         //433MHz
   delay(DELAY_TIME);
   spi_wr(FREQ_1B,FREQ_1B_V); 
   delay(DELAY_TIME);
   spi_wr(FREQ_0B,FREQ_0B_V);
   delay(DELAY_TIME);
   spi_wr(CLOCK_B,CLOCK_B_V);   //9.6kbps 
   delay(DELAY_TIME);
   spi_wr(VCO,VCO_V);
   delay(DELAY_TIME);
   spi_wr(MODEM,MODEM_V);
   delay(DELAY_TIME);
   spi_wr(DEVIATION,DEVIATION_V);    //7372.8KHz/1024*8=57.6KHz
   delay(DELAY_TIME);
   spi_wr(AFC_CONTROL,AFC_CONTROL_V);  //9.6*15/3=48KHz
   delay(DELAY_TIME);
   spi_wr(FILTER,FILTER_V);   
   delay(DELAY_TIME);
   spi_wr(VGA1,VGA1_V);
   delay(DELAY_TIME);
   spi_wr(VGA2,VGA2_V);
   delay(DELAY_TIME);
   spi_wr(VGA3,VGA3_V);
   delay(DELAY_TIME);
   spi_wr(VGA4,VGA4_V);
   delay(DELAY_TIME);
   spi_wr(CC_LOCK,CC_LOCK_V);
   delay(DELAY_TIME);
   spi_wr(FRONTEND,FRONTEND_V);
   delay(DELAY_TIME);
   spi_wr(ANALOG,ANALOG_V);
   delay(DELAY_TIME);
   spi_wr(BUFF_SWING,BUFF_SWING_V);
   delay(DELAY_TIME);
   spi_wr(BUFF_CURRENT,BUFF_CURRENT_V);
   delay(DELAY_TIME);
   spi_wr(PLL_BW,PLL_BW_V);       
   delay(DELAY_TIME);
   spi_wr(PA_POWER,PA_POWER_V);
   delay(DELAY_TIME);

   RF_DIR = 0;   
}         

int verify_cc1020(void)
{
   int error = 0;
   char data;
	
   data = spi_rd(MAIN);
   if (data != MAIN_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(INTERFACE);
   if (data != INTERFACE_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(RESET);
   if (data != RESET_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(SEQUENCING);
   if (data != SEQUENCING_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(FREQ_2A);         //433MHz
   if (data != FREQ_2A_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(FREQ_1A);
   if (data != FREQ_1A_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(FREQ_0A);
   if (data != FREQ_0A_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(CLOCK_A);    //9.6kbps
   if (data != CLOCK_A_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(FREQ_2B);         //433MHz
   if (data != FREQ_2B_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(FREQ_1B); 
   if (data != FREQ_1B_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(FREQ_0B);
   if (data != FREQ_0B_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(CLOCK_B);   //9.6kbps 
   if (data != CLOCK_B_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(VCO);
   if (data != VCO_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(MODEM);
   if (data != MODEM_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(DEVIATION);    //7372.8KHz/1024*8=57.6KHz
   if (data != DEVIATION_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(AFC_CONTROL);  //9.6*15/3=48KHz
   if (data != AFC_CONTROL_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(FILTER);   
   if (data != FILTER_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(VGA1);
   if (data != VGA1_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(VGA2);
   if (data != VGA2_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(VGA3);
   if (data != VGA3_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(VGA4);
   if (data != VGA4_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(CC_LOCK);
   if (data != CC_LOCK_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(FRONTEND);
   if (data != FRONTEND_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(ANALOG);
   if (data != ANALOG_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(BUFF_SWING);
   if (data != BUFF_SWING_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(BUFF_CURRENT);
   if (data != BUFF_CURRENT_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(PLL_BW);       
   if (data != PLL_BW_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   data = spi_rd(PA_POWER);
   if (data != PA_POWER_V)
   {
      error++;
   }   
   delay(DELAY_TIME);
   return(error);
} 

void reset_cc1020(void)
{
   RF_OK = 0;
   
   spi_wr(RESET,0);
   spi_wr(MAIN,RX);
   delay(1000);
   spi_wr(MAIN,RX+RESET_OFF);
   spi_wr(RESET,0xFF);
}

char cali_pll(void)
{
   spi_wr(CALIBRATE,CAL_START+CAL_DUAL+CAL_WAIT3+CAL_ITERATE5);
   while((spi_rd(STATUS)&CAL_COMPLETED) != CAL_COMPLETED);
   {
      delay(DELAY_TIME);
   }
   RF_OK = 1;
   return(spi_rd(STATUS1)&CHP_CURRENT);
}

void cc1020_tx(void)
{
   char data;
   RF_OK = 0;
   data = spi_rd(MAIN)&0x3F;
   spi_wr(MAIN,data|(TX+FREQ_REG_A));
   while(spi_rd(STATUS)&LOCK_CONT != LOCK_CONT)
   {
      asm(" nop");
   }
   data = spi_rd(INTERFACE)&0xFC;
   spi_wr(INTERFACE,data|EXT_PA_POL);
   P2DIR |= BIT3;
   BUFF_FULL = 0;
   BYTE_CNT = 0;
   BIT_CNT = 0;
   RF_DIR = 1;
   RF_OK = 1;
}

void cc1020_rx(void)
{
   char data;
   RF_OK = 0;
   P2DIR &= ~BIT3;
   data = spi_rd(MAIN)&0x3F;
   spi_wr(MAIN,data|(RX+FREQ_REG_B));
   while(spi_rd(STATUS)&LOCK_CONT != LOCK_CONT)
   {
      asm(" nop");
   }
   data = spi_rd(INTERFACE)&0xFC;
   spi_wr(INTERFACE,data|EXT_LNA_POL);
   BUFF_FULL = 0;
   BYTE_CNT = 0;
   BIT_CNT = 0;
   RF_DIR = 0;
   RF_OK = 1;
}

char rd_rssi(void)
{
   return(spi_rd(RSSI));
}

char rd_afc(void)
{
   return(spi_rd(AFC));
}

void set_freq(int freq_num)
{
   RF_OK = 0;
   if((freq_num > 15)||(freq_num < 0))
   {
      freq_num = 0;
   }
   
   spi_wr(FREQ_2B,FREQ[freq_num][3]);
   spi_wr(FREQ_1B,FREQ[freq_num][4]);
   spi_wr(FREQ_0B,FREQ[freq_num][5]|DITHER);
   spi_wr(FREQ_2A,FREQ[freq_num][0]);
   spi_wr(FREQ_1A,FREQ[freq_num][1]);
   spi_wr(FREQ_0A,FREQ[freq_num][2]|DITHER);

   while(spi_rd(STATUS)&LOCK_CONT != LOCK_CONT)
   {
      asm(" nop");
   }
   
   RF_OK = 1;
}

void pakging(int length,char *data)
{
   int i;

   switch(length)
   {
      case 2 : TX_BUF[3] = BYTE2;
               PACKAGE_LEN = 2+4;
               break;
               
      case 8 : TX_BUF[3] = BYTE8;
               PACKAGE_LEN = 8+4;
               break;
      
      case 16: TX_BUF[3] = BYTE16;
               PACKAGE_LEN = 16+4;
               break;
      
      case 32: TX_BUF[3] = BYTE32;
               PACKAGE_LEN = 32+4;
               break;
      
      default: TX_BUF[3] = BYTE2;               
               PACKAGE_LEN = 2;
               break;
   }
   //when add bch,should modify packge-len. first count rk from len
   for(i=4;i<PACKAGE_LEN;i++)
   {
      TX_BUF[i] = *data;
      data++;
   }

  //bch_to_send(*data,length,TX_BUF+4);

                                                      
   BUFF_FULL = 1;
}