cc1020.h

基于TI公司的CC1020芯片的无线通讯程序,程序的MCU是TI公司的MSP430系列。

#define XOSC           14.7456MHz
#define DELAY_TIME     100

#define MAIN           0x00 
#define INTERFACE      0x01 
#define RESET          0x02 
#define SEQUENCING     0x03 
#define FREQ_2A        0x04 
#define FREQ_1A        0x05 
#define FREQ_0A        0x06 
#define CLOCK_A        0x07 
#define FREQ_2B        0x08 
#define FREQ_1B        0x09 
#define FREQ_0B        0x0A 
#define CLOCK_B        0x0B 
#define VCO            0x0C 
#define MODEM          0x0D 
#define DEVIATION      0x0E 
#define AFC_CONTROL    0x0F 
#define FILTER         0x10 
#define VGA1           0x11 
#define VGA2           0x12 
#define VGA3           0x13 
#define VGA4           0x14 
#define CC_LOCK        0x15 
#define FRONTEND       0x16 
#define ANALOG         0x17 
#define BUFF_SWING     0x18 
#define BUFF_CURRENT   0x19 
#define PLL_BW         0x1A 
#define CALIBRATE      0x1B 
#define PA_POWER       0x1C 
#define MATCH          0x1D 
#define PHASE_COMP     0x1E 
#define GAIN_COMP      0x1F 
#define POWERDOWN      0x20 
#define TEST1          0x21 
#define TEST2          0x22 
#define TEST3          0x23 
#define TEST4          0x24 
#define TEST5          0x25 
#define TEST6          0x26 
#define TEST7          0x27 
#define STATUS         0x40 
#define RESET_DONE     0x41 
#define RSSI           0x42 
#define AFC            0x43 
#define GAUSS_FILTER   0x44 
#define STATUS1        0x45 
#define STATUS2        0x46 
#define STATUS3        0x47 
#define STATUS4        0x48 
#define STATUS5        0x49 
#define STATUS6        0x4A 
#define STATUS7        0x4B

#define MAIN_V          RX+PD_MODE0+RESET_OFF+FREQ_REG_A
#define INTERFACE_V     DCLK_LOCK //EXT_LNA_POL(RX) EXT_PA_POL(TX)
#define RESET_V         0xFF
#define SEQUENCING_V    SEQ_PSEL+RX_WAIT32+CS_WAIT20
#define FREQ_2A_V       0x39         //433MHz
#define FREQ_1A_V       0xFA       
#define FREQ_0A_V       0xB8+DITHER       
#define CLOCK_A_V       REF_DIV2+MCLK_DIV1_480+MCLK_DIV2_2
#define FREQ_2B_V       0x39         //433MHz-307.2KHz
#define FREQ_1B_V       0xF0 
#define FREQ_0B_V       0x08+DITHER
#define CLOCK_B_V       REF_DIV2+MCLK_DIV1_480+MCLK_DIV2_2
#define VCO_V           VCO_CURRENT_A_28mA+VCO_CURRENT_B_28mA
#define MODEM_V         ADC_DIV12+NRZ//+PN9_ENABLE+MANCHESTER
#define DEVIATION_V     TXDEV_X5+TXDEV_M5    

#define AFC_CONTROL_V   SETTLING_SLOW+RXDEV_X3+RXDEV_M4  
#define FILTER_V        DEC_SHIFT1+DEC_DIV4   

#define VGA1_V          CS_SET3+VGA_WAIT16+VGA_FREEZE16+CS_RESET
#define VGA2_V          LNA2_MAX+LNA2_SETTING1+AGC_HYSTERESIS+AGC_AVG16//+AGC_DISABLE
#define VGA3_V          VGA_DOWN_060db+VGA_SETTING18
#define VGA4_V          VGA_UP_45db+CS_LEVEL25

#define CC_LOCK_V       LOCK_CONTINUOUS+LOCK_ACCURACY0
#define FRONTEND_V      LNAMIX_CURRENT_27mA+LNA_CURRENT_226mA+MIX_CURRENT_080mA+LNA2_CURRENT_080mA+SDC_CURRENT_029mA //LNAMIX_CURRENT_22mA
#define ANALOG_V        BAND433M+LO_DC_L+PA_BOOST+DIV_BUFF_CURRENT3
#define BUFF_SWING_V    PRE_SWING1+RX_SWING2+TX_SWING4
#define BUFF_CURRENT_V  PRE_CURRENT0+RX_CURRENT4+TX_CURRENT2
#define PLL_BW_V        0xAE       
#define PA_POWER_V      0x80

//MAIN(00h)
#define RX               0x00
#define TX               0x80
#define FREQ_REG_A       0x00
#define FREQ_REG_B       0x40
#define PD_MODE0         0x00
#define PD_MODE1         0x10
#define PD_MODE2         0x20
#define PD_MODE3         0x30
#define PLL_PD           0x08
#define XOSC_PD          0x04
#define BIAS_PD          0x02
#define RESET_OFF        0x01

#define SEQ_CAL0         0x00
#define SEQ_CAL1         0x04
#define SEQ_CAL2         0x08
#define SEQ_CAL3         0x0C
#define SEQ_PD           0x02

//INTERFACE(01h)
#define XOSC_BYPA        0x80
#define SEP_DI_DO        0x40
#define DCLK_LOCK        0x20
#define DCLK_CS          0x10
#define EXT_PA           0x08
#define EXT_LNA          0x04
#define EXT_PA_POL       0x02
#define EXT_LNA_POL      0x01
 
//RESET(02h)
#define NO_ADC_RESET       0x80
#define NO_AGC_RESET       0x40
#define NO_GAUSS_RESET     0x20
#define NO_AFC_RESET       0x10
#define NO_BITSYNC_RESET   0x08
#define NO_SYNTH_RESET     0x04
#define NO_SEQ_RESET       0x02
#define NO_CAL_LOCK_RESET  0x01

//SEQUENCING(03h)
#define SEQ_PSEL           0x80

#define RX_WAIT32          0x00
#define RX_WAIT44          0x10
#define RX_WAIT64          0x20
#define RX_WAIT88          0x30
#define RX_WAIT128         0x40
#define RX_WAIT176         0x50
#define RX_WAIT256         0x60

#define CS_WAIT20          0x00  
#define CS_WAIT22          0x01
#define CS_WAIT24          0x02
#define CS_WAIT26          0x03
#define CS_WAIT28          0x04
#define CS_WAIT30          0x05
#define CS_WAIT32          0x06
#define CS_WAIT36          0x07
#define CS_WAIT40          0x08
#define CS_WAIT44          0x09
#define CS_WAIT48          0x0A
#define CS_WAIT52          0x0B  
#define CS_WAIT56          0x0C
#define CS_WAIT60          0x0D
#define CS_WAIT64          0x0E
#define CS_WAIT72          0x0F

//FREQ_0A(06h) FREQ_0B(0Ah)
#define DITHER             0x01

//CLOCK_A(07h) CLOCK_B(0Bh)
#define REF_DIV2          0x20
#define REF_DIV3          0x40
#define REF_DIV4          0x60
#define REF_DIV5          0x80
#define REF_DIV6          0xA0
#define REF_DIV7          0xC0
#define REF_DIV8          0xE0

#define MCLK_DIV1_025     0x00
#define MCLK_DIV1_030     0x04
#define MCLK_DIV1_040     0x08
#define MCLK_DIV1_075     0x0C
#define MCLK_DIV1_125     0x10
#define MCLK_DIV1_400     0x14
#define MCLK_DIV1_480     0x18
#define MCLK_DIV1_640     0x1C

#define MCLK_DIV2_1       0x00 
#define MCLK_DIV2_2       0x01        
#define MCLK_DIV2_4       0x02 
#define MCLK_DIV2_8       0x03

//VCO(0Ch)
#define VCO_CURRENT_A_14mA   0x00 
#define VCO_CURRENT_A_18mA   0x10 
#define VCO_CURRENT_A_21mA   0x20 
#define VCO_CURRENT_A_25mA   0x30 
#define VCO_CURRENT_A_28mA   0x40 
#define VCO_CURRENT_A_32mA   0x50 
#define VCO_CURRENT_A_35mA   0x60 
#define VCO_CURRENT_A_39mA   0x70 
#define VCO_CURRENT_A_42mA   0x80 
#define VCO_CURRENT_A_46mA   0x90 
#define VCO_CURRENT_A_49mA   0xA0 
#define VCO_CURRENT_A_53mA   0xB0 
#define VCO_CURRENT_A_56mA   0xC0 
#define VCO_CURRENT_A_60mA   0xD0 
#define VCO_CURRENT_A_64mA   0xE0 
#define VCO_CURRENT_A_67mA   0xF0 

#define VCO_CURRENT_B_14mA   0x00 
#define VCO_CURRENT_B_18mA   0x01 
#define VCO_CURRENT_B_21mA   0x02 
#define VCO_CURRENT_B_25mA   0x03
#define VCO_CURRENT_B_28mA   0x04 
#define VCO_CURRENT_B_32mA   0x05 
#define VCO_CURRENT_B_35mA   0x06 
#define VCO_CURRENT_B_39mA   0x07 
#define VCO_CURRENT_B_42mA   0x08 
#define VCO_CURRENT_B_46mA   0x09 
#define VCO_CURRENT_B_49mA   0x0A 
#define VCO_CURRENT_B_53mA   0x0B 
#define VCO_CURRENT_B_56mA   0x0C 
#define VCO_CURRENT_B_60mA   0x0D 
#define VCO_CURRENT_B_64mA   0x0E 
#define VCO_CURRENT_B_67mA   0x0F 

//MODEM(0Dh)
#define ADC_DIV4          0x10
#define ADC_DIV6          0x20
#define ADC_DIV8          0x30
#define ADC_DIV10         0x40
#define ADC_DIV12         0x50
#define ADC_DIV14         0x60
#define ADC_DIV16         0x70

#define PN9_ENABLE        0x04
#define NRZ               0x00
#define MANCHESTER        0x01
#define UART0             0x02
#define UART1             0x03

//DEVIATION(0Eh)
#define GAUSSIAN          0x80
#define TXDEV_X0          0x00
#define TXDEV_X1          0x10
#define TXDEV_X2          0x20
#define TXDEV_X3          0x30
#define TXDEV_X4          0x40
#define TXDEV_X5          0x50
#define TXDEV_X6          0x60
#define TXDEV_X7          0x70

#define TXDEV_M0          0x00
#define TXDEV_M1          0x01
#define TXDEV_M2          0x02
#define TXDEV_M3          0x03
#define TXDEV_M4          0x04
#define TXDEV_M5          0x05
#define TXDEV_M6          0x06
#define TXDEV_M7          0x07
#define TXDEV_M8          0x08
#define TXDEV_M9          0x09
#define TXDEV_M10         0x0A
#define TXDEV_M11         0x0B
#define TXDEV_M12         0x0C
#define TXDEV_M13         0x0D
#define TXDEV_M14         0x0E
#define TXDEV_M15         0x0F

//AFC_CONTROL(0Fh)
#define AFC_OFF           0x00
#define SETTLING_FAST     0x40
#define SETTLING_MEDIUM   0x80
#define SETTLING_SLOW     0xC0

#define RXDEV_X0          0x00
#define RXDEV_X1          0x10
#define RXDEV_X2          0x20
#define RXDEV_X3          0x30

#define RXDEV_M0          0x00
#define RXDEV_M1          0x01
#define RXDEV_M2          0x02
#define RXDEV_M3          0x03
#define RXDEV_M4          0x04
#define RXDEV_M5          0x05
#define RXDEV_M6          0x06
#define RXDEV_M7          0x07
#define RXDEV_M8          0x08
#define RXDEV_M9          0x09
#define RXDEV_M10         0x0A
#define RXDEV_M11         0x0B
#define RXDEV_M12         0x0C
#define RXDEV_M13         0x0D
#define RXDEV_M14         0x0E
#define RXDEV_M15         0x0F

//FILTER(10h)
#define FILTER_BYPASS     0x80

#define DEC_SHIFT0        0x00
#define DEC_SHIFT1        0x20
#define DEC_SHIFT2        0x40
#define DEC_SHIFT3        0x60

#define DEC_DIV0          0x00    //BW=307.2KHz/(DEC_DIV+1)
#define DEC_DIV1          0x01
#define DEC_DIV2          0x02
#define DEC_DIV3          0x03
#define DEC_DIV4          0x04
#define DEC_DIV5          0x05
#define DEC_DIV6          0x06
#define DEC_DIV7          0x07