📄 dask.h
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#ifndef _DASK_H
#define _DASK_H
#ifdef __cplusplus
extern "C" {
#endif
//DASK Data Types
typedef unsigned char U8;
typedef short I16;
typedef unsigned short U16;
typedef long I32;
typedef unsigned long U32;
typedef float F32;
typedef double F64;
//ADLink PCI Card Type
#define PCI_6208V 1
#define PCI_6208A 2
#define PCI_6308V 3
#define PCI_6308A 4
#define PCI_7200 5
#define PCI_7230 6
#define PCI_7233 7
#define PCI_7234 8
#define PCI_7248 9
#define PCI_7249 10
#define PCI_7250 11
#define PCI_7252 12
#define PCI_7296 13
#define PCI_7300A_RevA 14
#define PCI_7300A_RevB 15
#define PCI_7432 16
#define PCI_7433 17
#define PCI_7434 18
#define PCI_8554 19
#define PCI_9111DG 20
#define PCI_9111HR 21
#define PCI_9112 22
#define PCI_9113 23
#define PCI_9114DG 24
#define PCI_9114HG 25
#define PCI_9118DG 26
#define PCI_9118HG 27
#define PCI_9118HR 28
#define PCI_9810 29
#define PCI_9812 30
#define PCI_7396 31
#define PCI_9116 32
#define PCI_7256 33
#define PCI_7258 34
#define MAX_CARD 32
//Error Number
#define NoError 0
#define ErrorUnknownCardType -1
#define ErrorInvalidCardNumber -2
#define ErrorTooManyCardRegistered -3
#define ErrorCardNotRegistered -4
#define ErrorFuncNotSupport -5
#define ErrorInvalidIoChannel -6
#define ErrorInvalidAdRange -7
#define ErrorContIoNotAllowed -8
#define ErrorDiffRangeNotSupport -9
#define ErrorLastChannelNotZero -10
#define ErrorChannelNotDescending -11
#define ErrorChannelNotAscending -12
#define ErrorOpenDriverFailed -13
#define ErrorOpenEventFailed -14
#define ErrorTransferCountTooLarge -15
#define ErrorNotDoubleBufferMode -16
#define ErrorInvalidSampleRate -17
#define ErrorInvalidCounterMode -18
#define ErrorInvalidCounter -19
#define ErrorInvalidCounterState -20
#define ErrorInvalidBinBcdParam -21
#define ErrorBadCardType -22
#define ErrorInvalidDaRefVoltage -23
#define ErrorAdTimeOut -24
#define ErrorNoAsyncAI -25
#define ErrorNoAsyncAO -26
#define ErrorNoAsyncDI -27
#define ErrorNoAsyncDO -28
#define ErrorNotInputPort -29
#define ErrorNotOutputPort -30
#define ErrorInvalidDioPort -31
#define ErrorInvalidDioLine -32
#define ErrorContIoActive -33
#define ErrorDblBufModeNotAllowed -34
#define ErrorConfigFailed -35
#define ErrorInvalidPortDirection -36
#define ErrorBeginThreadError -37
#define ErrorInvalidPortWidth -38
#define ErrorInvalidCtrSource -39
#define ErrorOpenFile -40
#define ErrorAllocateMemory -41
#define ErrorDaVoltageOutOfRange -42
//Error number for driver API
#define ErrorConfigIoctl -201
#define ErrorAsyncSetIoctl -202
#define ErrorDBSetIoctl -203
#define ErrorDBHalfReadyIoctl -204
#define ErrorContOPIoctl -205
#define ErrorContStatusIoctl -206
#define ErrorPIOIoctl -207
#define ErrorDIntSetIoctl -208
#define ErrorWaitEvtIoctl -209
#define ErrorOpenEvtIoctl -210
#define ErrorCOSIntSetIoctl -211
#define ErrorMemMapIoctl -212
#define ErrorMemUMapSetIoctl -213
#define ErrorCTRIoctl -214
#define ErrorGetResIoctl -215
#define TRUE 1
#define FALSE 0
//Synchronous Mode
#define SYNCH_OP 1
#define ASYNCH_OP 2
//AD Range
#define AD_B_10_V 1
#define AD_B_5_V 2
#define AD_B_2_5_V 3
#define AD_B_1_25_V 4
#define AD_B_0_625_V 5
#define AD_B_0_3125_V 6
#define AD_B_0_5_V 7
#define AD_B_0_05_V 8
#define AD_B_0_005_V 9
#define AD_B_1_V 10
#define AD_B_0_1_V 11
#define AD_B_0_01_V 12
#define AD_B_0_001_V 13
#define AD_U_20_V 14
#define AD_U_10_V 15
#define AD_U_5_V 16
#define AD_U_2_5_V 17
#define AD_U_1_25_V 18
#define AD_U_1_V 19
#define AD_U_0_1_V 20
#define AD_U_0_01_V 21
#define AD_U_0_001_V 22
//Clock Mode
#define TRIG_SOFTWARE 0
#define TRIG_INT_PACER 1
#define TRIG_EXT_STROBE 2
#define TRIG_HANDSHAKE 3
#define TRIG_CLK_10MHZ 4 //PCI-7300A
#define TRIG_CLK_20MHZ 5 //PCI-7300A
#define TRIG_DO_CLK_TIMER_ACK 6 //PCI-7300A Rev. B
#define TRIG_DO_CLK_10M_ACK 7 //PCI-7300A Rev. B
#define TRIG_DO_CLK_20M_ACK 8 //PCI-7300A Rev. B
//Virtual Sampling Rate for using external clock as the clock source
#define CLKSRC_EXT_SampRate 10000
/*-------- Constants for PCI-6208A/PCI-6308A/PCI-6308V -------------------*/
//Output Mode
#define P6208_CURRENT_0_20MA 0
#define P6208_CURRENT_4_20MA 3
#define P6208_CURRENT_5_25MA 1
#define P6308_CURRENT_0_20MA 0
#define P6308_CURRENT_4_20MA 3
#define P6308_CURRENT_5_25MA 1
//AO Setting
#define P6308V_AO_CH0_3 0
#define P6308V_AO_CH4_7 1
#define P6308V_AO_UNIPOLAR 0
#define P6308V_AO_BIPOLAR 1
/*-------- Constants for PCI-7200 --------------------*/
//InputMode
#define DI_WAITING 0x02
#define DI_NOWAITING 0x00
#define DI_TRIG_RISING 0x04
#define DI_TRIG_FALLING 0x00
#define IREQ_RISING 0x08
#define IREQ_FALLING 0x00
//Output Mode
#define OREQ_ENABLE 0x10
#define OREQ_DISABLE 0x00
#define OTRIG_HIGH 0x20
#define OTRIG_LOW 0x00
/*-------- Constants for PCI-7248/7296/7396 ---------------*/
//DIO Port Direction
#define INPUT_PORT 1
#define OUTPUT_PORT 2
//Channel & Port
#define Channel_P1A 0
#define Channel_P1B 1
#define Channel_P1C 2
#define Channel_P1CL 3
#define Channel_P1CH 4
#define Channel_P1AE 10
#define Channel_P1BE 11
#define Channel_P1CE 12
#define Channel_P2A 5
#define Channel_P2B 6
#define Channel_P2C 7
#define Channel_P2CL 8
#define Channel_P2CH 9
#define Channel_P2AE 15
#define Channel_P2BE 16
#define Channel_P2CE 17
#define Channel_P3A 10
#define Channel_P3B 11
#define Channel_P3C 12
#define Channel_P3CL 13
#define Channel_P3CH 14
#define Channel_P4A 15
#define Channel_P4B 16
#define Channel_P4C 17
#define Channel_P4CL 18
#define Channel_P4CH 19
#define Channel_P5A 20
#define Channel_P5B 21
#define Channel_P5C 22
#define Channel_P5CL 23
#define Channel_P5CH 24
#define Channel_P6A 25
#define Channel_P6B 26
#define Channel_P6C 27
#define Channel_P6CL 28
#define Channel_P6CH 29
//the following are used for PCI7396
#define Channel_P1 30
#define Channel_P2 31
#define Channel_P3 32
#define Channel_P4 33
#define Channel_P1E 34 //only used by DIO_PortConfig function
#define Channel_P2E 35 //only used by DIO_PortConfig function
#define Channel_P3E 36 //only used by DIO_PortConfig function
#define Channel_P4E 37 //only used by DIO_PortConfig function
/*-------- Constants for PCI-7300A -------------------*/
//Wait Status
#define P7300_WAIT_NO 0
#define P7300_WAIT_TRG 1
#define P7300_WAIT_FIFO 2
#define P7300_WAIT_BOTH 3
//Terminator control
#define P7300_TERM_OFF 0
#define P7300_TERM_ON 1
//DI control signals polarity for PCI-7300A Rev. B
#define P7300_DIREQ_POS 0x00000000L
#define P7300_DIREQ_NEG 0x00000001L
#define P7300_DIACK_POS 0x00000000L
#define P7300_DIACK_NEG 0x00000002L
#define P7300_DITRIG_POS 0x00000000L
#define P7300_DITRIG_NEG 0x00000004L
//DO control signals polarity for PCI-7300A Rev. B
#define P7300_DOREQ_POS 0x00000000L
#define P7300_DOREQ_NEG 0x00000008L
#define P7300_DOACK_POS 0x00000000L
#define P7300_DOACK_NEG 0x00000010L
#define P7300_DOTRIG_POS 0x00000000L
#define P7300_DOTRIG_NEG 0x00000020L
/*-------- Constants for PCI-7432/7433/7434 ---------------*/
#define PORT_DI_LOW 0
#define PORT_DI_HIGH 1
#define PORT_DO_LOW 0
#define PORT_DO_HIGH 1
#define P7432R_DO_LED 1
#define P7433R_DO_LED 0
#define P7434R_DO_LED 2
#define P7432R_DI_SLOT 1
#define P7433R_DI_SLOT 2
#define P7434R_DI_SLOT 0
/*-- Dual-Interrupt Source control for PCI-7248/96 & 7432/33 & 7230 & 8554 & 7396 &7256 ---*/
#define INT1_DISABLE -1 //INT1 Disabled
#define INT1_COS 0 //INT1 COS : only available for PCI-7396, PCI-7256
#define INT1_FP1C0 1 //INT1 by Falling edge of P1C0 : only available for PCI7248/96/7396
#define INT1_RP1C0_FP1C3 2 //INT1 by P1C0 Rising or P1C3 Falling : only available for PCI7248/96/7396
#define INT1_EVENT_COUNTER 3 //INT1 by Event Counter down to zero : only available for PCI7248/96/7396
#define INT1_EXT_SIGNAL 1 //INT1 by external signal : only available for PCI7432/7433/7230/8554
#define INT1_COUT12 1 //INT1 COUT12 : only available for PCI8554
#define INT1_CH0 1 //INT1 CH0 : only available for PCI7256
#define INT2_DISABLE -1 //INT2 Disabled
#define INT2_COS 0 //INT2 COS : only available for PCI-7396
#define INT2_FP2C0 1 //INT2 by Falling edge of P2C0 : only available for PCI7248/96/7396
#define INT2_RP2C0_FP2C3 2 //INT2 by P2C0 Rising or P2C3 Falling : only available for PCI7248/96/7396
#define INT2_TIMER_COUNTER 3 //INT2 by Timer Counter down to zero : only available for PCI7248/96/7396
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