showid.v

As the source code name, this code is writing in Verilog and also inside the folder there is a c cod

module 		showid(clk,reset,col,scan,up); 
input		clk,reset,up;
output		[31:0]scan;
output		[7:0]col;
reg		[31:0]scan;
reg		[7:0]col;
reg		[4:0]scan_choice;
reg		[7:0]nextState,state,word_choice,word;
reg		[4:0]delay;
reg 		[3:0]a;
parameter 		 ST00 = 5'b00000, ST01 = 5'b00001, ST02 = 5'b00010, ST03 = 5'b00011,
                	ST04 = 5'b00100, ST05 = 5'b00101, ST06 = 5'b00110, ST07 = 5'b00111,
                	ST08 = 5'b01000, ST09 = 5'b01001, ST10 = 5'b01010, ST11 = 5'b01011,
                	ST12 = 5'b01100, ST13 = 5'b01101, ST14 = 5'b01110, ST15 = 5'b01111,
                	ST16 = 5'b10000, ST17 = 5'b10001, ST18 = 5'b10010, ST19 = 5'b10011,
                	ST20 = 5'b10100, ST21 = 5'b10101, ST22 = 5'b10110, ST23 = 5'b10111,
                	ST24 = 5'b11000, ST25 = 5'b11001, ST26 = 5'b11010, ST27 = 5'b11011,
                	ST28 = 5'b11100, ST29 = 5'b11101, ST30 = 5'b11110, ST31 = 5'b11111;
//====================================================================================
always@(posedge clk)
begin
	if(reset == 1)
	begin	state = 0;
		col=8'b0;
		a=7;
		 end
 	else
	begin
		if(delay < 31)
			delay = delay + 1;
		else
		begin
			state = nextState;
			delay = 0;
		end
	end
end

//========== next state logic ==========
always@(state)
begin
	case(state)
        ST00:nextState = ST01;
        ST01:nextState = ST02;
        ST02:nextState = ST03;
        ST03:nextState = ST04;
        ST04:nextState = ST05;
        ST05:nextState = ST06;
        ST06:nextState = ST07;
        ST07:nextState = ST08;
	ST08:nextState = ST09;
	ST09:nextState = ST10;
       	ST10:nextState = ST11;
       	ST11:nextState = ST12;
       	ST12:nextState = ST13;
       	ST13:nextState = ST14;
       	ST14:nextState = ST15;
       	ST15:nextState = ST16;  
       	ST16:nextState = ST17; 
       	ST17:nextState = ST18;
       	ST18:nextState = ST19;
       	ST19:nextState = ST20;
       	ST20:nextState = ST21;
       	ST21:nextState = ST22;
       	ST22:nextState = ST23;
       	ST23:nextState = ST24;
       	ST24:nextState = ST25;
       	ST25:nextState = ST26;
       	ST26:nextState = ST27;
       	ST27:nextState = ST28;
       	ST28:nextState = ST29;
       	ST29:nextState = ST30;
       	ST30:nextState = ST31;
       	ST31:nextState = ST00;
	endcase

end
//=========== output logic =============
always@(posedge clk)
begin
	if(scan_choice < 31 && word_choice < 31 && up==1)
	begin
		scan_choice = scan_choice + 1;		
		word_choice = word_choice + 1;
	end		
	else if(scan_choice == 31 && word_choice == 31 && up==1)
	begin				
		scan_choice = 0;			
		word_choice = 0;		
	end	
	
	else if(scan_choice < 31 && up==0)
	begin
		scan_choice = scan_choice + 1;
		if(word_choice < 31 && up==0)
			word_choice = word_choice + 1;
		else
			word_choice = 0;
	end
	else
	begin
		word_choice = state;		//come to current state
		scan_choice = 0;			//in the begining,
	end	
	
	
	
	
	
end			
//=======================================	
always@(scan_choice or word_choice)
begin
	case(scan_choice) 
		0 :scan=32'b10000000000000000000000000000000;
		1 :scan=32'b01000000000000000000000000000000;
		2 :scan=32'b00100000000000000000000000000000;
		3 :scan=32'b00010000000000000000000000000000;
		4 :scan=32'b00001000000000000000000000000000;
		5 :scan=32'b00000100000000000000000000000000;
		6 :scan=32'b00000010000000000000000000000000;
		7 :scan=32'b00000001000000000000000000000000;
		8 :scan=32'b00000000100000000000000000000000;
		9 :scan=32'b00000000010000000000000000000000;
	 	10:scan=32'b00000000001000000000000000000000;
		11:scan=32'b00000000000100000000000000000000;
		12:scan=32'b00000000000010000000000000000000;
		13:scan=32'b00000000000001000000000000000000;
		14:scan=32'b00000000000000100000000000000000;
		15:scan=32'b00000000000000010000000000000000;
		16:scan=32'b00000000000000001000000000000000;
		17:scan=32'b00000000000000000100000000000000;
		18:scan=32'b00000000000000000010000000000000;
		19:scan=32'b00000000000000000001000000000000;
		20:scan=32'b00000000000000000000100000000000;
		21:scan=32'b00000000000000000000010000000000;
		22:scan=32'b00000000000000000000001000000000;
		23:scan=32'b00000000000000000000000100000000;
		24:scan=32'b00000000000000000000000010000000;
		25:scan=32'b00000000000000000000000001000000;
		26:scan=32'b00000000000000000000000000100000;
		27:scan=32'b00000000000000000000000000010000;
		28:scan=32'b00000000000000000000000000001000;
		29:scan=32'b00000000000000000000000000000100;
		30:scan=32'b00000000000000000000000000000010;
		31:scan=32'b00000000000000000000000000000001;
	endcase
	//==================================
	case(word_choice)
		0: word=8'b00000000;//1
		1: word=8'b01000001;
		2: word=8'b10000001;
		3: word=8'b11111111;
		4: word=8'b00000001;
		5: word=8'b00000001;	
		6: word=8'b00000000;
		7: word=8'b11110001;//5
		8: word=8'b10010001;
		9: word=8'b10010001;
		10:word=8'b10010001;
		11:word=8'b10010001;
		12:word=8'b10001110;
		13:word=8'b00000000;
		14:word=8'b00001100;//4
		15:word=8'b00010100;
		16:word=8'b00100100;
		17:word=8'b01000100;
		18:word=8'b11111111;
		19:word=8'b00000100;
		20:word=8'b00000000;
		21:word=8'b00001100;//4
		22:word=8'b00010100;
		23:word=8'b00100100;
		24:word=8'b01000100;
		25:word=8'b11111111;
		26:word=8'b00000100;//no data below
		27:word=8'b00000000;
		28:word=8'b00000000;
		29:word=8'b00000000;
		30:word=8'b00000000;
		31:word=8'b00000000;
		default:word=8'b00000000;		
	endcase	
	if(up==1)
	begin
	if(word_choice==31 && a>0)
	a=a-1;
	else if (a==0)
	a=7;
	else
	a=a;
	case(a)
	0:col={word[0],word[7],word[6],word[5],word[4],word[3],word[2],word[1]};
	1:col={word[1],word[0],word[7],word[6],word[5],word[4],word[3],word[2]};
	2:col={word[2],word[1],word[0],word[7],word[6],word[5],word[4],word[3]};
	3:col={word[3],word[2],word[1],word[0],word[7],word[6],word[5],word[4]};
	4:col={word[4],word[3],word[2],word[1],word[0],word[7],word[6],word[5]};
	5:col={word[5],word[4],word[3],word[2],word[1],word[0],word[7],word[6]};	
	6:col={word[6],word[5],word[4],word[3],word[2],word[1],word[0],word[7]};
	7:col=word;
	default:col=8'b00000000;
	endcase
	end
	else
	col=word;
	end
endmodule