project.sum

uPSD34xx Disk driver

***********************************************************************
                         PSDsoft Express Version 8.66
                         Summary of Design Assistant
***********************************************************************
PROJECT    : project                       DATE : 08/28/2008
DEVICE     : uPSD3434EV                    TIME : 14:23:56
MCU/DSP    : uPSD34XX    
***********************************************************************

Initial setting for Program and Data Space:
===========================================

  Main PSD flash memory will reside in this space at power-up:      Data Space Only
  Secondary PSD flash memory will reside in this space at power-up: Program Space Only

Pin Definitions:
================

Pin          Signal                    Pin
Name         Name                      Type
------------ ------------------------- ------------
pb7          pb7                       GP I/O mode 
pb6          pb6                       GP I/O mode 
pb5          pb5                       GP I/O mode 
pb4          pb4                       GP I/O mode 
pb3          pb3                       GP I/O mode 
pb2          pb2                       GP I/O mode 
pb1          pb1                       GP I/O mode 
pb0          pb0                       GP I/O mode 
pc7          pc7                       GP I/O mode 
tdo          tdo                       Dedicated JTAG - TDO
tdi          tdi                       Dedicated JTAG - TDI
pc2          pc2                       GP I/O mode 
tck          tck                       Dedicated JTAG - TCK
tms          tms                       Dedicated JTAG - TMS
pd1          RED_LED                   GP I/O mode 
ale          ale                       ALE output  
_psen        _psen                     Bus control output
_rd          _rd                       Bus control output
_wr          _wr                       Bus control output
p4.0         GREEN_LED                 GP I/O mode 
ad7          a7                        Data/Address line
ad6          a6                        Data/Address line
ad5          a5                        Data/Address line
ad4          a4                        Data/Address line
ad3          a3                        Data/Address line
ad2          a2                        Data/Address line
ad1          a1                        Data/Address line
ad0          a0                        Data/Address line
debug        JTAG_debug_pin            JTAG debug pin
USB+         USB_plus                  USB+ bus    
USB-         USB_minus                 USB- bus    
Xtal1        Xtal1                     Xtal1       
Xtal2        Xtal2                     Xtal2       
_Reset_In    _Reset_In                 Reset In    
Vref         VREF                      VREF input  

User defined nodes:
===================

None defined

Page Register settings:
=======================

pgr0 is used for paging
pgr1 is used for paging
pgr2 is used for paging
pgr3 is not used
pgr4 is not used
pgr5 is not used
pgr6 is not used
pgr7 is not used

Equations:
==========

rs0 = ((address >= ^h2000) & (address <= ^h3FFF));
csiop = ((address >= ^h7F00) & (address <= ^h7FFF));
fs0 = ((page == 0) & (address >= ^h8000) & (address <= ^hFFFF));
fs1 = ((page == 1) & (address >= ^h8000) & (address <= ^hFFFF));
fs2 = ((page == 2) & (address >= ^h8000) & (address <= ^hFFFF));
fs3 = ((page == 3) & (address >= ^h8000) & (address <= ^hFFFF));
fs4 = ((page == 4) & (address >= ^h8000) & (address <= ^hFFFF));
fs5 = ((page == 5) & (address >= ^h8000) & (address <= ^hFFFF));
fs6 = ((page == 6) & (address >= ^h8000) & (address <= ^hFFFF));
fs7 = ((page == 7) & (address >= ^h8000) & (address <= ^hFFFF));
csboot0 = ((address >= ^h0000) & (address <= ^h1FFF));