c8051f060.h

单片机开发软件KEIL

sbit CP0HYP1 =    0x8B ;  /* COMPARATOR 0 POSITIVE HYSTERISIS 1 */
sbit CP0HYP0 =    0x8A ;  /* COMPARATOR 0 POSITIVE HYSTERISIS 0 */
sbit CP0HYN1 =    0x89 ;  /* COMPARATOR 0 NEGATIVE HYSTERISIS 1 */
sbit CP0HYN0 =    0x88 ;  /* COMPARATOR 0 NEGATIVE HYSTERISIS 0 */

/* CPT1CN 0x88 */
sbit CP1EN =      0x8F ;  /* COMPARATOR 1 ENABLE */
sbit CP1OUT =     0x8E ;  /* COMPARATOR 1 OUTPUT */
sbit CP1RIF =     0x8D ;  /* COMPARATOR 1 RISING EDGE INTERRUPT */
sbit CP1FIF =     0x8C ;  /* COMPARATOR 1 FALLING EDGE INTERRUPT */
sbit CP1HYP1 =    0x8B ;  /* COMPARATOR 1 POSITIVE HYSTERISIS 1 */
sbit CP1HYP0 =    0x8A ;  /* COMPARATOR 1 POSITIVE HYSTERISIS 0 */
sbit CP1HYN1 =    0x89 ;  /* COMPARATOR 1 NEGATIVE HYSTERISIS 1 */
sbit CP1HYN0 =    0x88 ;  /* COMPARATOR 1 NEGATIVE HYSTERISIS 0 */

/* CPT2CN 0x88 */
sbit CP2EN =      0x8F ;  /* COMPARATOR 2 ENABLE */
sbit CP2OUT =     0x8E ;  /* COMPARATOR 2 OUTPUT */
sbit CP2RIF =     0x8D ;  /* COMPARATOR 2 RISING EDGE INTERRUPT */
sbit CP2FIF =     0x8C ;  /* COMPARATOR 2 FALLING EDGE INTERRUPT */
sbit CP2HYP1 =    0x8B ;  /* COMPARATOR 2 POSITIVE HYSTERISIS 1 */
sbit CP2HYP0 =    0x8A ;  /* COMPARATOR 2 POSITIVE HYSTERISIS 0 */
sbit CP2HYN1 =    0x89 ;  /* COMPARATOR 2 NEGATIVE HYSTERISIS 1 */
sbit CP2HYN0 =    0x88 ;  /* COMPARATOR 2 NEGATIVE HYSTERISIS 0 */

/* SCON0 0x98 */
sbit SM00 =       0x9F ;  /* UART 0 MODE 0 */
sbit SM10 =       0x9E ;  /* UART 0 MODE 1 */
sbit SM20 =       0x9D ;  /* UART 0 MULTIPROCESSOR EN */
sbit REN0 =       0x9C ;  /* UART 0 RX ENABLE */
sbit TB80 =       0x9B ;  /* UART 0 TX BIT 8 */
sbit RB80 =       0x9A ;  /* UART 0 RX BIT 8 */
sbit TI0 =        0x99 ;  /* UART 0 TX INTERRUPT FLAG */
sbit RI0 =        0x98 ;  /* UART 0 RX INTERRUPT FLAG */

/* SCON1 0x98 */
sbit S1MODE =     0x9F ;  /* UART 1 MODE */
sbit MCE1 =       0x9D ;  /* UART 1 MCE */
sbit REN1 =       0x9C ;  /* UART 1 RX ENABLE */
sbit TB81 =       0x9B ;  /* UART 1 TX BIT 8 */
sbit RB81 =       0x9A ;  /* UART 1 RX BIT 8 */
sbit TI1 =        0x99 ;  /* UART 1 TX INTERRUPT FLAG */
sbit RI1 =        0x98 ;  /* UART 1 RX INTERRUPT FLAG */

/* IE 0xA8 */
sbit EA =         0xAF ;  /* GLOBAL INTERRUPT ENABLE */
sbit ET2  =       0xAD ;  /* TIMER 2 INTERRUPT ENABLE */
sbit ES0  =       0xAC ;  /* UART0 INTERRUPT ENABLE */
sbit ET1 =        0xAB ;  /* TIMER 1 INTERRUPT ENABLE */
sbit EX1 =        0xAA ;  /* EXTERNAL INTERRUPT 1 ENABLE */
sbit ET0 =        0xA9 ;  /* TIMER 0 INTERRUPT ENABLE */
sbit EX0 =        0xA8 ;  /* EXTERNAL INTERRUPT 0 ENABLE */

/* IP 0xB8 */
sbit PT2 =        0xBD ;  /* TIMER 2 PRIORITY */
sbit PS =         0xBC ;  /* SERIAL PORT PRIORITY */
sbit PT1 =        0xBB ;  /* TIMER 1 PRIORITY */
sbit PX1 =        0xBA ;  /* EXTERNAL INTERRUPT 1 PRIORITY */
sbit PT0 =        0xB9 ;  /* TIMER 0 PRIORITY */
sbit PX0 =        0xB8 ;  /* EXTERNAL INTERRUPT 0 PRIORITY */

/* CAN0STA 0xC0 */
sbit BOFF =       0xC7 ;  /* BUS OFF STATUS */
sbit EWARN =      0xC6 ;  /* WARNING STATUS */
sbit EPASS =      0xC5 ;  /* ERROR PASSIVE */
sbit RXOK =       0xC4 ;  /* RECEIVED MESSAGE SUCCESSFULLY */
sbit TXOK =       0xC3 ;  /* TRANSMIT A MESSAGE SUCCESSFULLY */
sbit LEC2 =       0xC2 ;  /* LAST ERROR CODE BIT 2 */
sbit LEC1 =       0xC1 ;  /* LAST ERROR CODE BIT 1 */
sbit LEC0 =       0xC0 ;  /* LAST ERROR CODE BIT 0 */

/* SMB0CN 0xC0 */
sbit BUSY =       0xC7 ;  /* SMBUS 0 BUSY */
sbit ENSMB =      0xC6 ;  /* SMBUS 0 ENABLE */
sbit STA  =       0xC5 ;  /* SMBUS 0 START FLAG */
sbit STO =        0xC4 ;  /* SMBUS 0 STOP FLAG */
sbit SI =         0xC3 ;  /* SMBUS 0 INTERRUPT PENDING FLAG */
sbit AA =         0xC2 ;  /* SMBUS 0 ASSERT/ACKNOWLEDGE FLAG */
sbit SMBFTE =     0xC1 ;  /* SMBUS 0 FREE TIMER ENABLE */
sbit SMBTOE =     0xC0 ;  /* SMBUS 0 TIMEOUT ENABLE */

/* TMR2CN 0xC8 */
sbit TF2 =        0xCF ;  /* TIMER 2 OVERFLOW FLAG */
sbit EXF2 =       0xCE ;  /* TIMER 2 EXTERNAL FLAG */
sbit EXEN2 =      0xCB ;  /* TIMER 2 EXTERNAL ENABLE FLAG */
sbit TR2 =        0xCA ;  /* TIMER 2 ON/OFF CONTROL */
sbit CT2 =        0xC9 ;  /* TIMER 2 COUNTER SELECT */
sbit CPRL2 =      0xC8 ;  /* TIMER 2 CAPTURE SELECT */

/* TMR3CN 0xC8 */
sbit TF3 =        0xCF ;  /* TIMER 3 OVERFLOW FLAG */
sbit EXF3 =       0xCE ;  /* TIMER 3 EXTERNAL FLAG */
sbit EXEN3 =      0xCB ;  /* TIMER 3 EXTERNAL ENABLE FLAG */
sbit TR3 =        0xCA ;  /* TIMER 3 ON/OFF CONTROL */
sbit CT3 =        0xC9 ;  /* TIMER 3 COUNTER SELECT */
sbit CPRL3 =      0xC8 ;  /* TIMER 3 CAPTURE SELECT */

/* TMR4CN 0xC8 */
sbit TF4 =        0xCF ;  /* TIMER 4 OVERFLOW FLAG */
sbit EXF4 =       0xCE ;  /* TIMER 4 EXTERNAL FLAG */
sbit EXEN4 =      0xCB ;  /* TIMER 4 EXTERNAL ENABLE FLAG */
sbit TR4 =        0xCA ;  /* TIMER 4 ON/OFF CONTROL */
sbit CT4 =        0xC9 ;  /* TIMER 4 COUNTER SELECT */
sbit CPRL4 =      0xC8 ;  /* TIMER 4 CAPTURE SELECT */

/* PSW 0xD0 */
sbit CY =         0xD7 ;  /* CARRY FLAG */
sbit AC =         0xD6 ;  /* AUXILIARY CARRY FLAG */
sbit F0 =         0xD5 ;  /* USER FLAG 0 */
sbit RS1 =        0xD4 ;  /* REGISTER BANK SELECT 1 */
sbit RS0 =        0xD3 ;  /* REGISTER BANK SELECT 0 */
sbit OV =         0xD2 ;  /* OVERFLOW FLAG */
sbit F1 =         0xD1 ;  /* USER FLAG 1 */
sbit P =          0xD0 ;  /* ACCUMULATOR PARITY FLAG */

/* DMA0CN 0xD8 */
sbit DMA0EN =     0xDF ;  /* DMA 0 ENABLE */
sbit DMA0INT =    0xDE ;  /* DMA 0 OPERATIONS COMPLETE */
sbit DMA0MD =     0xDD ;  /* DMA 0 MODE SELECT */
sbit DMA0DE1 =    0xDC ;  /* ADC 0 DATA OVERFLOW ERROR */
sbit DMA0DE0 =    0xDB ;  /* ADC 1 DATA OVERFLOW ERROR */
sbit DMA0DOE =    0xDA ;  /* DMA 0 DATA OVERFLOW WARNINGENABLE */
sbit DMA0DO1 =    0xD9 ;  /* ADC 0 DATA OVERFLOW WARNING */
sbit DMA0DO0 =    0xD8 ;  /* ADC 1 DATA OVERFLOW WARNING */

/* PCA0CN 0xD8 */
sbit CF =         0xDF ;  /* PCA 0 COUNTER OVERFLOW FLAG */
sbit CR =         0xDE ;  /* PCA 0 COUNTER RUN CONTROL BIT */
sbit CCF5 =       0xDD ;  /* PCA 0 MODULE 5 INTERRUPT FLAG */
sbit CCF4 =       0xDC ;  /* PCA 0 MODULE 4 INTERRUPT FLAG */
sbit CCF3 =       0xDB ;  /* PCA 0 MODULE 3 INTERRUPT FLAG */
sbit CCF2 =       0xDA ;  /* PCA 0 MODULE 2 INTERRUPT FLAG */
sbit CCF1 =       0xD9 ;  /* PCA 0 MODULE 1 INTERRUPT FLAG */
sbit CCF0 =       0xD8 ;  /* PCA 0 MODULE 0 INTERRUPT FLAG */

/* ADC0CN 0xE8 */
sbit AD0EN  =     0xEF ;  /* ADC 0 ENABLE */
sbit AD0TM =      0xEE ;  /* ADC 0 TRACK MODE */
sbit AD0INT =     0xED ;  /* ADC 0 EOC INTERRUPT FLAG */
sbit AD0BUSY =    0xEC ;  /* ADC 0 BUSY FLAG */
sbit AD0CM1   =   0xEB ;  /* ADC 0 CONVERT START MODE BIT 1 */
sbit AD0CM0 =     0xEA ;  /* ADC 0 CONVERT START MODE BIT 0 */
sbit AD0WINT =    0xE9 ;  /* ADC 0 WINDOW INTERRUPT FLAG */

/* ADC1CN 0xE8 */
sbit AD1EN  =     0xEF ;  /* ADC 1 ENABLE */
sbit AD1TM =      0xEE ;  /* ADC 1 TRACK MODE */
sbit AD1INT =     0xED ;  /* ADC 1 EOC INTERRUPT FLAG */
sbit AD1BUSY =    0xEC ;  /* ADC 1 BUSY FLAG */
sbit AD1CM2   =   0xEB ;  /* ADC 1 CONVERT START MODE BIT 2 */
sbit AD1CM1 =     0xEA ;  /* ADC 1 CONVERT START MODE BIT 1 */
sbit AD1CM0 =     0xE9 ;  /* ADC 1 CONVERT START MODE BIT 0 */

/* ADC2CN 0xE8 */
sbit AD2EN  =     0xEF ;  /* ADC 2 ENABLE */
sbit AD2TM =      0xEE ;  /* ADC 2 TRACK MODE */
sbit AD2INT =     0xED ;  /* ADC 2 EOC INTERRUPT FLAG */
sbit AD2BUSY =    0xEC ;  /* ADC 2 BUSY FLAG */
sbit AD2CM1   =   0xEB ;  /* ADC 2 CONVERT START MODE BIT 1 */
sbit AD2CM0 =     0xEA ;  /* ADC 2 CONVERT START MODE BIT 0 */
sbit AD2WINT =    0xE9 ;  /* ADC 2 WINDOW INTERRUPT FLAG */
sbit AD2LJST =    0xE8 ;  /* ADC 2 LEFT JUSTIFY DATA BIT */

/* DMA0CF 0xF8 */
sbit DMA0HLT =    0xFF ;  /* DMA 0 HALT OFF-CHIP XRAM ENABLE */
sbit DMA0XBY =    0xFE ;  /* DMA 0 XRAM BUSY */
sbit DMA0CIE =    0xFB ;  /* DMA 0 COUNTER OVERFLOW ENABLE */
sbit DMA0CI =     0xFA ;  /* DMA 0 COUNTER OVERFLOW */
sbit DMA0EOE =    0xF9 ;  /* DMA 0 END OF OPERATION ENABLE */
sbit DMA0EO =     0xF8 ;  /* DMA 0 END OF OPERATION */

/* SPI0CN 0xF8 */
sbit SPIF =       0xFF ;  /* SPI 0 INTERRUPT FLAG */
sbit WCOL =       0xFE ;  /* SPI 0 WRITE COLLISION FLAG */
sbit MODF =       0xFD ;  /* SPI 0 MODE FAULT FLAG */
sbit RXOVRN =     0xFC ;  /* SPI 0 RX OVERRUN FLAG */
sbit NSSMD1 =     0xFB ;  /* SPI 0 SLAVE SELECT MODE 1 */
sbit NSSMD0 =     0xFA ;  /* SPI 0 SLAVE SELECT MODE 0 */
sbit TXBMT =      0xF9 ;  /* SPI 0 TX BUFFER EMPTY FLAG */
sbit SPIEN =      0xF8 ;  /* SPI 0 SPI ENABLE */


/* SFR PAGE DEFINITIONS */

#define CONFIG_PAGE       0x0F    /* SYSTEM AND PORT CONFIGURATION PAGE */
#define LEGACY_PAGE       0x00    /* LEGACY SFR PAGE */
#define TIMER01_PAGE      0x00    /* TIMER 0 AND TIMER 1 */
#define CPT0_PAGE         0x01    /* COMPARATOR 0 */
#define CPT1_PAGE         0x02    /* COMPARATOR 1 */
#define CPT2_PAGE         0x03    /* COMPARATOR 2 */
#define UART0_PAGE        0x00    /* UART 0 */
#define UART1_PAGE        0x01    /* UART 1 */
#define SPI0_PAGE         0x00    /* SPI 0 */
#define EMI0_PAGE         0x00    /* EXTERNAL MEMORY INTERFACE */
#define ADC0_PAGE         0x00    /* ADC 0 */
#define ADC1_PAGE         0x01    /* ADC 1 */
#define ADC2_PAGE         0x02    /* ADC 2 */
#define SMB0_PAGE         0x00    /* SMBUS 0 */
#define TMR2_PAGE         0x00    /* TIMER 2 */
#define TMR3_PAGE         0x01    /* TIMER 3 */
#define TMR4_PAGE         0x02    /* TIMER 4 */
#define DAC0_PAGE         0x00    /* DAC 0 */
#define DAC1_PAGE         0x01    /* DAC 1 */
#define PCA0_PAGE         0x00    /* PCA 0 */
#define DMA0_PAGE         0x03    /* DMA 0 */
#define CAN0_PAGE         0x01    /* CAN 0 */