rtcodeccomm.cpp

realtek562x系列驱动源码。wince

			//Set mic1 boost to 40DB
			case BOOST_40DB:

				bRetVal=WriteCodecRegMask(RT_MICROPHONE_CTRL,MIC1_BOOST_CONTROL_40DB,MIC1_BOOST_CONTROL_MASK);	

			break;

			default:
				bRetVal=FALSE;
				
		}
	}
	else if(Mic==MIC2)
	{
		switch(BoostType)
		{
			//Bypass mic2 boost
			case BOOST_BYPASS:

				bRetVal=WriteCodecRegMask(RT_MICROPHONE_CTRL,MIC2_BOOST_CONTROL_BYPASS,MIC2_BOOST_CONTROL_MASK);

			break;
			//Set mic2 boost to 20DB
			case BOOST_20DB:

				bRetVal=WriteCodecRegMask(RT_MICROPHONE_CTRL,MIC2_BOOST_CONTROL_20DB,MIC2_BOOST_CONTROL_MASK);

			break;
			//Set mic2 boost to 30DB
			case BOOST_30DB:

				bRetVal=WriteCodecRegMask(RT_MICROPHONE_CTRL,MIC2_BOOST_CONTROL_30DB,MIC2_BOOST_CONTROL_MASK);

			break;
			//Set mic2 boost to 40DB
			case BOOST_40DB:

				bRetVal=WriteCodecRegMask(RT_MICROPHONE_CTRL,MIC2_BOOST_CONTROL_40DB,MIC2_BOOST_CONTROL_MASK);

			break;

		  default:
			bRetVal=FALSE;
		}	
	}

	return 	bRetVal;
}
#if USE_I2S_INTERFACE
//*****************************************************************************
//
//function:Setting the main I2S sample rate clock 
//
//Intel MainstoneII's I2S_SYSCLK generate a frequency between 2MHz~12.2MHz
//So the MCLK equal 256 fs
//
//*****************************************************************************
BOOL RT_CodecComm::I2S_Codec_SR_Ctrl(void)
{
	BOOL bRetVal=FALSE;
			
	//256fs
	//Set DA WCLK div 64
	//Set AD WCLK div 64,div1 equal to 8,div2 equal to 8
	//Set SCLK div 4,div1 equal to 1,div2 equal to 4
	bRetVal=WriteCodecRegMask(RT_STEREO_DAC_CLK_CTRL1,
							  (STEREO_DA_WCLK_DIV_64  	|
							   STEREO_AD_WCLK_DIV2_8	|
							   STEREO_AD_WCLK_DIV1_8  |										
  							   STEREO_SCLK_DIV2_4		|
							   STEREO_SCLK_DIV1_1	
								),
							  (STEREO_DA_WCLK_DIV_MASK 	|
							   STEREO_AD_WCLK_DIV2_MASK |
							   STEREO_AD_WCLK_DIV1_MASK |			
							   STEREO_SCLK_DIV2_MASK	|
							   STEREO_SCLK_DIV1_MASK	   		
								)	
							);

	
	//256fs
	//Stereo AD filter Select 128x
	//Set AD filter div 2,div1 equal to 1,div2 equal to 2
	//Stereo DA filter Select 128x
	//Set DA filter div 2,div1 equal to 1,div2 equal to 2
	bRetVal=WriteCodecRegMask(RT_STEREO_DAC_CLK_CTRL2,
							  (STEREO_AD_64OSR_SEL_128X  	|								
							   STEREO_AD_FILTER_DIV2_2		|
			   				   STEREO_AD_FILTER_DIV1_1		|		
			   				   STEREO_DA_64OSR_SEL_128X		|
			   				   STEREO_DA_FILTER_DIV2_2		|
							   STEREO_DA_FILTER_DIV1_1									
								),
			  				  (STEREO_AD_64OSR_SEL_MASK	 	|	
			   				   STEREO_AD_FILTER_DIV2_MASK	|
			   				   STEREO_AD_FILTER_DIV1_MASK	|
			   				   STEREO_DA_64OSR_SEL_MASK		|
							   STEREO_DA_FILTER_DIV2_MASK	|	
							   STEREO_DA_FILTER_DIV1_MASK
			   				   )	
							);	
	
	
	return bRetVal;
}

#endif
//*****************************************************************************
//
//function:Depop of HP Out
//
//*****************************************************************************
BOOL RT_CodecComm::DepopForHP(DEPOP_MODE Depop_mode)
{
	BOOL bRetVal=FALSE;	
	ShadowWriteCodec(RT_POWERDOWN_CTRL_STAT, 0);//power on all PR bit
	bRetVal=WriteCodecRegMask(RT_PWR_MANAG_ADD1,PWR_MAIN_BIAS,PWR_MAIN_BIAS);//enable main BIAS
	bRetVal=WriteCodecRegMask(RT_PWR_MANAG_ADD2,PWR_MIXER_VREF,PWR_MIXER_VREF);//enable Vref
	bRetVal=WriteCodecRegMask(RT_PWR_MANAG_ADD3,PWR_HP_L_OUT | PWR_HP_R_OUT,PWR_HP_L_OUT | PWR_HP_R_OUT);//enable Amp of HP_R and HP_L 

	DelayMSTime(2000);//delay 2 seconds

	bRetVal=WriteCodecRegMask(RT_PWR_MANAG_ADD1,PWR_HI_R_LOAD_HP,PWR_HI_R_LOAD_HP);	//De-pop Disable

	return bRetVal;

}
//*****************************************************************************
//
//function AudioOutEnable:Mute/Unmute audio out channel
//							WavOutPath:output channel
//							Mute :Mute/Unmute output channel											
//
//*****************************************************************************

BOOL RT_CodecComm::AudioOutEnable(WAVOUT_PATH WavOutPath,BOOL Mute)
{
	BOOL RetVal=FALSE;	

	if(Mute)
	{
		switch(WavOutPath)
		{
			case RT_WAVOUT_PATH_ALL:

				RetVal=WriteCodecRegMask(RT_SPEAKER_OUT_VOL,RT_L_MUTE|RT_R_MUTE,RT_L_MUTE|RT_R_MUTE);	//Mute Speaker right/left channel
				RetVal=WriteCodecRegMask(RT_HP_OUT_VOL,RT_L_MUTE|RT_R_MUTE,RT_L_MUTE|RT_R_MUTE);	//Mute headphone right/left channel
				RetVal=WriteCodecRegMask(RT_PHONEIN_MONO_OUT_VOL,RT_R_MUTE,RT_R_MUTE);				//Mute Mono channel
				RetVal=WriteCodecRegMask(RT_STEREO_DAC_VOL,RT_M_HP_MIXER|RT_M_SPK_MIXER|RT_M_MONO_MIXER
															  ,RT_M_HP_MIXER|RT_M_SPK_MIXER|RT_M_MONO_MIXER);	//Mute DAC to HP,Speaker,Mono Mixer
		
			break;
		
			case RT_WAVOUT_PATH_HP:

				RetVal=WriteCodecRegMask(RT_HP_OUT_VOL,RT_L_MUTE|RT_R_MUTE,RT_L_MUTE|RT_R_MUTE);	//Mute headphone right/left channel
					
			break;

			case RT_WAVOUT_PATH_SPK:
				
				RetVal=WriteCodecRegMask(RT_SPEAKER_OUT_VOL,RT_L_MUTE|RT_R_MUTE,RT_L_MUTE|RT_R_MUTE);	//Mute Speaker right/left channel			

			break;
			

			case RT_WAVOUT_PATH_MONO:

				RetVal=WriteCodecRegMask(RT_PHONEIN_MONO_OUT_VOL,RT_R_MUTE,RT_R_MUTE);	//Mute MonoOut channel		

			break;

			case RT_WAVOUT_PATH_DAC:

				RetVal=WriteCodecRegMask(RT_STEREO_DAC_VOL,RT_M_HP_MIXER|RT_M_SPK_MIXER|RT_M_MONO_MIXER
															  ,RT_M_HP_MIXER|RT_M_SPK_MIXER|RT_M_MONO_MIXER);	//Mute DAC to HP,Speaker,Mono Mixer				
			break;

			default:

				return FALSE;

		}
	}
	else
	{
		switch(WavOutPath)
		{

			case RT_WAVOUT_PATH_ALL:

				RetVal=WriteCodecRegMask(RT_SPEAKER_OUT_VOL		,0,RT_L_MUTE|RT_R_MUTE);	//Mute Speaker right/left channel
				RetVal=WriteCodecRegMask(RT_HP_OUT_VOL 		,0,RT_L_MUTE|RT_R_MUTE);	//Mute headphone right/left channel
				RetVal=WriteCodecRegMask(RT_PHONEIN_MONO_OUT_VOL,0,RT_L_MUTE|RT_R_MUTE);	//Mute Mono channel
				RetVal=WriteCodecRegMask(RT_STEREO_DAC_VOL	,0,RT_M_HP_MIXER|RT_M_SPK_MIXER|RT_M_MONO_MIXER);	//Mute DAC to HP,Speaker,Mono Mixer
		
			break;
		
			case RT_WAVOUT_PATH_HP:

				RetVal=WriteCodecRegMask(RT_HP_OUT_VOL,0,RT_L_MUTE|RT_R_MUTE);	//unMute headphone right/left channel
					
			break;

			case RT_WAVOUT_PATH_SPK:
				
				RetVal=WriteCodecRegMask(RT_SPEAKER_OUT_VOL,0,RT_L_MUTE|RT_R_MUTE);	//unMute Speaker right/left channel			

			break;			

			case RT_WAVOUT_PATH_MONO:

				RetVal=WriteCodecRegMask(RT_PHONEIN_MONO_OUT_VOL,0,RT_R_MUTE);	//unMute MonoOut channel		

			break;

			case RT_WAVOUT_PATH_DAC:

				RetVal=WriteCodecRegMask(RT_STEREO_DAC_VOL,0,RT_M_HP_MIXER|RT_M_SPK_MIXER|RT_M_MONO_MIXER);	//unMute DAC to HP,Speaker,Mono Mixer

			default:
				return FALSE;
		}

	}
	
	return RetVal;
}

//*****************************************************************************
//
//function:hardware EQ configuration
//
//*****************************************************************************
BOOL RT_CodecComm::EnableHwEq(HW_EQ_PRESET_TYPE Hw_Eq_Type,BOOL HwEqEnable)
{
	BOOL bRetVal=TRUE;
	int HwEqIndex;
	
	if(m_WaveOutSampleRate==KHZ48_000)
	{
		HwEq_Preset=HwEq_Preset_48k;
	}
	else 
	{
		HwEq_Preset=HwEq_Preset_44k;
	}
	

	if(HwEqEnable)
	{

		//Disable HW EQ setting
		bRetVal=WriteCodecAdvanceMask(HW_EQ_CONTROL,0,ENABLE_HW_EQ_BLOCK | ENABLE_HW_EQ_HPF | ENABLE_HW_EQ_BP3 | ENABLE_HW_EQ_BP2 | ENABLE_HW_EQ_BP1 | ENABLE_HW_EQ_LPF);

	
		//setting HW EQ Coefficient
		for(HwEqIndex=HW_EQ_LP0_A1;HwEqIndex<=HW_EQ_HP4_H0;HwEqIndex++)
		{			

			if(!WriteCodecAdvance((EXT_CODEC_INDEX)HwEqIndex,HwEq_Preset[Hw_Eq_Type].EqValue[HwEqIndex]))
			{
				bRetVal=FALSE;

				return bRetVal;
			}	
		}

		//enable Hardware EQ setting
		if(!WriteCodecAdvance(HW_EQ_CONTROL,HwEq_Preset[Hw_Eq_Type].HwEQCtrl))
			{
				bRetVal=FALSE;

				return bRetVal;
			}

		return bRetVal;	
	}
	else
	{
		//Disable HW EQ setting
		bRetVal=WriteCodecAdvanceMask(HW_EQ_CONTROL,0,ENABLE_HW_EQ_BLOCK | ENABLE_HW_EQ_HPF | ENABLE_HW_EQ_BP3 | ENABLE_HW_EQ_BP2 | ENABLE_HW_EQ_BP1 | ENABLE_HW_EQ_LPF);
			
		return bRetVal;
	}
}

//*****************************************************************************
//
//function:Change audio codec power status
//
//*****************************************************************************

BOOL RT_CodecComm::ChangeCodecPowerStatus(POWER_STATE power_state)
{
	unsigned short int PowerDownState=0;

	switch(power_state)
	{
		case POWER_STATE_D0:			//FULL ON-----power on all power

			ShadowWriteCodec(RT_POWERDOWN_CTRL_STAT,PowerDownState);
			ShadowWriteCodec(RT_PWR_MANAG_ADD1,~PowerDownState);
			ShadowWriteCodec(RT_PWR_MANAG_ADD2,~PowerDownState);
			ShadowWriteCodec(RT_PWR_MANAG_ADD3,~PowerDownState);

		break;	

		case POWER_STATE_D1:		//LOW ON-----
																																			
			WriteCodecRegMask(RT_PWR_MANAG_ADD1,PWR_DAC_REF | PWR_MAIN_BIAS | PWR_MIC_BIAS1  | PWR_HI_R_LOAD_HP		
											   ,PWR_DAC_REF | PWR_MAIN_BIAS | PWR_MIC_BIAS1  | PWR_HI_R_LOAD_HP);	
#if USE_I2S_INTERFACE

			WriteCodecRegMask(RT_PWR_MANAG_ADD1,PWR_MAIN_I2S,PWR_MAIN_I2S);
#endif											   
											
			WriteCodecRegMask(RT_PWR_MANAG_ADD2,PWR_R_ADC_REC_MIXER | PWR_L_ADC_REC_MIXER | PWR_R_HP_MIXER | PWR_L_HP_MIXER | PWR_R_ADC_CLK_GAIN | PWR_L_ADC_CLK_GAIN | 
												PWR_R_DAC_CLK | PWR_L_DAC_CLK | PWR_MIXER_VREF | PWR_CLASS_AB
											   ,PWR_R_ADC_REC_MIXER | PWR_L_ADC_REC_MIXER | PWR_R_HP_MIXER | PWR_L_HP_MIXER | PWR_R_ADC_CLK_GAIN | PWR_L_ADC_CLK_GAIN | 
												PWR_R_DAC_CLK | PWR_L_DAC_CLK | PWR_MIXER_VREF | PWR_CLASS_AB);

			WriteCodecRegMask(RT_PWR_MANAG_ADD3,PWR_MIC1_BOOST | PWR_MIC1_VOL_CTRL | PWR_SPK_R_OUT | PWR_SPK_L_OUT |PWR_HP_R_OUT | PWR_HP_L_OUT |
											    PWR_SPK_RN_OUT | PWR_SPK_LN_OUT
											   ,PWR_MIC1_BOOST | PWR_MIC1_VOL_CTRL | PWR_SPK_R_OUT | PWR_SPK_L_OUT |PWR_HP_R_OUT | PWR_HP_L_OUT	|
											    PWR_SPK_RN_OUT | PWR_SPK_LN_OUT);								
		break;

		case POWER_STATE_D1_PLAYBACK:	//Low on of Playback

			WriteCodecRegMask(RT_PWR_MANAG_ADD1,PWR_DAC_REF | PWR_HI_R_LOAD_HP,PWR_DAC_REF | PWR_HI_R_LOAD_HP);
											
			WriteCodecRegMask(RT_PWR_MANAG_ADD2,PWR_R_HP_MIXER | PWR_L_HP_MIXER | PWR_R_DAC_CLK | PWR_L_DAC_CLK  | PWR_CLASS_AB
											   ,PWR_R_HP_MIXER | PWR_L_HP_MIXER | PWR_R_DAC_CLK | PWR_L_DAC_CLK  | PWR_CLASS_AB);

			WriteCodecRegMask(RT_PWR_MANAG_ADD3,PWR_SPK_R_OUT | PWR_SPK_L_OUT | PWR_HP_R_OUT | PWR_HP_L_OUT	|
											    PWR_SPK_RN_OUT | PWR_SPK_LN_OUT
											   ,PWR_SPK_R_OUT | PWR_SPK_L_OUT | PWR_HP_R_OUT | PWR_HP_L_OUT	|
											    PWR_SPK_RN_OUT | PWR_SPK_LN_OUT);	

		break;

		case POWER_STATE_D1_RECORD:	//Low on of Record

			WriteCodecRegMask(RT_PWR_MANAG_ADD1,PWR_MIC_BIAS1,PWR_MIC_BIAS1);
											//
			WriteCodecRegMask(RT_PWR_MANAG_ADD2,PWR_R_ADC_REC_MIXER | PWR_L_ADC_REC_MIXER | PWR_R_ADC_CLK_GAIN | PWR_L_ADC_CLK_GAIN												
											   ,PWR_R_ADC_REC_MIXER | PWR_L_ADC_REC_MIXER | PWR_R_ADC_CLK_GAIN | PWR_L_ADC_CLK_GAIN);

			WriteCodecRegMask(RT_PWR_MANAG_ADD3,PWR_MIC1_BOOST | PWR_MIC1_VOL_CTRL,PWR_MIC1_BOOST | PWR_MIC1_VOL_CTRL);	
		
		break;

		case POWER_STATE_D2:		//STANDBY----
											//																								
			WriteCodecRegMask(RT_PWR_MANAG_ADD1,0,PWR_DAC_REF | PWR_MAIN_BIAS | PWR_MIC_BIAS1 | PWR_HI_R_LOAD_HP);
											//
			WriteCodecRegMask(RT_PWR_MANAG_ADD2,0,PWR_R_ADC_REC_MIXER | PWR_L_ADC_REC_MIXER | PWR_R_HP_MIXER | PWR_L_HP_MIXER | PWR_R_ADC_CLK_GAIN | PWR_L_ADC_CLK_GAIN | 
												PWR_R_DAC_CLK | PWR_L_DAC_CLK | PWR_MIXER_VREF | PWR_CLASS_AB);

			WriteCodecRegMask(RT_PWR_MANAG_ADD3,0,PWR_MIC1_BOOST | PWR_MIC1_VOL_CTRL | PWR_SPK_R_OUT | PWR_SPK_L_OUT |PWR_HP_R_OUT | PWR_HP_L_OUT |
											    PWR_SPK_RN_OUT | PWR_SPK_LN_OUT);	
				
		break;

		case POWER_STATE_D2_PLAYBACK:	//STANDBY of playback

			WriteCodecRegMask(RT_PWR_MANAG_ADD1,0,PWR_DAC_REF | PWR_HI_R_LOAD_HP);
											//
			WriteCodecRegMask(RT_PWR_MANAG_ADD2,0,PWR_R_HP_MIXER | PWR_L_HP_MIXER | PWR_R_DAC_CLK | PWR_L_DAC_CLK  | PWR_CLASS_AB);

			WriteCodecRegMask(RT_PWR_MANAG_ADD3,0,PWR_SPK_R_OUT | PWR_SPK_L_OUT | PWR_HP_R_OUT | PWR_HP_L_OUT |
											    PWR_SPK_RN_OUT | PWR_SPK_LN_OUT);

		break;

		case POWER_STATE_D2_RECORD:		//STANDBY of record

			WriteCodecRegMask(RT_PWR_MANAG_ADD1,0,PWR_MIC_BIAS1);
											//
			WriteCodecRegMask(RT_PWR_MANAG_ADD2,0,PWR_R_ADC_REC_MIXER | PWR_L_ADC_REC_MIXER | PWR_R_ADC_CLK_GAIN | PWR_L_ADC_CLK_GAIN);

			WriteCodecRegMask(RT_PWR_MANAG_ADD3,0,PWR_MIC1_BOOST | PWR_MIC1_VOL_CTRL);	

		break;		

		case POWER_STATE_D3:		//SLEEP
		case POWER_STATE_D4:		//OFF----power off all power,include PR0,PR1,PR3,PR4,PR5,PR6,EAPD,and addition power managment
			ShadowWriteCodec(RT_PWR_MANAG_ADD1,PowerDownState);
			ShadowWriteCodec(RT_PWR_MANAG_ADD2,PowerDownState);
			ShadowWriteCodec(RT_PWR_MANAG_ADD3,PowerDownState);

			PowerDownState=RT_PWR_PR0 | RT_PWR_PR1 | RT_PWR_PR2 | RT_PWR_PR3 /*| RT_PWR_PR4*/ | RT_PWR_PR5 | RT_PWR_PR6 | RT_PWR_PR7; 		
			ShadowWriteCodec(RT_POWERDOWN_CTRL_STAT,PowerDownState);		
				
		break;	

		default:

		break;
	}

	return TRUE;	
}

//*****************************************************************************
//
//function:Process private message of codec
//
//*****************************************************************************

DWORD RT_CodecComm::ProcessAudioMessage(UINT uMsg,DWORD dwParam1,DWORD dwParam2)
{
	
	S_3D_SPATIAL s3d;

   switch (uMsg)
    {
		
		//To enable/Disable and config HW EQ
        case WPDM_PRIVATE_CONFIG_HW_EQ:
		
			if(!EnableHwEq((HW_EQ_PRESET_TYPE)dwParam1,(BYTE)dwParam2))
				return(MMSYSERR_ERROR);

            return (MMSYSERR_NOERROR);
            break;

		//To enable 3D Spatial function
	   case WPDM_PRIVATE_ENABLE_3D:
			
			s3d.bEnable3D=TRUE;
			s3d.b3D_Gain=(BYTE)dwParam1;
			s3d.b3D_Ratio=(BYTE)dwParam2;
			

			if(!Enable_3D_Spatial(s3d))
				return(MMSYSERR_ERROR);

            return (MMSYSERR_NOERROR);		

			break;
		
		//To disable 3D Spatial	function
	   case WPDM_PRIVATE_DISABLE_3D:
			
			s3d.bEnable3D=FALSE;
			s3d.b3D_Gain=(BYTE)dwParam1;
			s3d.b3D_Ratio=(BYTE)dwParam2;				

			if(!Enable_3D_Spatial(s3d))
				return(MMSYSERR_ERROR);

            return (MMSYSERR_NOERROR);		

			break;

		//To enable/disable pseudo stereo function	
	   case WPDM_PRIVATE_CONFIG_PSEUDO:
			
			if(!Enable_Pseudo_Stereo((BYTE)dwParam1))
				return(MMSYSERR_ERROR);

            return (MMSYSERR_NOERROR);

			break;
		
		//To enable/disable Auto volume control	function
	   case WPDM_PRIVATE_CONFIG_AVC:		
		
			if(!EnableAVC((BYTE)dwParam1))
				return(MMSYSERR_ERROR);

            return (MMSYSERR_NOERROR);

			break;
	}
	
	return(MMSYSERR_NOTSUPPORTED);
}