rtcodeccomm.cpp

realtek562x系列驱动源码。wince

	}

	return bRetVal;
}

//*****************************************************************************
//
//function:Enable/Disable Pseudio Stereo function(use this function,enable Main Spatial function first)
//
//*****************************************************************************
BOOL RT_CodecComm::Enable_Pseudo_Stereo(BOOL Enable_Pseudo_Stereo)
{
	BOOL bRetVal=FALSE;

	if(Enable_Pseudo_Stereo)
	{
		Enable_Main_Spatial(TRUE);
		Enable_All_Pass_Filter(TRUE);
		//Enable Pseudio stereo 
		bRetVal=WriteCodecRegMask(RT_PSEDUEO_SPATIAL_CTRL,PSEUDO_STEREO_EN,PSEUDO_STEREO_EN);
	}
	else
	{
		Enable_All_Pass_Filter(FALSE);	
		//Disable Pseudio stereo
		bRetVal=WriteCodecRegMask(RT_PSEDUEO_SPATIAL_CTRL,0,PSEUDO_STEREO_EN);
		
	}

	return bRetVal;
}

//*****************************************************************************
//
//function:Enable/Disable All Pass Filter function(use this function,enable Main Spatial function first)
//
//*****************************************************************************
BOOL RT_CodecComm::Enable_All_Pass_Filter(BOOL Enable_APF)
{
	BOOL bRetVal=FALSE;
	
	if(Enable_APF)
	{
		Enable_Main_Spatial(TRUE);

		//set parameter a1 support 48K	
		if(KHZ48_000==m_WaveOutSampleRate)
		{				
			bRetVal=WriteCodecRegMask(RT_PSEDUEO_SPATIAL_CTRL,APF_FOR_48K,APF_MASK);
		}
		else if(KHZ44_100==m_WaveOutSampleRate)//set parameter a1 support 44.1K	
		{
			bRetVal=WriteCodecRegMask(RT_PSEDUEO_SPATIAL_CTRL,APF_FOR_44_1K,APF_MASK);
		}
		else
		{
			//set parameter a1 support 32k and lower	
			bRetVal=WriteCodecRegMask(RT_PSEDUEO_SPATIAL_CTRL,APF_FOR_32K,APF_MASK);
		}	

		//Enable All Pass Filter 
		bRetVal=WriteCodecRegMask(RT_PSEDUEO_SPATIAL_CTRL,ALL_PASS_FILTER_EN,ALL_PASS_FILTER_EN);
	}
	else
	{
		//Disable All Pass Filter
		bRetVal=WriteCodecRegMask(RT_PSEDUEO_SPATIAL_CTRL,0,ALL_PASS_FILTER_EN);
	}

	return bRetVal;
}
//*****************************************************************************
//
//function:Enable/Disable ADC input source control
//
//*****************************************************************************
BOOL RT_CodecComm::Enable_ADC_Input_Source(ADC_INPUT_MIXER_CTRL ADC_Input_Sour,BOOL Enable)
{
	BOOL bRetVal=FALSE;
	
	if(Enable)
	{
		//Enable ADC source 
		bRetVal=WriteCodecRegMask(RT_ADC_RECORD_MIXER,0,ADC_Input_Sour);
	}
	else
	{
		//Disable ADC source		
		bRetVal=WriteCodecRegMask(RT_ADC_RECORD_MIXER,ADC_Input_Sour,ADC_Input_Sour);
	}

	return bRetVal;
}

//*****************************************************************************
//
//function:Enable/Disable Auto Volume Control function
//
//*****************************************************************************
BOOL RT_CodecComm::EnableAVC(BOOL Enable_AVC)
{
	BOOL bRetVal=FALSE;
	
	if(Enable_AVC)
	{			
		//enable AVC target select,if use voice interface,please use one channel 
		WriteCodecRegMask(RT_MISC_CTRL,AVC_TARTGET_SEL_BOTH,AVC_TARTGET_SEL_MASK); 

		//Enable AVC function
		bRetVal=WriteCodecAdvanceMask(AVC_CTRL_REG0,ENABLE_AVC_GAIN_CTRL,ENABLE_AVC_GAIN_CTRL);
		
	}
	else
	{
		//Disable AVC function
		bRetVal=WriteCodecAdvanceMask(AVC_CTRL_REG0,0,ENABLE_AVC_GAIN_CTRL);
	}

	return bRetVal;
}
//*****************************************************************************
//
//function:Config Vmid Control function
//
//			 AVDD  		HPVDD 	SPKVDD	SPK AB		SPK D		HP		
//case 1	 3.3V		3.3V	3.3V	1.00 Vdd	1.00 Vdd	1.00 Vdd	
//case 2	 3.3V		3.3V	4.2V	1.25 Vdd	1.25 Vdd	1.00 Vdd
//case 3	 2.5V		3.3V	3.3V	1.25 Vdd	1.25 Vdd	1.25 Vdd
//case 4	 2.5V		3.3V	4.2V	1.75 Vdd	1.75 Vdd	1.25 Vdd
//
//*****************************************************************************
BOOL RT_CodecComm::ConfigVmidOutput(BYTE Vmid_CaseType)
{

	BOOL bRetVal=FALSE;



	switch(Vmid_CaseType)
	{
		case 1:
			bRetVal=WriteCodecRegMask(
										RT_GEN_CTRL_REG1,
										(GP_HP_AMP_CTRL_RATIO_100	 |
										 GP_SPK_D_AMP_CTRL_RATIO_100 |
										 GP_SPK_AB_AMP_CTRL_RATIO_100)	
										,
										(GP_HP_AMP_CTRL_MASK		|
										GP_SPK_D_AMP_CTRL_MASK		|
										GP_SPK_AB_AMP_CTRL_MASK)
									 );
			break;

		case 2:
			bRetVal=WriteCodecRegMask(
										RT_GEN_CTRL_REG1,
										(GP_HP_AMP_CTRL_RATIO_100	 |
										 GP_SPK_D_AMP_CTRL_RATIO_125 |
										 GP_SPK_AB_AMP_CTRL_RATIO_125)	
										,
										(GP_HP_AMP_CTRL_MASK		|
										GP_SPK_D_AMP_CTRL_MASK		|
										GP_SPK_AB_AMP_CTRL_MASK)
									 );
			break;

		case 3:
			bRetVal=WriteCodecRegMask(
										RT_GEN_CTRL_REG1,
										(GP_HP_AMP_CTRL_RATIO_125	 |
										 GP_SPK_D_AMP_CTRL_RATIO_125 |
										 GP_SPK_AB_AMP_CTRL_RATIO_125)	
										,
										(GP_HP_AMP_CTRL_MASK		|
										GP_SPK_D_AMP_CTRL_MASK		|
										GP_SPK_AB_AMP_CTRL_MASK)
									 );
			break;

		case 4:
			bRetVal=WriteCodecRegMask(
										RT_GEN_CTRL_REG1,
										(GP_HP_AMP_CTRL_RATIO_125	 |
										 GP_SPK_D_AMP_CTRL_RATIO_175 |
										 GP_SPK_AB_AMP_CTRL_RATIO_175)	
										,
										(GP_HP_AMP_CTRL_MASK		|
										GP_SPK_D_AMP_CTRL_MASK		|
										GP_SPK_AB_AMP_CTRL_MASK)
									 );
			break;

		default:
			return  FALSE;
	}
	return bRetVal;
}

//*****************************************************************************
//
//function:Config Microphone BIAS function
//
//*****************************************************************************
BOOL RT_CodecComm::ConfigMicBias(BYTE Mic,BYTE MicBiasCtrl)
{
	BOOL bRetVal=FALSE;

	if(Mic==MIC1)
	{
		if(MicBiasCtrl==MIC_BIAS_90_PRECNET_AVDD)
		  {	
			bRetVal=WriteCodecRegMask(RT_MICROPHONE_CTRL,MIC1_BIAS_VOLT_CTRL_90P,MIC1_BIAS_VOLT_CTRL_MASK);
		  }
		 else if(MicBiasCtrl==MIC_BIAS_75_PRECNET_AVDD)
		  {	
			bRetVal=WriteCodecRegMask(RT_MICROPHONE_CTRL,MIC1_BIAS_VOLT_CTRL_75P,MIC1_BIAS_VOLT_CTRL_MASK);
		  }			
	}
	else if(Mic==MIC2)
	{
		if(MicBiasCtrl==MIC_BIAS_90_PRECNET_AVDD)
		  {	
			bRetVal=WriteCodecRegMask(RT_MICROPHONE_CTRL,MIC2_BIAS_VOLT_CTRL_90P,MIC2_BIAS_VOLT_CTRL_MASK);
		  }
		 else if(MicBiasCtrl==MIC_BIAS_75_PRECNET_AVDD)
		  {	
			bRetVal=WriteCodecRegMask(RT_MICROPHONE_CTRL,MIC2_BIAS_VOLT_CTRL_75P,MIC2_BIAS_VOLT_CTRL_MASK);
		  }		
	}
	
	return 	bRetVal;
}

//*****************************************************************************
//function:Enable the Voice PCM interface Path
//*****************************************************************************
BOOL RT_CodecComm::ConfigPcmVoicePath(BOOL bEnableVoicePath,MODE_SEL mode)
{
	BOOL bRetVal=FALSE;

	if(bEnableVoicePath)
	 {
			//Power on Voice PCM I2S Digital interface
			WriteCodecRegMask(RT_PWR_MANAG_ADD1,PWR_MAIN_I2S,PWR_MAIN_I2S);
			//Power on Voice DAC/ADC 
			WriteCodecRegMask(RT_PWR_MANAG_ADD2,PWR_VOICE_CLOCK,PWR_VOICE_CLOCK);
			//routing voice to HPMixer
			WriteCodecRegMask(RT_VOICE_DAC_OUT_VOL,0,M_V_DAC_TO_HP_MIXER);
					


		switch(mode)		
		{
			case MASTER_MODE_A:	//8kHz sampling rate,16 bits PCM and master mode,PCM mode is A,MCLK=24.576MHz.
								//CSR PSKEY_PCM_CONFIG32 (HEX) = 0x08000006,PSKEY_FORMAT=0x0060,PCM_CLK=256K				

				//Enable GPIO 1,3,4,5 to voice interface
				//Set I2S to Master mode
				//Voice ADC Enable
				//Set voice i2s VBCLK Polarity to Invert
				//Set PCM mode to Mode A
				//Set Data length to 16 bit
				//set Data Fomrat to PCM format
				//the register 0x36 value's should is 0x8183
				bRetVal=ShadowWriteCodec(RT_EXTEND_SDP_CTRL,EXT_I2S_FUNC_ENABLE|EXT_I2S_VOICE_ADC_EN|EXT_I2S_BCLK_POLARITY|EXT_I2S_DL_16|EXT_I2S_DF_PCM);
				if(!bRetVal)
					goto exit;	

				//Set Voice MCLK from main MCLK
				//set voice SCLK select divide 12 and 8 
				//the register 0x64 value's should is 0x00B2
				bRetVal=ShadowWriteCodec(RT_VOICE_DAC_PCMCLK_CTRL1,VOICE_MCLK_SEL_MCLK_INPUT|VOICE_SCLK_DIV1_12|VOICE_SCLK_DIV2_8);
				if(!bRetVal)
					goto exit;


				//set Voice CLK filter Div 3 and 8
				//the register 0x66 value's should is 0x0022
				bRetVal=ShadowWriteCodec(RT_VOICE_DAC_PCMCLK_CTRL2,VOICE_CLK_FILTER_DIV2_3|VOICE_CLK_FILTER_DIV1_8);
				if(!bRetVal)
					goto exit;

		
				break;

			case MASTER_MODE_B:	//8kHz sampling rate,16 bits PCM and master mode,PCM mode is B,PLL out=24.5625MHz.
								//CSR PSKEY_PCM_CONFIG32 (HEX) = 0x08000002,PSKEY_FORMAT=0x0060,PCM_CLK=256K				

				//Enable GPIO 1,3,4,5 to voice interface
				//Set I2S to Master mode
				//Voice ADC Enable
				//Set voice i2s VBCLK Polarity to Invert
				//Set PCM mode to Mode B
				//Set Data length to 16 bit
				//set Data Fomrat to PCM format
				//the register 0x36 value's should is 0x81C3
				bRetVal=ShadowWriteCodec(RT_EXTEND_SDP_CTRL,EXT_I2S_FUNC_ENABLE|EXT_I2S_VOICE_ADC_EN|EXT_I2S_BCLK_POLARITY|EXT_I2S_PCM_MODE|EXT_I2S_DL_16|EXT_I2S_DF_PCM);
				if(!bRetVal)
					goto exit;	

				//Set Voice MCLK from PLL input
				//set voice SCLK select divide 12 and 8 
				//the register 0x64 value's should is 0x80B2
				bRetVal=ShadowWriteCodec(RT_VOICE_DAC_PCMCLK_CTRL1,VOICE_MCLK_SEL_PLL_OUTPUT|VOICE_SCLK_DIV1_12|VOICE_SCLK_DIV2_8);
				if(!bRetVal)
					goto exit;


				//set Voice CLK filter Div 3 and 8
				//the register 0x66 value's should is 0x0022
				bRetVal=ShadowWriteCodec(RT_VOICE_DAC_PCMCLK_CTRL2,VOICE_CLK_FILTER_DIV2_3|VOICE_CLK_FILTER_DIV1_8);
				if(!bRetVal)
					goto exit;

		
				break;

			case SLAVE_MODE_A:	//8kHz sampling rate,16 bits PCM and slave mode,PLL out=24.5625MHz.
								//CSR PSKEY_PCM_CONFIG32 (HEX) = 0x08400000,PSKEY_FORMAT=0x0060,PCM_CLK=512K				

				//Enable GPIO 1,3,4,5 to voice interface
				//Set I2S to slave mode
				//Voice ADC Enable
				//Set voice i2s VBCLK Polarity to Invert
				//Set PCM mode to Mode B
				//Set Data length to 16 bit
				//set Data Fomrat to PCM format
				//the register 0x36 value's should is 0xC1C3
				bRetVal=ShadowWriteCodec(RT_EXTEND_SDP_CTRL,EXT_I2S_FUNC_ENABLE|EXT_I2S_MODE_SEL|EXT_I2S_VOICE_ADC_EN|EXT_I2S_BCLK_POLARITY|EXT_I2S_PCM_MODE|EXT_I2S_DL_16|EXT_I2S_DF_PCM);
				if(!bRetVal)
					goto exit;	

				//Select Voice filter Clock source from VBCLK
				//Voice DA/AD filter select 64x
				//the register 0x66 value's should is 0x6000
				bRetVal=ShadowWriteCodec(RT_VOICE_DAC_PCMCLK_CTRL2,VOICE_FILTER_CLK_F_VBCLK | VOICE_AD_DA_FILTER_SEL_64X);
				if(!bRetVal)
					goto exit;
		
				break;

			case SLAVE_MODE_B:	//8kHz sampling rate,16 bits PCM and slave mode,PCM mode A
								//CSR PSKEY_PCM_CONFIG32 (HEX) = 0x08400014,PSKEY_FORMAT=0x0060,PCM_CLK=512K				

				//Enable GPIO 1,3,4,5 to voice interface
				//Set I2S to slave mode
				//Voice ADC Enable
				//Set voice i2s VBCLK Polarity to Invert
				//Set PCM mode to Mode A
				//Set Data length to 16 bit
				//set Data Fomrat to PCM format
				//the register 0x36 value's should is 0x81C3
				bRetVal=ShadowWriteCodec(RT_EXTEND_SDP_CTRL,EXT_I2S_FUNC_ENABLE|EXT_I2S_MODE_SEL|EXT_I2S_VOICE_ADC_EN|EXT_I2S_BCLK_POLARITY|EXT_I2S_DL_16|EXT_I2S_DF_PCM);
				if(!bRetVal)
					goto exit;	

				//Select Voice filter Clock source from VBCLK
				//Voice DA/AD filter select 64x
				//the register 0x66 value's should is 0x6000
				bRetVal=ShadowWriteCodec(RT_VOICE_DAC_PCMCLK_CTRL2,VOICE_FILTER_CLK_F_VBCLK | VOICE_AD_DA_FILTER_SEL_64X);
				if(!bRetVal)
					goto exit;
		
				break;

			default:
				//do nothing		
				break;

			}
		}
 		else
		{
			//Power down Voice PCM I2S Digital interface
			WriteCodecRegMask(RT_PWR_MANAG_ADD1,0,PWR_MAIN_I2S);
			//Power down Voice DAC/ADC 
			WriteCodecRegMask(RT_PWR_MANAG_ADD2,0,PWR_VOICE_CLOCK);
			//Disable Voice PCM interface	
			WriteCodecRegMask(RT_EXTEND_SDP_CTRL,0,EXT_I2S_FUNC_ENABLE);
		}
	
exit:	
	return bRetVal;
}
//*****************************************************************************
//function:Enable the PLL function
//*****************************************************************************
BOOL RT_CodecComm::EnablePLLPath(BOOL bEnablePLL,unsigned short int K,unsigned short int M,unsigned short int N)
{	
	unsigned short int usRegVal;
	BOOL bRetVal=FALSE;

	if(bEnablePLL)
	  {	

		bRetVal=ShadowWriteCodec(RT_POWERDOWN_CTRL_STAT,0x0);	//power on all PR bit
	
		bRetVal=WriteCodecRegMask(RT_PWR_MANAG_ADD2,PWR_MIXER_VREF,PWR_MIXER_VREF);	//power on Vref for All analog circuit
		
		bRetVal=WriteCodecRegMask(RT_PWR_MANAG_ADD1,PWR_MAIN_BIAS,PWR_MAIN_BIAS);	//power on main bias	
	
		usRegVal=PLL_CTRL_M_VAL(M) | PLL_CTRL_K_VAL(K) |PLL_CTRL_N_VAL(N);

		bRetVal=ShadowWriteCodec(RT_PLL_CTRL,usRegVal);

		//codec clock source from PLL output		
		bRetVal=WriteCodecRegMask(RT_GEN_CTRL_REG1,GP_CLK_FROM_PLL,GP_CLK_FROM_PLL);
		
		//Disable PLL Power		
		bRetVal=WriteCodecRegMask(RT_PWR_MANAG_ADD2,0,PWR_PLL);	
		//Enable PLL Power
		bRetVal=WriteCodecRegMask(RT_PWR_MANAG_ADD2,PWR_PLL,PWR_PLL);	

#if !USE_I2S_INTERFACE		//if use ac97 interface,need do warm reset

		//Power off ACLink 
		bRetVal=WriteCodecRegMask(RT_POWERDOWN_CTRL_STAT,RT_PWR_PR4,RT_PWR_PR4);		

		//ac97 interface need to do WarmReset
		if(!WarmResetAC97Control())
			return FALSE;

#endif

	  }
	else
	  {
		//codec clock source from MCLK output		
		bRetVal=WriteCodecRegMask(RT_GEN_CTRL_REG1,0,GP_CLK_FROM_PLL);		


#if !USE_I2S_INTERFACE		//if use ac97 interface,need do warm reset

		//Power off ACLink 
		bRetVal=WriteCodecRegMask(RT_POWERDOWN_CTRL_STAT,RT_PWR_PR4,RT_PWR_PR4);		

		//ac97 interface need to do WarmReset
		if(!WarmResetAC97Control())
			return FALSE;

#endif



		//Disable PLL Power
		bRetVal=WriteCodecRegMask(RT_PWR_MANAG_ADD2,0,PWR_PLL);	
	  }	

	return bRetVal;
}

//*****************************************************************************
//
//function:Config Microphone Boost function
//
//*****************************************************************************
BOOL RT_CodecComm::ConfigMicBoost(BYTE Mic,MIC_BOOST_TYPE BoostType)
{
	BOOL bRetVal=FALSE;

	if(Mic==MIC1)
	{
		switch(BoostType)
		{
			//Bypass mic1 boost
			case BOOST_BYPASS:

				bRetVal=WriteCodecRegMask(RT_MICROPHONE_CTRL,MIC1_BOOST_CONTROL_BYPASS,MIC1_BOOST_CONTROL_MASK);

			break;
			//Set mic1 boost to 20DB	
			case BOOST_20DB:

				bRetVal=WriteCodecRegMask(RT_MICROPHONE_CTRL,MIC1_BOOST_CONTROL_20DB,MIC1_BOOST_CONTROL_MASK);

			break;
			//Set mic1 boost to 30DB
			case BOOST_30DB:

				bRetVal=WriteCodecRegMask(RT_MICROPHONE_CTRL,MIC1_BOOST_CONTROL_30DB,MIC1_BOOST_CONTROL_MASK);

			break;