fw.lst

cy7c68013的GPIF测试FIREWARE

C51 COMPILER V7.10   FW                                                                    10/26/2005 09:28:02 PAGE 1   


C51 COMPILER V7.10, COMPILATION OF MODULE FW
OBJECT MODULE PLACED IN fw.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE fw.c BROWSE INCDIR(F:\Keil\C51\INC\Cypress\) DEBUG OBJECTEXTEND

line level    source

   1          //-----------------------------------------------------------------------------
   2          //   File:      fw.c
   3          //   Contents:   Firmware frameworks task dispatcher and device request parser
   4          //            source.
   5          //
   6          // indent 3.  NO TABS!
   7          //
   8          // $Revision: 18 $
   9          // $Date: 12/04/01 5:33p $
  10          //
  11          //   Copyright (c) 1997 AnchorChips, Inc. All rights reserved
  12          //-----------------------------------------------------------------------------
  13          #include "fx2.h"
  14          #include "fx2regs.h"
  15          #include "io.h"
  16          //-----------------------------------------------------------------------------
  17          // Constants
  18          //-----------------------------------------------------------------------------
  19          #define DELAY_COUNT   0x9248*8L  // Delay for 8 sec at 24Mhz, 4 sec at 48
  20          #define _IFREQ  48000            // IFCLK constant for Synchronization Delay
  21          #define _CFREQ  48000            // CLKOUT constant for Synchronization Delay
  22          
  23          //-----------------------------------------------------------------------------
  24          // Random Macros
  25          //-----------------------------------------------------------------------------
  26          #define   min(a,b) (((a)<(b))?(a):(b))
  27          #define   max(a,b) (((a)>(b))?(a):(b))
  28          
  29            // Registers which require a synchronization delay, see section 15.14
  30            // FIFORESET        FIFOPINPOLAR
  31            // INPKTEND         OUTPKTEND
  32            // EPxBCH:L         REVCTL
  33            // GPIFTCB3         GPIFTCB2
  34            // GPIFTCB1         GPIFTCB0
  35            // EPxFIFOPFH:L     EPxAUTOINLENH:L
  36            // EPxFIFOCFG       EPxGPIFFLGSEL
  37            // PINFLAGSxx       EPxFIFOIRQ
  38            // EPxFIFOIE        GPIFIRQ
  39            // GPIFIE           GPIFADRH:L
  40            // UDMACRCH:L       EPxGPIFTRIG
  41            // GPIFTRIG
  42            
  43            // Note: The pre-REVE EPxGPIFTCH/L register are affected, as well...
  44            //      ...these have been replaced by GPIFTC[B3:B0] registers
  45            
  46          #include "fx2sdly.h"             // Define _IFREQ and _CFREQ above this #include
  47          
  48          //-----------------------------------------------------------------------------
  49          // Global Variables
  50          //-----------------------------------------------------------------------------
  51          volatile BOOL   GotSUD;
  52          BOOL      Rwuen;
  53          BOOL      Selfpwr;
  54          volatile BOOL   Sleep;                  // Sleep mode enable flag
  55          
C51 COMPILER V7.10   FW                                                                    10/26/2005 09:28:02 PAGE 2   

  56          WORD   data pDeviceDscr;   // Pointer to Device Descriptor; Descriptors may be moved
  57          WORD   data pDeviceQualDscr;
  58          WORD   data pHighSpeedConfigDscr;
  59          WORD   data pFullSpeedConfigDscr;   
  60          WORD   data pConfigDscr;
  61          WORD   data pOtherConfigDscr;   
  62          WORD   data pStringDscr;   
  63          
  64          //-----------------------------------------------------------------------------
  65          // Prototypes
  66          //-----------------------------------------------------------------------------
  67          void SetupCommand(void);
  68          void TD_Init(void);
  69          void TD_Poll(void);
  70          BOOL TD_Suspend(void);
  71          BOOL TD_Resume(void);
  72          
  73          BOOL DR_GetDescriptor(void);
  74          BOOL DR_SetConfiguration(void);
  75          BOOL DR_GetConfiguration(void);
  76          BOOL DR_SetInterface(void);
  77          BOOL DR_GetInterface(void);
  78          BOOL DR_GetStatus(void);
  79          BOOL DR_ClearFeature(void);
  80          BOOL DR_SetFeature(void);
  81          BOOL DR_VendorCmnd(void);
  82          
  83          // this table is used by the epcs macro 
  84          const char code  EPCS_Offset_Lookup_Table[] =
  85          {
  86             0,    // EP1OUT
  87             1,    // EP1IN
  88             2,    // EP2OUT
  89             2,    // EP2IN
  90             3,    // EP4OUT
  91             3,    // EP4IN
  92             4,    // EP6OUT
  93             4,    // EP6IN
  94             5,    // EP8OUT
  95             5,    // EP8IN
  96          };
  97          
  98          // macro for generating the address of an endpoint's control and status register (EPnCS)
  99          #define epcs(EP) (EPCS_Offset_Lookup_Table[(EP & 0x7E) | (EP > 128)] + 0xE6A1)
 100          
 101          //-----------------------------------------------------------------------------
 102          // Code
 103          //-----------------------------------------------------------------------------
 104          
 105          // Task dispatcher
 106          void main(void)
 107          {
 108   1         
 109   1         DWORD  data i;
 110   1         WORD   data offset;
 111   1         DWORD   data DevDescrLen;
 112   1         DWORD   data j=0;
 113   1         WORD   data IntDescrAddr;
 114   1         WORD   data ExtDescrAddr;
 115   1         
 116   1         SP = 0xc0;   
 117   1         // Initialize Global States
C51 COMPILER V7.10   FW                                                                    10/26/2005 09:28:02 PAGE 3   

 118   1         Sleep = FALSE;               // Disable sleep mode
 119   1         Rwuen = FALSE;               // Disable remote wakeup
 120   1         Selfpwr = FALSE;            // Disable self powered
 121   1         GotSUD = FALSE;               // Clear "Got setup data" flag
 122   1      
 123   1         // Initialize user device
 124   1      //      IO_Init();
 125   1              REG_Init();
 126   1          TD_Init();
 127   1      
 128   1         // The following section of code is used to relocate the descriptor table. 
 129   1         // Since the SUDPTRH and SUDPTRL are assigned the address of the descriptor 
 130   1         // table, the descriptor table must be located in on-part memory.
 131   1         // The 4K demo tools locate all code sections in external memory.
 132   1         // The descriptor table is relocated by the frameworks ONLY if it is found 
 133   1         // to be located in external memory.
 134   1         pDeviceDscr = (WORD)&DeviceDscr;
 135   1         pDeviceQualDscr = (WORD)&DeviceQualDscr;
 136   1         pHighSpeedConfigDscr = (WORD)&HighSpeedConfigDscr;
 137   1         pFullSpeedConfigDscr = (WORD)&FullSpeedConfigDscr;
 138   1         pStringDscr = (WORD)&StringDscr;
 139   1      
 140   1         if ((WORD)&DeviceDscr & 0xe000)
 141   1         {
 142   2            IntDescrAddr = INTERNAL_DSCR_ADDR;
 143   2            ExtDescrAddr = (WORD)&DeviceDscr;
 144   2            DevDescrLen = (WORD)&UserDscr - (WORD)&DeviceDscr + 2;
 145   2            for (i = 0; i < DevDescrLen; i++)
 146   2               *((BYTE data *)IntDescrAddr+i) = 0xCD;
 147   2            for (i = 0; i < DevDescrLen; i++)
 148   2               *((BYTE data *)IntDescrAddr+i) = *((BYTE data *)ExtDescrAddr+i);
 149   2            pDeviceDscr = IntDescrAddr;
 150   2            offset = (WORD)&DeviceDscr - INTERNAL_DSCR_ADDR;
 151   2            pDeviceQualDscr -= offset;
 152   2            pConfigDscr -= offset;
 153   2            pOtherConfigDscr -= offset;
 154   2            pHighSpeedConfigDscr -= offset;
 155   2            pFullSpeedConfigDscr -= offset;
 156   2            pStringDscr -= offset;
 157   2         }
 158   1      
 159   1         EZUSB_IRQ_ENABLE();            // Enable USB interrupt (INT2)
 160   1         EZUSB_ENABLE_RSMIRQ();            // Wake-up interrupt
 161   1      
 162   1         INTSETUP |= (bmAV2EN | bmAV4EN);     // Enable INT 2 & 4 autovectoring
 163   1      
 164   1         USBIE |= bmSUDAV | bmSUTOK | bmSUSP | bmURES | bmHSGRANT;   // Enable selected interrupts
 165   1      //      SerialPort_Init();
 166   1         EA = 1;                  // Enable 8051 interrupts
 167   1      
 168   1      #ifndef NO_RENUM
 169   1         // Renumerate if necessary.  Do this by checking the renum bit.  If it
 170   1         // is already set, there is no need to renumerate.  The renum bit will
 171   1         // already be set if this firmware was loaded from an eeprom.
 172   1         if(!(USBCS & bmRENUM))
 173   1         {
 174   2             EZUSB_Discon(TRUE);   // renumerate
 175   2         }
 176   1      #endif
 177   1      
 178   1         // unconditionally re-connect.  If we loaded from eeprom we are
 179   1         // disconnected and need to connect.  If we just renumerated this
C51 COMPILER V7.10   FW                                                                    10/26/2005 09:28:02 PAGE 4   

 180   1         // is not necessary but doesn't hurt anything
 181   1         USBCS &=~bmDISCON;
 182   1      
 183   1         CKCON = (CKCON&(~bmSTRETCH)) | FW_STRETCH_VALUE; // Set stretch to 0 (after renumeration)