boot._h

AVR16源代码 ICC编译器

        "spm\n\t"                                \
        : "=m" (__SPM_REG),                      \
          "=m" (RAMPZ)                           \
        : "r" ((uint8_t)__BOOT_PAGE_ERASE),      \
          "r" ((uint32_t)address)                \
        : "r30", "r31"                           \
    );                                           \
})

#define __boot_page_write_normal(address)        \
({                                               \
    __asm__ __volatile__                         \
    (                                            \
        "movw r30, %2\n\t"                       \
        "sts %0, %1\n\t"                         \
        "spm\n\t"                                \
        : "=m" (__SPM_REG)                       \
        : "r" ((uint8_t)__BOOT_PAGE_WRITE),      \
          "r" ((uint16_t)address)                \
        : "r30", "r31"                           \
    );                                           \
})

#define __boot_page_write_alternate(address)     \
({                                               \
    __asm__ __volatile__                         \
    (                                            \
        "movw r30, %2\n\t"                       \
        "sts %0, %1\n\t"                         \
        "spm\n\t"                                \
        ".word 0xffff\n\t"                       \
        "nop\n\t"                                \
        : "=m" (__SPM_REG)                       \
        : "r" ((uint8_t)__BOOT_PAGE_WRITE),      \
          "r" ((uint16_t)address)                \
        : "r30", "r31"                           \
    );                                           \
})

#define __boot_page_write_extended(address)      \
({                                               \
    __asm__ __volatile__                         \
    (                                            \
        "movw r30, %A3\n\t"                      \
        "sts %1, %C3\n\t"                        \
        "sts %0, %2\n\t"                         \
        "spm\n\t"                                \
        : "=m" (__SPM_REG),                      \
          "=m" (RAMPZ)                           \
        : "r" ((uint8_t)__BOOT_PAGE_WRITE),      \
          "r" ((uint32_t)address)                \
        : "r30", "r31"                           \
    );                                           \
})

#define __boot_rww_enable()                      \
({                                               \
    __asm__ __volatile__                         \
    (                                            \
        "sts %0, %1\n\t"                         \
        "spm\n\t"                                \
        : "=m" (__SPM_REG)                       \
        : "r" ((uint8_t)__BOOT_RWW_ENABLE)       \
    );                                           \
})

#define __boot_rww_enable_alternate()            \
({                                               \
    __asm__ __volatile__                         \
    (                                            \
        "sts %0, %1\n\t"                         \
        "spm\n\t"                                \
        ".word 0xffff\n\t"                       \
        "nop\n\t"                                \
        : "=m" (__SPM_REG)                       \
        : "r" ((uint8_t)__BOOT_RWW_ENABLE)       \
    );                                           \
})

/* From the mega16/mega128 data sheets (maybe others):

     Bits by SPM To set the Boot Loader Lock bits, write the desired data to
     R0, write "X0001001" to SPMCR and execute SPM within four clock cycles
     after writing SPMCR. The only accessible Lock bits are the Boot Lock bits
     that may prevent the Application and Boot Loader section from any
     software update by the MCU.

     If bits 5..2 in R0 are cleared (zero), the corresponding Boot Lock bit
     will be programmed if an SPM instruction is executed within four cycles
     after BLBSET and SPMEN are set in SPMCR. The Z-pointer is don t care
     during this operation, but for future compatibility it is recommended to
     load the Z-pointer with $0001 (same as used for reading the Lock
     bits). For future compatibility It is also recommended to set bits 7, 6,
     1, and 0 in R0 to 1 when writing the Lock bits. When programming the Lock
     bits the entire Flash can be read during the operation. */

#define __boot_lock_bits_set(lock_bits)                    \
({                                                         \
    uint8_t value = (uint8_t)(~(lock_bits));               \
    __asm__ __volatile__                                   \
    (                                                      \
        "ldi r30, 1\n\t"                                   \
        "ldi r31, 0\n\t"                                   \
        "mov r0, %2\n\t"                                   \
        "sts %0, %1\n\t"                                   \
        "spm\n\t"                                          \
        : "=m" (__SPM_REG)                                 \
        : "r" ((uint8_t)__BOOT_LOCK_BITS_SET),             \
          "r" (value)                                      \
        : "r0", "r30", "r31"                               \
    );                                                     \
})

#define __boot_lock_bits_set_alternate(lock_bits)          \
({                                                         \
    uint8_t value = (uint8_t)(~(lock_bits));               \
    __asm__ __volatile__                                   \
    (                                                      \
        "ldi r30, 1\n\t"                                   \
        "ldi r31, 0\n\t"                                   \
        "mov r0, %2\n\t"                                   \
        "sts %0, %1\n\t"                                   \
        "spm\n\t"                                          \
        ".word 0xffff\n\t"                                 \
        "nop\n\t"                                          \
        : "=m" (__SPM_REG)                                 \
        : "r" ((uint8_t)__BOOT_LOCK_BITS_SET),       \
          "r" (value)                                      \
        : "r0", "r30", "r31"                               \
    );                                                     \
})

/** \ingroup avr_boot
    \def boot_page_fill(address, data)

    Fill the bootloader temporary page buffer for flash 
    address with data word. 

    \note The address is a byte address. The data is a word. The AVR 
    writes data to the buffer a word at a time, but addresses the buffer
    per byte! So, increment your address by 2 between calls, and send 2
    data bytes in a word format! The LSB of the data is written to the lower 
    address; the MSB of the data is written to the higher address.*/

/** \ingroup avr_boot
    \def boot_page_erase(address)

    Erase the flash page that contains address.

    \note address is a byte address in flash, not a word address. */

/** \ingroup avr_boot
    \def boot_page_write(address)

    Write the bootloader temporary page buffer 
    to flash page that contains address.
    
    \note address is a byte address in flash, not a word address. */

/** \ingroup avr_boot
    \def boot_rww_enable()

    Enable the Read-While-Write memory section. */

/** \ingroup avr_boot
    \def boot_lock_bits_set(lock_bits)

    Set the bootloader lock bits.

    \param lock_bits A mask of which Boot Loader Lock Bits to set.

    \note In this context, a 'set bit' will be written to a zero value.

    For example, to disallow the SPM instruction from writing to the Boot
    Loader memory section of flash, you would use this macro as such:

    \code
    boot_lock_bits_set (_BV (BLB12));
    \endcode

    And to remove any SPM restrictions, you would do this:

    \code
    boot_lock_bits_set (0);
    \endcode */

/* Normal versions of the macros use 16-bit addresses.
   Extended versions of the macros use 32-bit addresses.
   Alternate versions of the macros use 16-bit addresses and require special
   instruction sequences after LPM.

   FLASHEND is defined in the ioXXXX.h file.
   USHRT_MAX is defined in <limits.h>. */ 

#if defined(__AVR_ATmega161__) || defined(__AVR_ATmega163__) \
    || defined(__AVR_ATmega323__)

/* Alternate: ATmega161/163/323 and 16 bit address */
#define boot_page_fill(address, data) __boot_page_fill_alternate(address, data)
#define boot_page_erase(address)      __boot_page_erase_alternate(address)
#define boot_page_write(address)      __boot_page_write_alternate(address)
#define boot_rww_enable()             __boot_rww_enable_alternate()
#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set_alternate(lock_bits)

#elif (FLASHEND > USHRT_MAX) && !defined(__USING_MINT8)

/* Extended: >16 bit address */
#define boot_page_fill(address, data) __boot_page_fill_extended(address, data)
#define boot_page_erase(address)      __boot_page_erase_extended(address)
#define boot_page_write(address)      __boot_page_write_extended(address)
#define boot_rww_enable()             __boot_rww_enable()
#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set(lock_bits)

#else

/* Normal: 16 bit address */
#define boot_page_fill(address, data) __boot_page_fill_normal(address, data)
#define boot_page_erase(address)      __boot_page_erase_normal(address)
#define boot_page_write(address)      __boot_page_write_normal(address)
#define boot_rww_enable()             __boot_rww_enable()
#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set(lock_bits)

#endif

#define __boot_eeprom_spm_safe(func, address, data) \
do { \
    boot_spm_busy_wait();                       \
    eeprom_busy_wait();                         \
    func (address, data);                       \
} while (0)

/** \ingroup avr_boot

    Same as boot_page_fill() except it waits for eeprom and spm operations to
    complete before filling the page. */

#define boot_page_fill_safe(address, data) \
    __boot_eeprom_spm_safe (boot_page_fill, address, data)

/** \ingroup avr_boot

    Same as boot_page_erase() except it waits for eeprom and spm operations to
    complete before erasing the page. */

#define boot_page_erase_safe(address, data) \
    __boot_eeprom_spm_safe (boot_page_erase, address, data)

/** \ingroup avr_boot

    Same as boot_page_write() except it waits for eeprom and spm operations to
    complete before writing the page. */

#define boot_page_write_safe(address, data) \
    __boot_eeprom_spm_safe (boot_page_wrte, address, data)

/** \ingroup avr_boot

    Same as boot_rww_enable() except waits for eeprom and spm operations to
    complete before enabling the RWW mameory. */

#define boot_rww_enable_safe(address, data) \
    __boot_eeprom_spm_safe (boot_rww_enable, address, data)

/** \ingroup avr_boot

    Same as boot_lock_bits_set() except waits for eeprom and spm operations to
    complete before setting the lock bits. */

#define boot_lock_bits_set_safe(address, data) \
    __boot_eeprom_spm_safe (boot_lock_bits_set, address, data)

#endif /* _AVR_BOOT_H_ */