📄 pic12ce519
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; step22.ASM
; Version: 0 Date: 02. April 1999
; Copyright (C) 1999 Georg Ziegler
; NMRA-DCC decoder for stepper motor with 2 coil based on PIC12CE519
; 14/28/126 speed step mode and two internal speed curves
; Max 2000 U/min - SPDTAB and SPDTAB1 in SPEED.XLS worksheet
; 25us timestep for polling of DCC signal
; 2 I/O Ports used for stepper
; This program is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
; General Public License for more details.
; You should have received a copy of the GNU General Public License
; along with this program; if not, write to the Free Software
; Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
; Contact :
; Georg Ziegler
; Zwehrener Weg 23a
; 34121 Kassel
; g.zi@gmx.de
;--------------------------------------------------------------------
LIST P=12CE519, R=DEC
INCLUDE <P12CE519.INC>
__CONFIG _MCLRE_OFF & _CP_ON & _WDT_ON & _IntRC_OSC
;--------------------------------------------------------------------
; 0AAA AAAA 01DL SSSS -> Lok Adress Direction Light & Speed
; 0AAA AAAA 100D DDDD -> Lok Function F1-F4 & FL
; 0AAA AAAA 1011 DDDD -> Lok Function F5-F8
; 0000 0000 -> Broadcast Adress for all Lok Decoder
; 10AA AAAA 1AAA CDDD -> 9 Bit Accessory on/off F1-F8
; 1011 1111 1000 CDDD -> Broadcast Command for all Accessory Decoder
; 11AA AAAA & AAAA AAAA -> long Adress
; 1111 1111 0000 0000 -> Idle Packet for all Decoder
;--------------------------------------------------------------------
CV8 EQU 0x0D ; Home Made Decoder
CV7 EQU 0x40 ; Version No. XX00 0000
; 00=Analog(0x00) 01=Stepper(0x40)
; 10=Fauli(0x80) 11=Other(0xC0)
;--------------------------------------------------------------------
INDF EQU 0x00 ; Indirect Adressing
tmr0 EQU 0x01 ; Timer
PC EQU 0x02 ; Programm Counter
STATUS EQU 0x03 ; Status Register
FSR EQU 0x04 ; Special Funcion Register
OSCCAL EQU 0x05 ; Calibration Register
GPIO EQU 0x06 ; GP0-GP5 input/output
;--------------------
CONFIG EQU 0x07 ; 0=DIR 1=CONSIST 2=STEPOK/NOCV 5=FS126 6=BITHI 7=FLAG
S31 EQU 0x08 ;
SOLL EQU 0x09 ; speed to go
BT1 EQU 0x0A ; FSR auf 0x09
BT2 EQU 0x0B ;
BT3 EQU 0x0C ;
BT4 EQU 0x0D ;
BT5 EQU 0x0E ;
BT6 EQU 0x0F ; FSR auf 0x10
;--------------------
SOLL1 EQU 0x10 ;
; EQU 0x11 ;
ACC EQU 0x12 ;
DEC EQU 0x13 ;
; EQU 0x14 ;
; EQU 0x15 ;
; EQU 0x16 ;
; EQU 0x17 ;
XOR EQU 0x18 ;
NOADR EQU 0x19 ; no adress since ...
PWM EQU 0x1A ; (Z1)
PWM1 EQU 0x1B ; for stepper to extend to a lower stepping rate
IST EQU 0x1C ; actual speed
PRE EQU 0x1D ; Preample 12 BIT
LO EQU 0x1E ; low bit counter
HI EQU 0x1F ; hi bit counter
;--------------------
CV1 EQU 0x30 ; Primary Adress
CV2 EQU 0x31 ; Vstart
CV3 EQU 0x32 ; Acceleration Rate
CV4 EQU 0x33 ; Deceleration Rate
CV29 EQU 0x34 ; 0=DIR 1=14/28 2=PWRSRC 3=ADVACK 4=SPDTAB 5=LADRE 6= 7=ACCDEC
MAPCV EQU 0x35 ; rom CV's copied to here
CV5 EQU 0x36 ; Vhigh
CV6 EQU 0x37 ; Vmid
CV17 EQU 0x38 ; Extended Adress Low Byte
CV18 EQU 0x39 ; Extended Adress High Byte
CV19 EQU 0x3A ; Consist Adress
CV49 EQU 0x3B ; Output F1-F8 to GP2 (CV49-64)
CV50 EQU 0x3C ; reserved for FL/RL to map F1-8
CV51 EQU 0x3D ; space (page register)
CV105 EQU 0x3E ; space
CV106 EQU 0x3F ; space
;--------------------
CARRY EQU 0
ZERO EQU 2
SEITE EQU 5
#DEFINE DIR CONFIG,0 ;
#DEFINE CONSIST CONFIG,1 ;
#DEFINE STEPOK? CONFIG,2 ;
#DEFINE NOCV CONFIG,2 ; is mapped with STEPOK?
#DEFINE ROMCV CONFIG,3 ; is mapped with FLACKER
#DEFINE FLACKER CONFIG,3 ;
#DEFINE BRAKE CONFIG,4 ;
#DEFINE FS126 CONFIG,5 ;
#DEFINE BITHI CONFIG,6 ;
#DEFINE STEPIN CONFIG,7 ;
#DEFINE FS28 CV29,1 ; 14/28 speed step
#DEFINE STAB CV29,4 ; speedtab / CV2,CV5&CV6
#DEFINE LADRE CV29,5 ; long adress enable
#DEFINE DIRINV CV29,0 ;
#DEFINE LIINV CV29,2 ; PWRSRC
#DEFINE LED GPIO,2 ;
#DEFINE ACKBIT STATUS,6 ; never overwriten
#DEFINE PROGBIT CV29,6 ;
ORG 0 ; Reset Vector
;--------------------------------------------------------------------
MOVWF OSCCAL ; write calibration value
GOTO INIT ;
;-------------------------
; BSF FSR,5 ;test
; GOTO TEST ;test
; MOVLW 00001000b ; GP3 input, rest output
; TRIS GPIO ; set port GPIO
;TEST1 CALL STEP ;test
; GOTO TEST1
;--------------------------
;------ no Processor with >E8 in osccal possible --------------------
;INCCAL MOVLW 00100000b ; +2 (ca.+100kHz) for 24us time loop
; BTFSS OSCCAL,3 ;
; SUBWF OSCCAL,1 ;
; BTFSC OSCCAL,3 ;
; ADDWF OSCCAL,1 ; write calibration value +100kHz
; BTFSC STATUS,CARRY ; overflow?
; BSF OSCCAL,3 ; set fast bit
;--------------------------------------------------------------------
;..................................................................
SPDTAB MOVF S31,0 ;11
ADDWF PC ;12
RETLW 0 ;13-14
RETLW 0 ;
RETLW 0 ;
RETLW 0 ;
RETLW 3 ; 1
RETLW 20 ; 2
RETLW 44 ; 3
RETLW 71 ; 4
RETLW 96 ; 5
RETLW 119 ; 6
RETLW 39 ; 7
RETLW 90 ; 8
RETLW 125 ; 9
RETLW 149 ; 10
RETLW 168 ; 11
RETLW 182 ; 12
RETLW 193 ; 13
RETLW 201 ; 14
RETLW 208 ; 15
RETLW 214 ; 16
RETLW 218 ; 17
RETLW 222 ; 18
RETLW 226 ; 19
RETLW 229 ; 20
RETLW 231 ; 21
RETLW 233 ; 22
RETLW 235 ; 23
RETLW 237 ; 24
RETLW 238 ; 25
RETLW 239 ; 26
RETLW 240 ; 27
RETLW 241 ; 28
RETLW 242 ; 29
RETLW 243 ; 30
SPDTAB1 MOVF S31,0 ;11
ADDWF PC ;12
RETLW 0 ;13-14
RETLW 0 ;
RETLW 0 ;
RETLW 0 ;
RETLW 132 ; 1
RETLW 13 ; 2
RETLW 6 ; 3
RETLW 4 ; 4
RETLW 3 ; 5
RETLW 2 ; 6
RETLW 1 ; 7
RETLW 1 ; 8
RETLW 1 ; 9
RETLW 1 ; 10
RETLW 1 ; 11
RETLW 1 ; 12
RETLW 1 ; 13
RETLW 1 ; 14
RETLW 1 ; 15
RETLW 1 ; 16
RETLW 1 ; 17
RETLW 1 ; 18
RETLW 1 ; 19
RETLW 1 ; 20
RETLW 1 ; 21
RETLW 1 ; 22
RETLW 1 ; 23
RETLW 1 ; 24
RETLW 1 ; 25
RETLW 1 ; 26
RETLW 1 ; 27
RETLW 1 ; 28
RETLW 1 ; 29
RETLW 1 ; 30
;^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
;....................................................................
;--------------------- multiply MULT1 * MULT2 = hi MULT1 low MULT2 --
MULTIP MOVLW 9 ; 1
MOVWF COUNT ; 2
CLRW ; 3
BCF STATUS,CARRY ; 4
MULTI MOVWF TEMP ; 1
RRF TEMP,0 ; 2
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