test_lib.sv

Open Verification Methodology

// $Id: //dvt/vtech/dev/main/ovm/examples/xbus/examples/test_lib.sv#4 $
//----------------------------------------------------------------------
//   Copyright 2007-2008 Mentor Graphics Corporation
//   Copyright 2007-2008 Cadence Design Systems, Inc.
//   All Rights Reserved Worldwide
//
//   Licensed under the Apache License, Version 2.0 (the
//   "License"); you may not use this file except in
//   compliance with the License.  You may obtain a copy of
//   the License at
//
//       http://www.apache.org/licenses/LICENSE-2.0
//
//   Unless required by applicable law or agreed to in
//   writing, software distributed under the License is
//   distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
//   CONDITIONS OF ANY KIND, either express or implied.  See
//   the License for the specific language governing
//   permissions and limitations under the License.
//----------------------------------------------------------------------

`include "xbus_demo_sve.sv"

// Base Test
class xbus_demo_base_test extends ovm_test;

  `ovm_component_utils(xbus_demo_base_test)

  xbus_demo_sve xbus_demo_sve0;
  ovm_table_printer printer;

  function new(string name = "xbus_demo_base_test", 
    ovm_component parent=null);
    super.new(name,parent);
    printer = new();
  endfunction : new

  virtual function void build();
    super.build();
    // Create the sve
    $cast(xbus_demo_sve0, create_component("xbus_demo_sve", "xbus_demo_sve0"));
    xbus_demo_sve0.build();
    // Set verbosity for the bus monitor
    xbus_demo_sve0.xbus0.bus_monitor.set_report_verbosity_level(OVM_FULL);
  endfunction : build

  task run();
    printer.knobs.depth = 3;
    ovm_print_topology(printer);
    #2000;
    `message(OVM_LOW,("User activated end of simulation"))
    global_stop_request();
  endtask : run

endclass : xbus_demo_base_test

// Read Modify Write Read Test
class test_read_modify_write extends xbus_demo_base_test;

  `ovm_component_utils(test_read_modify_write)

  function new(string name = "test_read_modify_write", ovm_component parent=null);
    super.new(name,parent);
  endfunction : new

  virtual function void build();
    // Set the default sequence for the master and slave
    set_config_string("xbus_demo_sve0.xbus0.masters[0].sequencer",
      "default_sequence", "read_modify_write_seq");
    set_config_string("xbus_demo_sve0.xbus0.slaves[0].sequencer", 
      "default_sequence", "slave_memory_seq");
    // Create the sve
    super.build();
  endfunction : build

endclass : test_read_modify_write

// Large word read/write test
class test_r8_w8_r4_w4 extends xbus_demo_base_test;

  `ovm_component_utils(test_r8_w8_r4_w4)

  function new(string name = "test_r8_w8_r4_w4", ovm_component parent=null);
    super.new(name,parent);
  endfunction : new

  virtual function void build();
    // Set the default sequence for the master and slave
    set_config_string("xbus_demo_sve0.xbus0.masters[0].sequencer", 
      "default_sequence", "r8_w8_r4_w4_seq");
    set_config_string("xbus_demo_sve0.xbus0.slaves[0].sequencer", 
      "default_sequence", "slave_memory_seq");
    // Create the sve
    super.build();
  endfunction : build

endclass

// 2 Master, 4 Slave test
class test_2m_4s extends xbus_demo_base_test;

  `ovm_component_utils(test_2m_4s)

  function new(string name = "test_2m_4s", ovm_component parent=null);
    super.new(name,parent);
  endfunction : new

  virtual function void build();
    // Set the topology to 2 masters, 4 slaves
    set_config_int("xbus_demo_sve0.xbus0", "num_masters", 2);
    set_config_int("xbus_demo_sve0.xbus0", "num_slaves", 4);
    // Set the default sequence for the master and slave
    set_config_string("xbus_demo_sve0.xbus0.m*.sequencer", 
      "default_sequence", "loop_read_modify_write_seq");
    set_config_string("xbus_demo_sve0.xbus0.s*.sequencer", 
      "default_sequence", "slave_memory_seq");
    // Control the number of RMW loops
    set_config_int("xbus_demo_sve0.xbus0.masters[0].sequencer",
      "loop_read_modify_write_seq.itr", 4);
    set_config_int("xbus_demo_sve0.xbus0.masters[1].sequencer",
      "loop_read_modify_write_seq.itr", 3);
    // Create the sve
    super.build();
    // Set up slave address map for xbus0
    xbus_demo_sve0.xbus0.set_slave_address_map("slaves[0]", 16'h0000, 16'h3fff);
    xbus_demo_sve0.xbus0.set_slave_address_map("slaves[1]", 16'h4000, 16'h7fff);
    xbus_demo_sve0.xbus0.set_slave_address_map("slaves[2]", 16'h8000, 16'hBfff);
    xbus_demo_sve0.xbus0.set_slave_address_map("slaves[3]", 16'hC000, 16'hFfff);
    // Connect other slaves monitor to scoreboard
    xbus_demo_sve0.xbus0.slaves[1].monitor.item_collected_port.connect(
      xbus_demo_sve0.scoreboard0.item_collected_imp);
    xbus_demo_sve0.xbus0.slaves[2].monitor.item_collected_port.connect(
      xbus_demo_sve0.scoreboard0.item_collected_imp);
    xbus_demo_sve0.xbus0.slaves[3].monitor.item_collected_port.connect(
      xbus_demo_sve0.scoreboard0.item_collected_imp);
  endfunction : build

endclass