csl_legacy.h

evmDM642 flash测试程序

      HFIELD_SHIFT(HEDMA_OPT_DUM,dum)| \
      HFIELD_SHIFT(HEDMA_OPT_2DD,d2d)| \
      HFIELD_SHIFT(HEDMA_OPT_SUM,sum)| \
      HFIELD_SHIFT(HEDMA_OPT_2DS,s2d)| \
      HFIELD_SHIFT(HEDMA_OPT_ESIZE,esize)| \
      HFIELD_SHIFT(HEDMA_OPT_PRI,pri) \
    ) \
  )

  #define EDMA_MK_SRC(src) \
    ((Uint32)(\
      HFIELD_SHIFT(HEDMA_SRC_SRC,src)\
    )\
  )

  #define EDMA_MK_CNT(elecnt,frmcnt)\
    ((Uint32)(\
      HFIELD_SHIFT(HEDMA_CNT_ELECNT,elecnt)|\
      HFIELD_SHIFT(HEDMA_CNT_FRMCNT,frmcnt)\
    )\
  )

  #define EDMA_MK_DST(dst) \
    ((Uint32)(\
      HFIELD_SHIFT(HEDMA_DST_DST,dst)\
    )\
  )

  #define EDMA_MK_IDX(eleidx,frmidx)\
    ((Uint32)(\
      HFIELD_SHIFT(HEDMA_IDX_ELEIDX,eleidx)|\
      HFIELD_SHIFT(HEDMA_IDX_FRMIDX,frmidx)\
    )\
  )

  #define EDMA_MK_RLD(link,elerld)\
    ((Uint32)(\
      HFIELD_SHIFT(HEDMA_RLD_LINK,link)|\
      HFIELD_SHIFT(HEDMA_RLD_ELERLD,elerld)\
    )\
  )
#endif /* EDMA_SUPPORT */


#if (EMIF_SUPPORT)
 /* 3 following functions are declared later on */
  // EMIF_CONFIG           
  // EMIF_ConfigA          
  // EMIF_ConfigB         
  
  //#define EMIF_Init            EMIF_init
  #define EMIF_Init()
  
  #define EMIF_GBLCTL_RBTR8_NA             (0x00000000)
  #define EMIF_GBLCTL_SSCRT_NA             (0x00000000)
  #define EMIF_GBLCTL_CLK2EN_NA            (0x00000000)
  #define EMIF_GBLCTL_SSCEN_NA             (0x00000000)
  #define EMIF_GBLCTL_SDCEN_NA             (0x00000000)
  #define EMIF_CECTL_TA_NA                 (0x00000000)
  #define EMIF_SDCTL_SDWID_NA              (0x00000000)
  #define EMIF_SDCTL_SDCSZ_NA              (0x00000000)
  #define EMIF_SDCTL_SDRSZ_NA              (0x00000000)
  #define EMIF_SDCTL_SDBSZ_NA              (0x00000000)
  #define EMIF_SDTIM_XRFR_NA               (0x00000000)
  #define EMIF_SDEXT_NA                    (0x00000000)

/* added for reported bug SDSsq22603*/
  #define EMIF_GBLCTL_NOHOLD_0       EMIF_GBLCTL_NOHOLD_DISABLE
  #define EMIF_GBLCTL_NOHOLD_1       EMIF_GBLCTL_NOHOLD_ENABLE


  #define  EMIF_CECTL_TA_OF(x)         _VALUEOF(x)
  #define  EMIF_SDEXT_OF(x)            _VALUEOF(x)

  #define EMIF_MK_GBLCTL(rbtr8,sscrt,clk2en,clk1en,sscen,sdcen,nohold)\
    ((Uint32)( \
      HFIELD_SHIFT(HEMIF_GBLCTL_RBTR8,rbtr8)|\
      HFIELD_SHIFT(HEMIF_GBLCTL_SSCRT,sscrt)|\
      HFIELD_SHIFT(HEMIF_GBLCTL_CLK2EN,clk2en)|\
      HFIELD_SHIFT(HEMIF_GBLCTL_CLK1EN,clk1en)|\
      HFIELD_SHIFT(HEMIF_GBLCTL_SSCEN,sscen)|\
      HFIELD_SHIFT(HEMIF_GBLCTL_SDCEN,sdcen)|\
      HFIELD_SHIFT(HEMIF_GBLCTL_NOHOLD,nohold)|\
      0x00003000 \
    )\
  )

  #define EMIF_MK_CECTL(rdhld,mtype,rdstrb,ta,rdsetup,wrhld,wrstrb,wrsetup)\
    ((Uint32)( \
      HFIELD_SHIFT(HEMIF_CECTL_RDHLD,rdhld)|\
      HFIELD_SHIFT(HEMIF_CECTL_WRHLDMSB,(wrhld>>2))|\
      HFIELD_SHIFT(HEMIF_CECTL_MTYPE,mtype)|\
      HFIELD_SHIFT(HEMIF_CECTL_RDSTRB,rdstrb)|\
      HFIELD_SHIFT(HEMIF_CECTL_TA,ta)|\
      HFIELD_SHIFT(HEMIF_CECTL_RDSETUP,rdsetup)|\
      HFIELD_SHIFT(HEMIF_CECTL_WRHLD,wrhld)|\
      HFIELD_SHIFT(HEMIF_CECTL_WRSTRB,wrstrb)|\
      HFIELD_SHIFT(HEMIF_CECTL_WRSETUP,wrsetup)\
    )\
  )

  #define EMIF_MK_SDCTL(trc,trp,trcd,init,rfen,sdwid,sdcsz,sdrsz,sdbsz)\
    ((Uint32)( \
      HFIELD_SHIFT(HEMIF_SDCTL_TRC,trc)|\
      HFIELD_SHIFT(HEMIF_SDCTL_TRP,trp)|\
      HFIELD_SHIFT(HEMIF_SDCTL_TRCD,trcd)|\
      HFIELD_SHIFT(HEMIF_SDCTL_INIT,init)|\
      HFIELD_SHIFT(HEMIF_SDCTL_RFEN,rfen)|\
      HFIELD_SHIFT(HEMIF_SDCTL_SDWID,sdwid)|\
      HFIELD_SHIFT(HEMIF_SDCTL_SDCSZ,sdcsz)|\
      HFIELD_SHIFT(HEMIF_SDCTL_SDRSZ,sdrsz)|\
      HFIELD_SHIFT(HEMIF_SDCTL_SDBSZ,sdbsz)\
    )\
  )

  #define EMIF_MK_SDTIM(period,xrfr)\
    ((Uint32)( \
      HFIELD_SHIFT(HEMIF_SDTIM_PERIOD,period)|\
      HFIELD_SHIFT(HEMIF_SDTIM_XRFR,xrfr)\
    )\
  )

  #define EMIF_MK_SDEXT(tcl,tras,trrd,twr,thzp,rd2rd,rd2deac,rd2wr,\
    r2wdqm,wr2wr,wr2deac,wr2rd) ((Uint32)( \
      HFIELD_SHIFT(HEMIF_SDEXT_TCL,tcl)|\
      HFIELD_SHIFT(HEMIF_SDEXT_TRAS,tras)|\
      HFIELD_SHIFT(HEMIF_SDEXT_TRRD,trrd)|\
      HFIELD_SHIFT(HEMIF_SDEXT_TWR,twr)|\
      HFIELD_SHIFT(HEMIF_SDEXT_THZP,thzp)|\
      HFIELD_SHIFT(HEMIF_SDEXT_RD2RD,rd2rd)|\
      HFIELD_SHIFT(HEMIF_SDEXT_RD2DEAC,rd2deac)|\
      HFIELD_SHIFT(HEMIF_SDEXT_RD2WR,rd2wr)|\
      HFIELD_SHIFT(HEMIF_SDEXT_R2WDQM,r2wdqm)|\
      HFIELD_SHIFT(HEMIF_SDEXT_WR2WR,wr2wr)|\
      HFIELD_SHIFT(HEMIF_SDEXT_WR2DEAC,wr2deac)|\
      HFIELD_SHIFT(HEMIF_SDEXT_WR2RD,wr2rd)\
    )\
  )
#endif /* EMIF_SUPPORT */


#if  (GPIO_SUPPORT && C64_SUPPORT)

#define GPIO_config(config)    GPIO_config(_hGpioDev0,config);
#define GPIO_configArgs( gpgc, gpen,  gpdir, gpval, gphm,  gplm,  gppol)\
        GPIO_configArgs(_hGpioDev0, gpgc, gpen,  gpdir, gpval,   gphm,  gplm,  gppol)
#define GPIO_getConfig(config)  GPIO_getConfig(_hGpioDev0,config)


#define GPIO_pinEnable(pinId)  GPIO_pinEnable(_hGpioDev0,pinId)

#define GPIO_pinDisable(pinId) GPIO_pinDisable(_hGpioDev0, pinId)
#define GPIO_pinDirection(pinId,direction) GPIO_pinDirection(_hGpioDev0,pinId,direction)


#define GPIO_pinRead( pinId) GPIO_pinRead(_hGpioDev0, pinId)
#define GPIO_read( pinMask) GPIO_read(_hGpioDev0, pinMask)

/* For output Pins */
#define GPIO_pinWrite( pinId,  val) GPIO_pinWrite(_hGpioDev0, pinId,  val)
#define GPIO_write( pinMask,  val)  GPIO_write(_hGpioDev0, pinMask,  val)


/* For input Pins */
#define GPIO_deltaHighGet( pinId) GPIO_deltaHighGet(_hGpioDev0, pinId)
#define GPIO_deltaHighClear( pinId) GPIO_deltaHighClear(_hGpioDev0, pinId)
#define GPIO_deltaLowGet( pinId) GPIO_deltaLowGet(_hGpioDev0, pinId)
#define GPIO_deltaLowClear( pinId) GPIO_deltaLowClear(_hGpioDev0, pinId)

#define GPIO_maskHighSet( pinId) GPIO_maskHighSet(_hGpioDev0, pinId)
#define GPIO_maskHighClear( pinId) GPIO_maskHighClear(_hGpioDev0, pinId)
#define GPIO_maskLowSet( pinId) GPIO_maskLowSet(_hGpioDev0, pinId)
#define GPIO_maskLowClear( pinId) GPIO_maskLowClear(_hGpioDev0, pinId)

/* Pass Through Mode */
#define GPIO_intPolarity(signal,polarity) GPIO_intPolarity(_hGpioDev0, signal,  polarity)

#endif



#if (HPI_SUPPORT)
  //#define HPI_Init             HPI_init      
  #define HPI_Init()
  #define HPI_GetEventId       HPI_getEventId      
  #define HPI_GetHwob          HPI_getHwob      
  #define HPI_GetDspint        HPI_getDspint      
  #define HPI_GetHint          HPI_getHint      
  #define HPI_GetHrdy          HPI_getHrdy      
  #define HPI_GetFetch         HPI_getFetch      
  #define HPI_SetDspint        HPI_setDspint      
  #define HPI_SetHint          HPI_setHint      
#endif /* HPI_SUPPORT */

#if (IRQ_SUPPORT)
  #define IntMask              intMask         
  #define IRQ_EVENT            IRQ_Event         
  #define IRQ_EventTable       IRQ_eventTable         
  #define IRQ_IntTable         IRQ_intTable         
  //#define IRQ_Init             IRQ_init  
  #define IRQ_Init()                  
  #define IRQ_Map              IRQ_map         
  #define IRQ_Enable           IRQ_enable         
  #define IRQ_Disable          IRQ_disable         
  #define IRQ_Set              IRQ_set         
  #define IRQ_Clear            IRQ_clear         
  #define IRQ_Test             IRQ_test         
  #define IRQ_DisableGie       IRQ_globalDisable
  #define IRQ_RestoreGie       IRQ_globalRestore
#endif /* IRQ_SUPPORT */

#if (MCBSP_SUPPORT)

  #define BaseAddr              baseAddr 
  #define MCBSP_PRIVATE_OBJ    MCBSP_PrivateObj        
  #define MCBSP_HANDLE         MCBSP_Handle        
  #define MCBSP_CONFIG         MCBSP_Config        
  #define MCBSP_HDEV0          _MCBSP_hDev0        
  #define MCBSP_HDEV1          _MCBSP_hDev1        
  #define MCBSP_HDEV2          _MCBSP_hDev2        
  #define MCBSP_Reset          MCBSP_reset        
  #define MCBSP_Open           MCBSP_open         
  #define MCBSP_Close          MCBSP_close        
  #define MCBSP_ConfigA        MCBSP_config
  #define MCBSP_ConfigB        MCBSP_configArgs
  #define MCBSP_GetPins        MCBSP_getPins        
  #define MCBSP_SetPins        MCBSP_setPins        
  //#define MCBSP_Init           MCBSP_init         
  #define MCBSP_Init()  
  #define MCBSP_GetXmtAddr     MCBSP_getXmtAddr        
  #define MCBSP_GetRcvAddr     MCBSP_getRcvAddr        
  #define MCBSP_GetXmtEventId  MCBSP_getXmtEventId        
  #define MCBSP_GetRcvEventId  MCBSP_getRcvEventId        
  #define MCBSP_Read           MCBSP_read 
  #define MCBSP_Write          MCBSP_write   
  #define MCBSP_EnableXmt      MCBSP_enableXmt        
  #define MCBSP_EnableRcv      MCBSP_enableRcv        
  #define MCBSP_EnableFsync    MCBSP_enableFsync        
  #define MCBSP_EnableSrgr     MCBSP_enableSrgr        
  #define MCBSP_Xrdy           MCBSP_xrdy         
  #define MCBSP_Rrdy           MCBSP_rrdy         
  #define MCBSP_Xempty         MCBSP_xempty        
  #define MCBSP_Rfull          MCBSP_rfull        
  #define MCBSP_XsyncErr       MCBSP_xsyncerr        
  #define MCBSP_RsyncErr       MCBSP_rsyncerr        

  #define MCBSP_SPCR_DXENA_NA               (0x00000000)
  #define MCBSP_RCR_RWDREVRS_NA             (0x00000000)
  #define MCBSP_RCR_RPHASE2_NA              (0x00000000)
  #define MCBSP_RCR_RPHASE2_NORMAL          (0x00000000)
  #define MCBSP_RCR_RPHASE2_OPPOSITE        (0x00000000)
  #define MCBSP_XCR_XWDREVRS_NA             (0x00000000)
  #define MCBSP_XCR_XPHASE2_NA              (0x00000000)
  #define MCBSP_XCR_XPHASE2_NORMAL          (0x00000000)
  #define MCBSP_XCR_XPHASE2_OPPOSITE        (0x00000000)

  #define MCBSP_DRR_OFFSET   0
  #define MCBSP_DXR_OFFSET   1
  #define MCBSP_SPCR_OFFSET  2
  #define MCBSP_RCR_OFFSET   3
  #define MCBSP_XCR_OFFSET   4
  #define MCBSP_SRGR_OFFSET  5
  #define MCBSP_MCR_OFFSET   6
  #define MCBSP_RCER_OFFSET  7
  #define MCBSP_XCER_OFFSET  8
  #define MCBSP_PCR_OFFSET   9

  #define MCBSP_ALLOCATED(hMcbsp) ((hMcbsp)->Allocated)
  #define MCBSP_XMTEVENTID(hMcbsp) ((hMcbsp)->XmtEventId)
  #define MCBSP_RCVEVENTID(hMcbsp) ((hMcbsp)->RcvEventId)
  #define MCBSP_DRR(hMcbsp)  (((hMcbsp)->BaseAddr)[MCBSP_DRR_OFFSET])
  #define MCBSP_DXR(hMcbsp)  (((hMcbsp)->BaseAddr)[MCBSP_DXR_OFFSET])
  #define MCBSP_SPCR(hMcbsp) (((hMcbsp)->BaseAddr)[MCBSP_SPCR_OFFSET])
  #define MCBSP_RCR(hMcbsp)  (((hMcbsp)->BaseAddr)[MCBSP_RCR_OFFSET])
  #define MCBSP_XCR(hMcbsp)  (((hMcbsp)->BaseAddr)[MCBSP_XCR_OFFSET])
  #define MCBSP_SRGR(hMcbsp) (((hMcbsp)->BaseAddr)[MCBSP_SRGR_OFFSET])
  #define MCBSP_MCR(hMcbsp)  (((hMcbsp)->BaseAddr)[MCBSP_MCR_OFFSET])
  #define MCBSP_RCER(hMcbsp) (((hMcbsp)->BaseAddr)[MCBSP_RCER_OFFSET])
  #define MCBSP_XCER(hMcbsp) (((hMcbsp)->BaseAddr)[MCBSP_XCER_OFFSET])
  #define MCBSP_PCR(hMcbsp)  (((hMcbsp)->BaseAddr)[MCBSP_PCR_OFFSET])