dec5502_dma.c

DEC5502_USB程序主要实现了与PC机应用程序之间的USB通讯

EMIF_SDEXT1_RMK(					// SDRAM Extension Register 1
  EMIF_SDEXT1_R2WDQM_1CYCLE,
  EMIF_SDEXT1_RD2WR_3CYCLES,
  EMIF_SDEXT1_RD2DEAC_1CYCLE,
  EMIF_SDEXT1_RD2RD_1CYCLE,
  EMIF_SDEXT1_THZP_OF(1),			// tPROZ2=2
  EMIF_SDEXT1_TWR_OF(0),			//
  EMIF_SDEXT1_TRRD_2CYCLES,
  EMIF_SDEXT1_TRAS_OF(4),
  EMIF_SDEXT1_TCL_2CYCLES
  ),
EMIF_SDEXT2_RMK(					// SDRAM Extension Register 2
  EMIF_SDEXT2_WR2RD_0CYCLES,
  EMIF_SDEXT2_WR2DEAC_1CYCLE,
  0,
  EMIF_SDEXT2_R2WDQM_1CYCLE
  ),
EMIF_CE1SEC1_DEFAULT,				// CE1 Secondary Control Register 1
EMIF_CE0SEC1_DEFAULT,				// CE0 Secondary Control Register 1
EMIF_CE2SEC1_DEFAULT,				// CE2 Secondary Control Register 1
EMIF_CE3SEC1_DEFAULT,				// CE3 Secondary Control Register 1
EMIF_CESCR_DEFAULT					// CE Size Control Register								
  };
  
/* Define and initialize the GPT module configuration structure  */
GPT_Config  MyGptConfig = {
0, 									//Emulation management register
0,		 							//GPIO interrupt control register
0,	 								//GPIO enable register
0,		 							//GPIO direction register
0,		 							//GPIO data register
0xFFFF, 							//Timer period register 1
0xFFFF,	 							//Timer period register 2
0xFFFF,								//Timer period register 3
0xFFFF, 							//Timer period register 4
GPT_GPTCTL1_RMK(					//Timer control register 1
  GPT_GPTCTL1_TIEN_NOT_GATED,
  GPT_GPTCTL1_CLKSRC_VBUS,
  GPT_GPTCTL1_ENAMODE_ONCE,			//The timer is enabled one time
  GPT_GPTCTL1_PWID_INACTIVE_1CYCLE,
  GPT_GPTCTL1_CP_CLOCK_MODE,
  GPT_GPTCTL1_INVIN_DONT_INVERT_OUTPUT,
  GPT_GPTCTL1_INVOUT_DONT_INVERT_OUTPUT
  ), 			
GPT_GPTCTL2_RMK(					//Timer control register 2
  GPT_GPTCTL2_TIEN_NOT_GATED,
  GPT_GPTCTL2_CLKSRC_VBUS,
  GPT_GPTCTL2_ENAMODE_CONTINUOUS,
  GPT_GPTCTL2_PWID_INACTIVE_1CYCLE,
  GPT_GPTCTL2_CP_CLOCK_MODE,
  GPT_GPTCTL2_INVIN_DONT_INVERT_OUTPUT,
  GPT_GPTCTL2_INVOUT_DONT_INVERT_OUTPUT
  ), 			
GPT_GPTGCTL1_RMK(					//Global timer control register
  GPT_GPTGCTL1_PSC34_DEFAULT,
  GPT_GPTGCTL1_TIMMODE_64BIT_GPTIM,	//The timer is in the 64-bit general-purpose timer mode
  GPT_GPTGCTL1_TIM34RS_NOT_IN_RESET,
  GPT_GPTGCTL1_TIM12RS_NOT_IN_RESET
  ) 	
};

/* Create a TIMER_Handle object for use with TIMER_open */
GPT_Handle 	 hGpt;

/* Function prototypes */
void TaskFxn(void);

/* Define a DMA_Handle object */
DMA_Handle MyDmaH;
Uint16 i, j;   
Uint16 Errcount = 0;

/* Define three int variables to get the values of GP timer 0 */
Uint16 cnt1 = 0;
Uint16 cnt2 = 0;
Uint16 cnt3 = 0;
Uint16 cnt4 = 0;

/********************************************************************/
/* NOTE:															*/
/*------------------------------------------------------------------*/
/* 	Because software reset have no effect on count registers,   	*/	
/* 	So in order to get the correct time value of DMA transifer, 	*/
/* 	We should take following steps for next time run: 				*/
/* 		First:  Reset CPU through Debug ->Reset CPU operation     	*/
/* 		Second: Click Debug->Restart								*/
/* 		Third:  Click Debug->Go Main 								*/
/* 		Finally: Press the RUN graphic button to run program		*/
/*------------------------------------------------------------------*/
/* 	When source and destination ports all take burst and data 		*/
/*  package mode , The process of DMA transifer will take about		*/
/*  5.3 ms. If source and destination  ports are taken NO-burst		*/
/*  and No-data package mode, it will take about 4.7ms(if main 		*/
/*  frequency is 300MHz, take about 3.42ms) 						*/
/********************************************************************/

void main(void)
{
    /* Initialize CSL library - This is REQUIRED!!! */
    CSL_init();
    
    /* 设置系统的运行速度为300MHz */
    PLL_setFreq(1, 0xF, 0, 1, 3, 3, 0);
    
    /* EMIF为全EMIF接口 */
    CHIP_RSET(XBSR,0x0001);
    
    /* 初始化DSP的外部SDRAM */
    EMIF_config(&MyEmifConfig);
    
    /* Open Timer 0, set registers to power on defaults */
	/* And return handle of Timer 0 */
	hGpt = GPT_open(GPT_DEV0, GPT_OPEN_RESET);
   
    /* Write configuration structure values to Timer 0 control regs */ 
	GPT_config(hGpt, &MyGptConfig); 

    /* Initialize source and destination buffers    */
    for (i = 0; i <= (DataLength - 1); i++)
    {
        DstData[i] = 0;
        SrcData[i] = i + 1;
    }

    /* Call Function For DMA Transfer */
    TaskFxn();
    	
}

void TaskFxn(void)
{
    /* Open DMA Channel 0 */
    MyDmaH = DMA_open(DMA_CHA0, 0);    

    /* By default, the TMS320C55xx compiler assigns all data symbols word */
    /* addresses. The DMA however, expects all addresses to be byte       */
    /* addresses. Therefore, we must shift the address by 2 in order to   */
    /* change the word address to a byte address forthe DMA transfer.     */   
    MyConfig.dmacssal = (DMA_AdrPtr)(((Uint32)(MyConfig.dmacssal)<<1)&0xFFFF);
    MyConfig.dmacdsal = (DMA_AdrPtr)(((Uint32)(MyConfig.dmacdsal)<<1)&0xFFFF);

	MyConfig.dmacssau = (((Uint32) &SrcData) >> 15) & 0xFFFF;
	MyConfig.dmacdsau = (((Uint32) &DstData) >> 15) & 0xFFFF;
	
    /* Write configuration structure values to DMA control registers */
    DMA_config(MyDmaH, &MyConfig);                   

	/* Start Timer 0 */
	GPT_start(hGpt);

    /* Enable DMA channel to begin transfer */
    DMA_start(MyDmaH);
	
    /* Wait for FRAME status bit in DMA status register to signal */
    /* transfer is complete.                                      */
    while (!DMA_FGETH(MyDmaH,DMACSR,FRAME)) 
    {
    	/* Wait for FRAME status bit to set to indicate frame transifer is completed */
    }
	
	/* Stop Timer */
	GPT_stop(hGpt);
	
	/* Get the values of timer count registers */
	cnt1 = MYGPTCINT1_0;
	cnt2 = MYGPTCINT2_0;
	cnt3 = MYGPTCINT3_0;
	cnt4 = MYGPTCINT4_0;
	
    /* Check data values to make sure transfer happened correctly */
    
    for (i = 0; i <= (DataLength - 1); i++) 
    {
        if (DstData[i] != SrcData[i]) 
        {
            ++Errcount;
        }
    }
            
    if (Errcount) 
    {
        printf("SEED_DEC5502 DMA 操作失败\n");
    }
    else 
    {
        printf("SEED_DEC5502 DMA 操作成功\n");
    }
 
    /* We are through with DMA, so close it */
    DMA_close(MyDmaH); 
}

/******************************************************************************\
* End of DEC5502_DMA.c
\******************************************************************************/