reg0370qam.h

st7710的tuner标准驱动

/*---------------------------------------------------------------
File Name: reg0370qam.h 

Description:

    STB0370QAM register map and functions

Copyright (C) 2005-2006 STMicroelectronics

   date: 
version: 
 author: 
comment: 

Revision History:

Reference:
    ST API Definition "TUNER Driver API" DVD-API-06
---------------------------------------------------------------------------- */

/* define to prevent recursive inclusion */
#ifndef __STTUNER_DEMOD_R0370QAM_H
#define __STTUNER_DEMOD_R0370QAM_H


/* includes --------------------------------------------------------------- */

#include "stlite.h"
#include "ioarch.h"
#include "ioreg.h"


#ifdef __cplusplus
extern "C"
{
#endif                          /* __cplusplus */

/* register mappings ------------------------------------------------------- */

/*
 REGISTERS and FIELDS
*/

/* ID */
 #define R0370QAM_ID 0xf000
 #define F0370QAM_IDENTIFICATIONREGISTER 0xf00000ff

/* I2C_PAGE */
 #define R0370QAM_I2C_PAGE 0xf001
 #define F0370QAM_REG_PAGE_ADRESS 0xf001000f

/* I2CRPT1 */
 #define R0370QAM_I2CRPT1 0xf002
 #define F0370QAM_I2CT_ON_1 0xf0020080
 #define F0370QAM_ENARPT_LEVEL_1 0xf0020070
 #define F0370QAM_SCLT_DELAY_1 0xf0020008
 #define F0370QAM_SCLT_NOD_1 0xf0020004
 #define F0370QAM_STOP_ENABLE_1 0xf0020002
 #define F0370QAM_SDAT_NOD_1 0xf0020001

/* I2CRPT2 */
 #define R0370QAM_I2CRPT2 0xf003
 #define F0370QAM_I2CT_ON_2 0xf0030080
 #define F0370QAM_ENARPT_LEVEL_2 0xf0030070
 #define F0370QAM_SCLT_DELAY_2 0xf0030008
 #define F0370QAM_SCLT_NOD_2 0xf0030004
 #define F0370QAM_STOP_ENABLE_2 0xf0030002
 #define F0370QAM_SDAT_NOD_2 0xf0030001

/* CLK_CTRL */
 #define R0370QAM_CLK_CTRL 0xf004
 #define F0370QAM_CLKDIVQAM_DIS 0xf0040080
 #define F0370QAM_EN_EXTCLK_VSB 0xf0040040
 #define F0370QAM_EN_EXTCLK_QAM 0xf0040020
 #define F0370QAM_CLK50_QAM 0xf0040008
 #define F0370QAM_CLK50_VSBDEM 0xf0040004
 #define F0370QAM_EN_CLKOSC 0xf0040002
 #define F0370QAM_BYPASS_PLL 0xf0040001

/* STANDBY */
 #define R0370QAM_STANDBY 0xf005
 #define F0370QAM_STANDBY_TUNER 0xf0050080
 #define F0370QAM_STANDBY_NCO 0xf0050040
 #define F0370QAM_STANDBY_AD10 0xf0050020
 #define F0370QAM_STANDBY_OOB 0xf0050008
 #define F0370QAM_STANDBY_QAM 0xf0050004
 #define F0370QAM_STANDBY_VSB 0xf0050002
 #define F0370QAM_SEL_VSB 0xf0050001

/* IO_CTRL */
 #define R0370QAM_IO_CTRL 0xf006
 #define F0370QAM_TS_HIGHZ 0xf0060080
 #define F0370QAM_OOB_OUT_HIGHZ 0xf0060040
 #define F0370QAM_ACI_IO_NOD 0xf0060020
 #define F0370QAM_AGC1_VSB_NOD 0xf0060010
 #define F0370QAM_AGC2_VSB_NOD 0xf0060008
 #define F0370QAM_AGC1_QAM_NOD 0xf0060004
 #define F0370QAM_AGC2_QAM_NOD 0xf0060002
 #define F0370QAM_AGC_OOB_NOD 0xf0060001

/* GPIO_INFO */
 #define R0370QAM_GPIO_INFO 0xf007
 #define F0370QAM_ACI_3PINS 0xf0070080
 #define F0370QAM_SETINFO 0xf0070007

/* AD_INTERF */
 #define R0370QAM_AD_INTERF 0xf640
 #define F0370QAM_INV_CLK_AD8 0xf6400080
 #define F0370QAM_DIS_SYNC_AD8 0xf6400040
 #define F0370QAM_FIFO_STOP 0xf6400020
 #define F0370QAM_QAM_FIFO_SRST 0xf6400008
 #define F0370QAM_VSB_FIFO_SRST 0xf6400004
 #define F0370QAM_INV_CLK_AD10 0xf6400002
 #define F0370QAM_DIS_FIFO 0xf6400001

/* TEST_AD_IF */
 #define R0370QAM_TEST_AD_IF 0xf641
 #define F0370QAM_SEL_OUT_AD8 0xf6410010
 #define F0370QAM_SEL_OUT_AD10 0xf641000c
 #define F0370QAM_DSAMPLE_RAT 0xf6410003

/* PLL_CTRL */
 #define R0370QAM_PLL_CTRL 0xf610
 #define F0370QAM_EN_CLKAD10 0xf6100080
 #define F0370QAM_EN_CLKAD8 0xf6100040
 #define F0370QAM_RFILT 0xf6100010
 #define F0370QAM_SELICP 0xf6100008
 #define F0370QAM_DIV 0xf6100004
 #define F0370QAM_NOT_PWR_DN 0xf6100002
 #define F0370QAM_NOT_RESET 0xf6100001

/* PLL_TEST */
 #define R0370QAM_PLL_TEST 0xf611
 #define F0370QAM_SEL12DIV 0xf6110010
 #define F0370QAM_TESTDIV_VSB 0xf6110008
 #define F0370QAM_EN_BYP_DIV34 0xf6110004
 #define F0370QAM_PFD 0xf6110003

/* NCO_PLL1 */
 #define R0370QAM_NCO_PLL1 0xf612
 #define F0370QAM_RFILT1 0xf6120020
 #define F0370QAM_SELICP1 0xf6120018
 #define F0370QAM_MDIV 0xf6120006
 #define F0370QAM_NOT_PWR_DN1 0xf6120001

/* NCO_PLL2 */
 #define R0370QAM_NCO_PLL2 0xf613
 #define F0370QAM_RFILT2 0xf6130020
 #define F0370QAM_SELICP2 0xf6130018
 #define F0370QAM_NOT_PWR_DN2 0xf6130001

/* NCO_TST_PLL */
 #define R0370QAM_NCO_TST_PLL 0xf614
 #define F0370QAM_PFD_PLL2 0xf6140030
 #define F0370QAM_EN_TESTCLKIN2 0xf6140008
 #define F0370QAM_PFD_PLL1 0xf6140006
 #define F0370QAM_EN_TESTCLKIN1 0xf6140001

/* NCO_CTRL */
 #define R0370QAM_NCO_CTRL 0xf615
 #define F0370QAM_ENPRG 0xf6150010
 #define F0370QAM_SDIV 0xf615000c
 #define F0370QAM_NRSTM11 0xf6150002
 #define F0370QAM_NRST 0xf6150001

/* NCO_SYNTH_COARSE_FREQ */
 #define R0370QAM_NCO_SYNTH_COARSE_FREQ 0xf616
 #define F0370QAM_MD 0xf616001f

/* NCO_SYNTH_FINE_FREQ_1 */
 #define R0370QAM_NCO_SYNTH_FINE_FREQ_1 0xf617
 #define F0370QAM_PE_MSB 0xf617007f

/* NCO_SYNTH_FINE_FREQ_0 */
 #define R0370QAM_NCO_SYNTH_FINE_FREQ_0 0xf618
 #define F0370QAM_PE_LSB 0xf61800ff

/* OOB_TUNER_CTRL */
 #define R0370QAM_OOB_TUNER_CTRL 0xf619
 #define F0370QAM_ONTESTBUF 0xf6190080
 #define F0370QAM_MUXSEL 0xf6190010
 #define F0370QAM_VLOSEL 0xf6190008
 #define F0370QAM_NPDAD8 0xf6190004
 #define F0370QAM_NPDIF 0xf6190002
 #define F0370QAM_NPDRF 0xf6190001

/* AD10_CTRL */
 #define R0370QAM_AD10_CTRL 0xf61c
 #define F0370QAM_INMODE 0xf61c0010
 #define F0370QAM_ECO 0xf61c0008
 #define F0370QAM_PWR_DN_MUX 0xf61c0004
 #define F0370QAM_PWR_OFF_REF 0xf61c0002
 #define F0370QAM_PWR_OFF 0xf61c0001

/* EQU_0 */
 #define R0370QAM_EQU_0 0xf410
 #define F0370QAM_MODE_SEL 0xf41000f0
 #define F0370QAM_U_THRESHOLD 0xf410000f

/* EQU_1 */
 #define R0370QAM_EQU_1 0xf411
 #define F0370QAM_INITIAL_U 0xf41100f0
 #define F0370QAM_BLIND_U 0xf411000f

/* EQU_2 */
 #define R0370QAM_EQU_2 0xf412
 #define F0370QAM_LMS_STEP2_TST 0xf41200c0
 #define F0370QAM_NBLINB 0xf4120020
 #define F0370QAM_CRCTEST 0xf4120010
 #define F0370QAM_EQ_COEFF_CTRL 0xf412000c
 #define F0370QAM_EQ_FSM_CTRL 0xf4120003

/* EQU_3 */
 #define R0370QAM_EQU_3 0xf413
 #define F0370QAM_INV_SPEC_MAPPING 0xf4130010
 #define F0370QAM_LOCK_DETECT_ENA 0xf4130008
 #define F0370QAM_TIME_CNST 0xf4130007

/* EQU_5 */
 #define R0370QAM_EQU_5 0xf415
 #define F0370QAM_CORNER_RATE_MSB 0xf415000f

/* EQU_4 */
 #define R0370QAM_EQU_4 0xf414
 #define F0370QAM_CORNER_RATE_LSB 0xf41400ff

/* EQU_6 */
 #define R0370QAM_EQU_6 0xf416
 #define F0370QAM_TARGET_RATE_LSB 0xf41600ff

/* EQU_7 */
 #define R0370QAM_EQU_7 0xf417
 #define F0370QAM_TARGET_RATE_MSB 0xf417000f

/* EQU_9 */
 #define R0370QAM_EQU_9 0xf419
 #define F0370QAM_NOISE_EST_MSB 0xf419003f

/* EQU_8 */
 #define R0370QAM_EQU_8 0xf418
 #define F0370QAM_NOISE_EST_LSB 0xf41800ff

/* EQU_10 */
 #define R0370QAM_EQU_10 0xf41a
 #define F0370QAM_Q_CONST 0xf41a00ff

/* EQU_11 */
 #define R0370QAM_EQU_11 0xf41b
 #define F0370QAM_I_CONST 0xf41b00ff

/* INITDEM_0 */
 #define R0370QAM_INITDEM_0 0xf41c
 #define F0370QAM_DEM_FREQ_LSB 0xf41c00ff

/* INITDEM_1 */
 #define R0370QAM_INITDEM_1 0xf41d
 #define F0370QAM_DEM_FREQ_MSB 0xf41d00ff

/* INITDEM_2 */
 #define R0370QAM_INITDEM_2 0xf41f
 #define F0370QAM_SCAN_STEP_LSB 0xf41f00fc

/* INITDEM_3 */
 #define R0370QAM_INITDEM_3 0xf41e
 #define F0370QAM_CHSCANITEN 0xf41e0080
 #define F0370QAM_CHSCANITSOFT 0xf41e0040
 #define F0370QAM_SCAN_STEP_MSB 0xf41e003f

/* INITDEM_4 */
 #define R0370QAM_INITDEM_4 0xf420
 #define F0370QAM_LATENCY 0xf42000ff

/* INITDEM_5 */
 #define R0370QAM_INITDEM_5 0xf421
 #define F0370QAM_IN_DEMOD_EN 0xf4210080
 #define F0370QAM_SCAN_ON 0xf4210040
 #define F0370QAM_AUTOSTOP 0xf4210020
 #define F0370QAM_SCALE_A 0xf4210010
 #define F0370QAM_SCALE_B 0xf421000c

/* DELAGC_0 */
 #define R0370QAM_DELAGC_0 0xf422
 #define F0370QAM_AGC2MAX 0xf42200ff

/* DELAGC_1 */
 #define R0370QAM_DELAGC_1 0xf423
 #define F0370QAM_AGC2MIN 0xf42300ff

/* DELAGC_2 */
 #define R0370QAM_DELAGC_2 0xf424
 #define F0370QAM_AGC1MAX 0xf42400ff

/* DELAGC_3 */
 #define R0370QAM_DELAGC_3 0xf425
 #define F0370QAM_AGC1MIN 0xf42500ff

/* DELAGC_4 */
 #define R0370QAM_DELAGC_4 0xf426
 #define F0370QAM_RATIO_A 0xf42600e0
 #define F0370QAM_RATIO_B 0xf4260018
 #define F0370QAM_RATIO_C 0xf4260007

/* DELAGC_5 */
 #define R0370QAM_DELAGC_5 0xf427
 #define F0370QAM_AGC2_TH 0xf42700ff

/* DELAGC_6 */
 #define R0370QAM_DELAGC_6 0xf428
 #define F0370QAM_DAGC_ON 0xf4280080
 #define F0370QAM_FRZ2CTRL 0xf4280060
 #define F0370QAM_FRZ1CTRL 0xf4280018

/* DELAGC_7 */
 #define R0370QAM_DELAGC_7 0xf429
 #define F0370QAM_AD_AVERAGE_LSB 0xf42900f0
 #define F0370QAM_TIMECST 0xf429000e

/* DELAGC_8 */
 #define R0370QAM_DELAGC_8 0xf42a
 #define F0370QAM_AD_AVERAGE_MSB 0xf42a00ff

/* DELAGC_9 */
 #define R0370QAM_DELAGC_9 0xf42b
 #define F0370QAM_AGC2SD1_LSB 0xf42b00ff

/* DELAGC_10 */
 #define R0370QAM_DELAGC_10 0xf42c
 #define F0370QAM_AGC2SD1_MSB 0xf42c0003

/* DELAGC_13 */
 #define R0370QAM_DELAGC_13 0xf430
 #define F0370QAM_AGC2SD2_MSB 0xf4300003

/* DELAGC_12 */
 #define R0370QAM_DELAGC_12 0xf42f
 #define F0370QAM_AGC2SD2_LSB 0xf42f00ff

/* WBAGC_1 */
 #define R0370QAM_WBAGC_1 0xf432
 #define F0370QAM_AGC_OD 0xf4320040
 #define F0370QAM_ACQ_TH 0xf432003c
 #define F0370QAM_AGC2SD_MSB 0xf4320003

/* WBAGC_0 */
 #define R0370QAM_WBAGC_0 0xf431
 #define F0370QAM_AGC2SD_LSB 0xf43100ff

/* WBAGC_2 */
 #define R0370QAM_WBAGC_2 0xf433
 #define F0370QAM_I_REF 0xf433007f

/* WBAGC_3 */
 #define R0370QAM_WBAGC_3 0xf434
 #define F0370QAM_WAGC_CLR 0xf4340040
 #define F0370QAM_WAGC_INV 0xf4340020
 #define F0370QAM_WAGC_EN 0xf4340010
 #define F0370QAM_WAGC_ACQ 0xf4340008
 #define F0370QAM_QAM_SWAP 0xf4340004

/* WBAGC_5 */
 #define R0370QAM_WBAGC_5 0xf436
 #define F0370QAM_ACQ_COUNT_MSB 0xf43600ff

/* WBAGC_4 */
 #define R0370QAM_WBAGC_4 0xf435
 #define F0370QAM_ACQ_COUNT_LSB 0xf43500ff

/* WBAGC_7 */
 #define R0370QAM_WBAGC_7 0xf438
 #define F0370QAM_ROLL_MSB 0xf43800ff

/* WBAGC_6 */
 #define R0370QAM_WBAGC_6 0xf437
 #define F0370QAM_ROLL_LSB 0xf43700ff

/* STLOOP_0 */
 #define R0370QAM_STLOOP_0 0xf439
 #define F0370QAM_DIRECT_GAIN_LSB 0xf43900ff

/* STLOOP_1 */
 #define R0370QAM_STLOOP_1 0xf43a
 #define F0370QAM_DIRECT_GAIN_MSB 0xf43a0007

/* STLOOP_2 */
 #define R0370QAM_STLOOP_2 0xf43b
 #define F0370QAM_INTEGRAL_GAIN_LSB 0xf43b00ff

/* STLOOP_3 */
 #define R0370QAM_STLOOP_3 0xf43c
 #define F0370QAM_GAIN_SCALE_PATH0 0xf43c00e0
 #define F0370QAM_GAIN_SCALE_PATH1 0xf43c001c
 #define F0370QAM_INTEGRAL_GAIN_MSB 0xf43c0003

/* STLOOP_7 */
 #define R0370QAM_STLOOP_7 0xf440
 #define F0370QAM_SYMB_RATE_3 0xf44000ff

/* STLOOP_6 */
 #define R0370QAM_STLOOP_6 0xf43f
 #define F0370QAM_SYMB_RATE_2 0xf43f00ff

/* STLOOP_5 */
 #define R0370QAM_STLOOP_5 0xf43e
 #define F0370QAM_SYMB_RATE_1 0xf43e00ff

/* STLOOP_4 */
 #define R0370QAM_STLOOP_4 0xf43d
 #define F0370QAM_SYMB_RATE_0 0xf43d00ff

/* STLOOP_8 */
 #define R0370QAM_STLOOP_8 0xf441
 #define F0370QAM_PHASE_EN 0xf4410040
 #define F0370QAM_PHASE_CLR 0xf4410020
 #define F0370QAM_ERR_RANGE 0xf441001f

/* STLOOP_9 */
 #define R0370QAM_STLOOP_9 0xf442
 #define F0370QAM_ROLLOFF 0xf44200c0
 #define F0370QAM_ALGOSEL 0xf4420030
 #define F0370QAM_DIR 0xf4420008
 #define F0370QAM_EN_DIR 0xf4420004
 #define F0370QAM_ERR_CLR 0xf4420002
 #define F0370QAM_ERR_EN 0xf4420001

/* CRL_0 */
 #define R0370QAM_CRL_0 0xf443
 #define F0370QAM_BYP_SEC_LOOP 0xf4430080
 #define F0370QAM_GAIN_DIR 0xf4430070
 #define F0370QAM_GAIN_INT 0xf443000f

/* CRL_1 */
 #define R0370QAM_CRL_1 0xf444
 #define F0370QAM_DGAIN_SEC_LOOP 0xf44400f0
 #define F0370QAM_GAIN_DIR_ADJ 0xf444000c
 #define F0370QAM_GAIN_INT_ADJ 0xf4440003

/* CRL_2 */
 #define R0370QAM_CRL_2 0xf445
 #define F0370QAM_PN_LOOP_SEL 0xf4450040
 #define F0370QAM_INT_DIS 0xf4450020
 #define F0370QAM_DIR_DIS 0xf4450010
 #define F0370QAM_INT_EN 0xf4450008
 #define F0370QAM_DIR_EN 0xf4450004
 #define F0370QAM_PH_EN 0xf4450002
 #define F0370QAM_SW_EN 0xf4450001

/* CRL_3 */
 #define R0370QAM_CRL_3 0xf446
 #define F0370QAM_CRL_SNAPSHOT 0xf44600ff

/* CRL_7 */
 #define R0370QAM_CRL_7 0xf449
 #define F0370QAM_APHASE_2 0xf44900ff

/* CRL_5 */
 #define R0370QAM_CRL_5 0xf448
 #define F0370QAM_APHASE_1 0xf44800ff

/* CRL_4 */
 #define R0370QAM_CRL_4 0xf447
 #define F0370QAM_APHASE_0 0xf44700ff

/* CRL_11 */
 #define R0370QAM_CRL_11 0xf44d
 #define F0370QAM_IPHASE_3 0xf44d000f

/* CRL_10 */
 #define R0370QAM_CRL_10 0xf44c
 #define F0370QAM_IPHASE_2 0xf44c00ff

/* CRL_9 */