reg0297.h

st7710的tuner标准驱动

/*---------------------------------------------------------------
File Name: reg0297.h (was reg0299.h)

Description: 

    STV0297 register map and functions

Copyright (C) 1999-2001 STMicroelectronics

   date: 01-October-2001
version: 3.2.0
 author: from STV0299 and MB validation drivers.
comment: Write for multi-instance/multi-FrontEnd.

Revision History:
    
Reference:
    ST API Definition "TUNER Driver API" DVD-API-06
---------------------------------------------------------------------------- */

/* define to prevent recursive inclusion */
#ifndef __STTUNER_DEMOD_R0297_H
#define __STTUNER_DEMOD_R0297_H


/* includes --------------------------------------------------------------- */

#include "stlite.h"
#include "ioarch.h"
#include "ioreg.h"


#ifdef __cplusplus
extern "C"
{
#endif                          /* __cplusplus */



/* register mappings ------------------------------------------------------- */

/*
 REGISTERS
*/

/* EQU_0 */
 #define R0297_EQU_0 0x0
 #define  F0297_U_THRESHOLD 0xf
 #define  F0297_MODE_SELECT 0x70

/* EQU_1 */
 #define R0297_EQU_1 0x1
 #define  F0297_BLIND_U 0x1000f
 #define  F0297_INITIAL_U 0x100f0

/* EQU_3 */
 #define R0297_EQU_3 0x3
 #define  F0297_EQ_FSM_CTL 0x30003
 #define  F0297_EQ_COEFF_CTL 0x3000c

/* EQU_4 */
 #define R0297_EQU_4 0x4
 #define  F0297_NBLIND 0x40001

/* EQU_7 */
 #define R0297_EQU_7 0x7
 #define  F0297_NOISE_EST_LO 0x700ff

/* EQU_8 */
 #define R0297_EQU_8 0x8
 #define  F0297_NOISE_EST_HI 0x800ff

/* INITDEM_0 */
 #define R0297_INITDEM_0 0x20
 #define  F0297_DEM_FQCY_LO 0x2000ff

/* INITDEM_1 */
 #define R0297_INITDEM_1 0x21
 #define  F0297_DEM_FQCY_HI 0x2100ff

/* INITDEM_2 */
 #define R0297_INITDEM_2 0x22
 #define  F0297_LATENCY 0x2200ff

/* INITDEM_3 */
 #define R0297_INITDEM_3 0x23
 #define  F0297_SCAN_STEP_LO 0x2300ff

/* INITDEM_4 */
 #define R0297_INITDEM_4 0x24
 #define  F0297_CHSCANITEN 0x240080
 #define  F0297_CHSCANITSOFT 0x240040
 #define  F0297_SCAN_STEP_HI 0x24003f

/* INITDEM_5 */
 #define R0297_INITDEM_5 0x25
 #define  F0297_IN_DEMOD_EN 0x250080
 #define  F0297_SCAN_ON 0x250040
 #define  F0297_AUTOSTOP 0x250020
 #define  F0297_SCALE_A 0x250010
 #define  F0297_SCALE_B 0x25000c

/* DELAGC_0 */
 #define R0297_DELAGC_0 0x30
 #define  F0297_AGC2MAX 0x3000ff

/* DELAGC_1 */
 #define R0297_DELAGC_1 0x31
 #define  F0297_AGC2MIN 0x3100ff

/* DELAGC_2 */
 #define R0297_DELAGC_2 0x32
 #define  F0297_AGC1MAX 0x3200ff

/* DELAGC_3 */
 #define R0297_DELAGC_3 0x33
 #define  F0297_AGC1MIN 0x3300ff

/* DELAGC_4 */
 #define R0297_DELAGC_4 0x34
 #define  F0297_RATIO_A 0x3400e0
 #define  F0297_RATIO_B 0x340018
 #define  F0297_RATIO_C 0x340007

/* DELAGC_5 */
 #define R0297_DELAGC_5 0x35
 #define  F0297_AGC2_THRES 0x3500ff

/* DELAGC_6 */
 #define R0297_DELAGC_6 0x36
 #define  F0297_DAGC_ON 0x360080
 #define  F0297_FRZ2_CTRL 0x360060
 #define  F0297_FRZ1_CTRL 0x360018

/* DELAGC_7 */
 #define R0297_DELAGC_7 0x37
 #define  F0297_TIME_CST 0x370070
 #define  F0297_OVF_RATE_LO 0x37000f
 #define  F0297_CORNER_RATE_LO 0x37000f

/* DELAGC_8 */
 #define R0297_DELAGC_8 0x38
 #define  F0297_OVF_RATE_HI 0x3800ff
 #define  F0297_CORNER_RATE_HI 0x3800ff

/* WBAGC_0 */
 #define R0297_WBAGC_0 0x40
 #define  F0297_I_REF 0x4000ff

/* WBAGC_1 */
 #define R0297_WBAGC_1 0x41
 #define  F0297_AGC2SD_LO 0x4100ff

/* WBAGC_2 */
 #define R0297_WBAGC_2 0x42
 #define  F0297_AGC2SD_HI 0x420003
 #define  F0297_ACQ_THRESH 0x42003c

/* WBAGC_3 */
 #define R0297_WBAGC_3 0x43
 #define  F0297_WAGC_CLR 0x430040
 #define  F0297_WAGC_INV 0x430020
 #define  F0297_WAGC_EN 0x430010
 #define  F0297_WAGC_ACQ 0x430008
 #define  F0297_SWAP 0x430004

/* WBAGC_4 */
 #define R0297_WBAGC_4 0x44
 #define  F0297_ROLL_LO 0x4400ff

/* WBAGC_5 */
 #define R0297_WBAGC_5 0x45
 #define  F0297_ACQ_COUNT_LO 0x4500ff

/* WBAGC_6 */
 #define R0297_WBAGC_6 0x46
 #define  F0297_ACQ_COUNT_HI 0x4600ff

/* WBAGC_9 */
 #define R0297_WBAGC_9 0x49
 #define  F0297_ROLL_HI 0x4900ff

/* WBAGC_10 */
 #define R0297_WBAGC_10 0x4a
 #define  F0297_IF_PWM_LO 0x4a00ff
 #define  F0297_TARGET_RATE_LO 0x4a00ff

/* WBAGC_11 */
 #define R0297_WBAGC_11 0x4b
 #define  F0297_IF_PWM_HI 0x4b00ff
 #define  F0297_TARGET_RATE_HI 0x4b00ff

/* STLOOP_2 */
 #define R0297_STLOOP_2 0x52
 #define  F0297_GAIN_SCALE_PATH0 0x5200e0
 #define  F0297_GAIN_SCALE_PATH1 0x52001c
 #define  F0297_INTEGRAL_GAIN_HI 0x520003

/* STLOOP_3 */
 #define R0297_STLOOP_3 0x53
 #define  F0297_DIRECT_GAIN_LO 0x5300ff

/* STLOOP_5 */
 #define R0297_STLOOP_5 0x55
 #define  F0297_SYMB_RATE_0 0x5500ff

/* STLOOP_6 */
 #define R0297_STLOOP_6 0x56
 #define  F0297_SYMB_RATE_1 0x5600ff

/* STLOOP_7 */
 #define R0297_STLOOP_7 0x57
 #define  F0297_SYMB_RATE_2 0x5700ff

/* STLOOP_8 */
 #define R0297_STLOOP_8 0x58
 #define  F0297_SYMB_RATE_3 0x5800ff

/* STLOOP_9 */
 #define R0297_STLOOP_9 0x59
 #define  F0297_INTEGRAL_GAIN_LO 0x59001f
 #define  F0297_DIRECT_GAIN_HI 0x5900e0

/* STLOOP_10 */
 #define R0297_STLOOP_10 0x5a
 #define  F0297_PHASE_EN 0x5a0040
 #define  F0297_PHASE_CLR 0x5a0020
 #define  F0297_ERR_RANGE 0x5a001f

/* STLOOP_11 */
 #define R0297_STLOOP_11 0x5b
 #define  F0297_ALGOSEL 0x5b0030
 #define  F0297_ERR_CLR 0x5b0002
 #define  F0297_ERR_EN 0x5b0001

/* CRL_0 */
 #define R0297_CRL_0 0x60
 #define  F0297_SWEEP_LO 0x6000ff

/* CRL_1 */
 #define R0297_CRL_1 0x61
 #define  F0297_GAIN_INT 0x61000f
 #define  F0297_GAIN_DIR 0x610070

/* CRL_2 */
 #define R0297_CRL_2 0x62
 #define  F0297_GAIN_INT_ADJ 0x620003
 #define  F0297_GAIN_DIR_ADJ 0x62000c

/* CRL_3 */
 #define R0297_CRL_3 0x63
 #define  F0297_APHASE_0 0x6300ff

/* CRL_4 */
 #define R0297_CRL_4 0x64
 #define  F0297_APHASE_1 0x6400ff

/* CRL_5 */
 #define R0297_CRL_5 0x65
 #define  F0297_APHASE_2 0x6500ff

/* CRL_6 */
 #define R0297_CRL_6 0x66
 #define  F0297_IPHASE_0 0x6600ff

/* CRL_7 */
 #define R0297_CRL_7 0x67
 #define  F0297_IPHASE_1 0x6700ff

/* CRL_8 */
 #define R0297_CRL_8 0x68
 #define  F0297_IPHASE_2 0x6800ff

/* CRL_9 */
 #define R0297_CRL_9 0x69
 #define  F0297_IPHASE_3 0x69000f
 #define  F0297_SWEEP_HI 0x6900f0