📄 drv0288.h

📁 st7710的tuner标准驱动
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 #define R288_THH 0x5c
 #define F288_THH 0x5c003f

/* IND1MAX */
 #define R288_IND1MAX 0x5d
 #define F288_IND1_TRESH 0x5d00ff

/* ACCU1VAL */
 #define R288_ACCU1VAL 0x5e
 #define F288_IND1_ACC 0x5e00ff

/* ACCU2VAL */
 #define R288_ACCU2VAL 0x5f
 #define F288_IND2_ACC 0x5f00ff

/* IOPGPIO0 */
 #define R288_IOPGPIO0 0x60
 #define F288_IOP0_HIGHZ 0x600080
 #define F288_IOP0_CFG 0x60007e
 #define F288_IOP0_XOR 0x600001

/* IOPGPIO1 */
 #define R288_IOPGPIO1 0x61
 #define F288_IOP1_HIGHZ 0x610080
 #define F288_IOP1_CFG 0x61007e
 #define F288_IOP1_XOR 0x610001

/* IOPGPIO2 */
 #define R288_IOPGPIO2 0x62
 #define F288_IOP2_HIGHZ 0x620080
 #define F288_IOP2_CFG 0x62007e
 #define F288_IOP2_XOR 0x620001

/* IOPGPIO3 */
 #define R288_IOPGPIO3 0x63
 #define F288_IOP3_HIGHZ 0x630080
 #define F288_IOP3_CFG 0x63007e
 #define F288_IOP3_XOR 0x630001

/* IOPGPIO4 */
 #define R288_IOPGPIO4 0x64
 #define F288_IOP4_HIGHZ 0x640080
 #define F288_IOP4_CFG 0x64007e
 #define F288_IOP4_XOR 0x640001

/* IOPGPIO5 */
 #define R288_IOPGPIO5 0x65
 #define F288_IOP5_HIGHZ 0x650080
 #define F288_IOP5_CFG 0x65007e
 #define F288_IOP5_XOR 0x650001

/* IOPGPIO6 */
 #define R288_IOPGPIO6 0x66
 #define F288_IOP6_HIGHZ 0x660080
 #define F288_IOP6_CFG 0x66007e
 #define F288_IOP6_XOR 0x660001

/* IOPGPIO7 */
 #define R288_IOPGPIO7 0x67
 #define F288_IOP7_HIGHZ 0x670080
 #define F288_IOP7_CFG 0x67007e
 #define F288_IOP7_XOR 0x670001

/* IOPGPIO8 */
 #define R288_IOPGPIO8 0x68
 #define F288_IOP8_HIGHZ 0x680080
 #define F288_IOP8_CFG 0x68007e
 #define F288_IOP8_XOR 0x680001

/* IOPGPIO9 */
 #define R288_IOPGPIO9 0x69
 #define F288_IOP9_HIGHZ 0x690080
 #define F288_IOP9_CFG 0x69007e
 #define F288_IOP9_XOR 0x690001

/* IOPVAL0 */
 #define R288_IOPVAL0 0x6a
 #define F288_GPIO7 0x6a0080
 #define F288_GPIO6 0x6a0040
 #define F288_GPIO5 0x6a0020
 #define F288_GPIO4 0x6a0010
 #define F288_GPIO3 0x6a0008
 #define F288_GPIO2 0x6a0004
 #define F288_GPIO1 0x6a0002
 #define F288_GPIO0 0x6a0001

/* IOPVAL1 */
 #define R288_IOPVAL1 0x6b
 #define F288_CS1 0x6b0080
 #define F288_CS0 0x6b0040
 #define F288_STDBY 0x6b0020
 #define F288_AUXCLK 0x6b0010
 #define F288_DIRCLK 0x6b0008
 #define F288_AGC 0x6b0004
 #define F288_GPIO9 0x6b0002
 #define F288_GPIO8 0x6b0001

/* IOPVAL2 */
 #define R288_IOPVAL2 0x6c
 #define F288_DISEQCOUT 0x6c0001

/* FREEDIS */
 #define R288_FREEDIS 0x70
 #define F288_DIV_XXX_FREE 0x7000ff

/* FREES */
 #define R288_FREES 0x71
 #define F288_SYSTEM_FREE1 0x7100ff

/* FREESA */
 #define R288_FREESA 0x72
 #define F288_SAMP_FREE 0x7200ff

/* FREEVIT */
 #define R288_FREEVIT 0x74
 #define F288_VITERBI_FREE 0x7400ff

/* FREERS */
 #define R288_FREERS 0x75
 #define F288_REED_SOLO_FREE55 0x7500ff

/* FREEQDM */
 #define R288_FREEQDM 0x76
 #define F288_DEMOD_FREE56 0x7600ff

/* TAGC1 */
 #define R288_TAGC1 0x81
 #define F288_SEL_ADC_PLL 0x810010
 #define F288_AGC_BEF_DC 0x810008
 #define F288_EN_AGC_PWM 0x810004
 #define F288_EN_AGC_PLF 0x810002
 #define F288_EN_AGC_TST 0x810001

/* IDCOFF */
 #define R288_IDCOFF 0x82
 #define F288_I_DC_OFFSET_VALUE 0x82003f

/* QDCOFF */
 #define R288_QDCOFF 0x83
 #define F288_Q_DC_OFFSET_VALUE 0x83003f

/* TSTR */
 #define R288_TSTR 0x84
 #define F288_EN_STRST 0x840080
 #define F288_EN_TMG_LOC2 0x840040
 #define F288_EN_TMG_LOC1 0x840020
 #define F288_EN_STR_FRAC 0x840010
 #define F288_EN_STR_ERR 0x840004
 #define F288_EN_STR_GPD 0x840002

/* TCTLT1 */
 #define R288_TCTLT1 0x85
 #define F288_SEL_COR 0x850080
 #define F288_NOISE_IND_CHOICE 0x85000c
 #define F288_SEL_TETA 0x850002
 #define F288_SEL_CTL_PLF 0x850001

/* TSTRM1 */
 #define R288_TSTRM1 0x88
 #define F288_SELOUTR1 0x880080
 #define F288_FSELRAM1 0x880040
 #define F288_FSELDEC 0x880020
 #define F288_FOEB 0x88001c
 #define F288_FADR 0x880003

/* TSTRATE */
 #define R288_TSTRATE 0x89
 #define F288_FORCEPHA 0x890080
 #define F288_TSTRATE6 0x890040
 #define F288_TSTRATE5 0x890020
 #define F288_FNEWALPHA 0x890010
 #define F288_FROT90 0x890008
 #define F288_FOFF 0x890004
 #define F288_FR1 0x890002
 #define F288_FR2 0x890001

/* SELOUT */
 #define R288_SELOUT 0x8a
 #define F288_EN_VLOG 0x8a0080
 #define F288_SELVIT60 0x8a0040
 #define F288_SELSYN3 0x8a0020
 #define F288_SELSYN2 0x8a0010
 #define F288_SELSYN1 0x8a0008
 #define F288_SELLIFO 0x8a0004
 #define F288_SELFIFO 0x8a0002
 #define F288_SELERR 0x8a0001

/* FORCEIN */
 #define R288_FORCEIN 0x8b
 #define F288_SELVITDATAIN 0x8b0080
 #define F288_FORCE_ACS 0x8b0040
 #define F288_TSTSYN 0x8b0020
 #define F288_TSTRAM64 0x8b0010
 #define F288_TSTRAM 0x8b0008
 #define F288_TSTERR2 0x8b0004
 #define F288_TSTERR1 0x8b0002
 #define F288_TSTACS 0x8b0001

/* TSTFIFOL */
 #define R288_TSTFIFOL 0x8c
 #define F288_TSTFIFO7 0x8c0080
 #define F288_TSTFIFO6 0x8c0040
 #define F288_TSTFIFO5 0x8c0020
 #define F288_TSTFIFO3 0x8c0008
 #define F288_FORMSB 0x8c0004
 #define F288_FORLSB 0x8c0002
 #define F288_TST_FIFO 0x8c0001

/* TSTCK */
 #define R288_TSTCK 0x90
 #define F288_TSTCKRST 0x900040
 #define F288_TSTCKDIL 0x900020
 #define F288_FORCERATE1 0x900008
 #define F288_FORCESYMHA 0x900004
 #define F288_FORSYMAX 0x900002
 #define F288_DIRCKINT 0x900001

/* TSTRES */
 #define R288_TSTRES 0x91
 #define F288_FRESYYY 0x910080
 #define F288_FREESRS 0x910040
 #define F288_FRESXXX 0x910020
 #define F288_FRESCAR 0x910010
 #define F288_FRESACS 0x910008
 #define F288_FRESYM 0x910004
 #define F288_FRESMAS 0x910002
 #define F288_FRESINT 0x910001

/* TSTOUT */
 #define R288_TSTOUT 0x92
 #define F288_RBACT 0x920040
 #define F288_TS 0x92000e
 #define F288_CTEST 0x920001

/* TSTIN */
 #define R288_TSTIN 0x93
 #define F288_TEST_IN 0x930080
 #define F288_EN_ADC 0x930040
 #define F288_SGN_ADC 0x930020
 #define F288_BCLK_IN 0x930010
 #define F288_TP12 0x930008

/* READREG */
 #define R288_READREG 0x94
 #define F288_READREG 0x9400ff

/* TSTNR2 */
 #define R288_TSTNR2 0x97
 #define F288_DISEQC_IDDQ 0x970020
 #define F288_DISEQC_I2C 0x97001f

/* TSTDIS */
 #define R288_TSTDIS 0xa0
 #define F288_EN_DIS 0xa00080
 #define F288_EN_PTRS 0xa00040
 #define F288_TST_DIS_5 0xa00020
 #define F288_TST_DIS_4 0xa00010
 #define F288_EN_DIS_FIFOS 0xa00008
 #define F288_TST_PRO 0xa00004
 #define F288_TST_REG 0xa00002
 #define F288_TST_PRE 0xa00001

/* TSTDISRX */
 #define R288_TSTDISRX 0xa1
 #define F288_EN_DISRX 0xa10080
 #define F288_TST_CUR_SRC 0xa10040
 #define F288_IN_DIGSIG 0xa10020
 #define F288_HIZ_CUR_SRC 0xa10010
 #define F288_PIN_SELECT_TST 0xa10008
 #define F288_TST_DISRX 0xa10007

/* IOPSDAT */
 #define R288_IOPSDAT 0xb0
 #define F288_SDAT_HIGHZ 0xb00080
 #define F288_SDAT_CFG 0xb0007e
 #define F288_SDAT_XOR 0xb00001

/* IOPSCLT */
 #define R288_IOPSCLT 0xb1
 #define F288_SCLT_HIGHZ 0xb10080
 #define F288_SCLT_CFG 0xb1007e
 #define F288_SCLT_XOR 0xb10001

/* IOPAGC */
 #define R288_IOPAGC 0xb2
 #define F288_AGC_HIGHZ 0xb20080
 #define F288_AGC_CFG 0xb2007e
 #define F288_AGC_XOR 0xb20001

/* IOPDIRCLK */
 #define R288_IOPDIRCLK 0xb3
 #define F288_DIRCLK_HIGHZ 0xb30080
 #define F288_DIRCLK_CFG 0xb3007e
 #define F288_DIRCLK_XOR 0xb30001

/* IOPAUX */
 #define R288_IOPAUX 0xb4
 #define F288_AUX_HIGHZ 0xb40080
 #define F288_AUX_CFG 0xb4007e
 #define F288_AUX_XOR 0xb40001

/* IOPSTDBY */
 #define R288_IOPSTDBY 0xb5
 #define F288_STDBY_HIGHZ 0xb50080
 #define F288_STDBY_CFG 0xb5007e
 #define F288_STDBY_XOR 0xb50001

/* IOPCS0 */
 #define R288_IOPCS0 0xb6
 #define F288_CS0_HIGHZ 0xb60080
 #define F288_CS0_CFG 0xb6007e
 #define F288_CS0_XOR 0xb60001

/* IOPCS1 */
 #define R288_IOPCS1 0xb7
 #define F288_CS1_HIGHZ 0xb70080
 #define F288_CS1_CFG 0xb7007e
 #define F288_CS1_XOR 0xb70001

/* IOPSDISEQC */
 #define R288_IOPSDISEQC 0xb8
 #define F288_DISEQC_HIGHZ 0xb80080
 #define F288_DISEQC_CFG 0xb8007e
 #define F288_DISEQC_XOR 0xb80001

/* TBUSBIT */
 #define R288_TBUSBIT 0xb9
 #define F288_BUS_CHOICE 0xb90040
 #define F288_BUS_POSITION 0xb9003f

/* TCOMP1 */
 #define R288_TCOMP1 0xf1
 #define F288_SLEEPINHBT 0xf10080
 #define F288_RA6SRC 0xf10040
 #define F288_RA5SRC 0xf10020
 #define F288_RA4SRC 0xf10010
 #define F288_RA3SRC 0xf10008
 #define F288_RA2SRC 0xf10004
 #define F288_RA1SRC 0xf10002
 #define F288_RA0SRC 0xf10001

/* TCOMP2 */
 #define R288_TCOMP2 0xf0
 #define F288_ACCURATE 0xf00010
 #define F288_COMPENS 0xf00008
 #define F288_COMPTQ 0xf00004
 #define F288_FREEZE 0xf00002
 #define F288_CHIPSLEEP 0xf00001

/* TCOMPSTAT */
 #define R288_TCOMPSTAT 0xf2
 #define F288COMPOK 0xf20080
 #define F288A6SRC 0xf20040
 #define F288A5SRC 0xf20020
 #define F288A4SRC 0xf20010
 #define F288A3SRC 0xf20008
 #define F288A2SRC 0xf20004
 #define F288A1SRC 0xf20002
 #define F288A0SRC 0xf20001

	

	/* Number of registers */
	#define     STX288_NBREGS   140

	/* Number of fields */
	#define     STX288_NBFIELDS 402
	
	
typedef struct
	{
		U32 Frequency;						/* transponder frequency (in KHz)		*/
		U32 Symbolrate;						/* transponder symbol rate  (in bds)	*/
		U32 SearchRange;					/* range of the search (in Hz)  		*/	
		FE_288_Modulation_t Modulation;	/* modulation							*/
		STTUNER_IQMode_t DemodIQMode;
		U32 ExternalClock;
	} FE_288_SearchParams_t;

	typedef struct
	{
		BOOL Locked;						/* Transponder found 					*/
		U32	Frequency;						/* found frequency	 					*/
		U32 Symbolrate;						/* founded symbol rate					*/
		FE_288_Rate_t Rate;				/* puncture rate  for DVBS1 DTV			*/
	} 
	FE_288_SearchResult_t;
	
	/************************
		INFO STRUCTURE
	************************/
	

typedef struct
{
	U32                     Frequency;		/*	Transponder frequency (KHz)	*/   
	FE_288_SIGNALTYPE_t	SignalType;		/*	Type of founded signal	*/
	FE_288_Rate_t           PunctureRate;		/*	Puncture rate found	*/
	U32                     Symbolrate; 		/*	Symbol rate (Bds)	*/
} FE_288_InternalResults_t;
typedef struct
{
	
	S32		Quartz;				/*	Quartz frequency (Hz) */
	S32		Frequency,			/*	Current tuner frequency (KHz) */
			BaseFreq,			/*	Start tuner frequency (KHz) */
			SubRange,			/*	Current sub range (Hz) */
			TunerStep,			/*	Tuner step (Hz) */
			TunerOffset,
			FreqOffset,
			MaxOffset,
			MinOffset
			;	
			U32	        TunerBW;			/*	Current bandwidth of the tuner (Hz) */ 
        long            TunerIQSense;
       
	FE_288_SIGNALTYPE_t State;/*	Current state of the search algorithm */
	U32		Symbolrate,			/*	Symbol rate (Bds) */
			MasterClock,		/*	Master clock frequency (Hz) */
			Mclk,				/*	Divider factor for masterclock (binary value) */
			SearchRange,		/*	Search range (Hz) */
			RollOff;			/*	Current RollOff of the filter (x100) */		
	S16		DerotFreq,			/*	Current frequency of the derotator (Hz) */
			DerotPercent,		/*	Derotator step (in thousands of symbol rate) */
			DerotStep,			/*	Derotator step (binary value) */
			Direction,			/*	Current search direction */ 
			Tagc1,				/*	Agc1 time constant (ms) */
			Tagc2,				/*	Agc2 time constant (ms) */
			Ttiming,			/*	Timing loop time constant (ms) */
			Tderot,				/*	Derotator time constant (ms) */
			Tdata,				/*	Data recovery time constant (ms) */
			SubDir;				/*	Direction of the next sub range */
	STTUNER_IQMode_t DemodIQMode;
	FE_288_InternalResults_t Results;
}
FE_288_InternalParams_t;

FE_288_SIGNALTYPE_t FE_288_CheckTiming(STTUNER_IOREG_DeviceMap_t *DeviceMap, IOARCH_Handle_t IOHandle,FE_288_InternalParams_t *Params);
FE_288_SIGNALTYPE_t FE_288_CheckCarrier(STTUNER_IOREG_DeviceMap_t *DeviceMap, IOARCH_Handle_t IOHandle,FE_288_InternalParams_t *Params);
FE_288_SIGNALTYPE_t FE_288_CheckData(STTUNER_IOREG_DeviceMap_t *DeviceMap, IOARCH_Handle_t IOHandle,FE_288_InternalParams_t *Params);
void FE_288_IQInvertion(STTUNER_IOREG_DeviceMap_t *DeviceMap, IOARCH_Handle_t IOHandle);
FE_288_SIGNALTYPE_t FE_288_SearchLock(STTUNER_IOREG_DeviceMap_t *DeviceMap, IOARCH_Handle_t IOHandle,FE_288_InternalParams_t *Params);
FE_288_SIGNALTYPE_t FE_288_SearchData(STTUNER_IOREG_DeviceMap_t *DeviceMap, IOARCH_Handle_t IOHandle,FE_288_InternalParams_t *Params);
FE_288_SIGNALTYPE_t FE_288_CheckRange(STTUNER_IOREG_DeviceMap_t *DeviceMap, IOARCH_Handle_t IOHandle,FE_288_InternalParams_t *Params, U32 SymbolRate);
S16 FE_288_GetRFLevel(STTUNER_IOREG_DeviceMap_t *DeviceMap, IOARCH_Handle_t IOHandle);
S32 FE_288_GetCarrierToNoiseRatio(STTUNER_IOREG_DeviceMap_t *DeviceMap, IOARCH_Handle_t IOHandle);
S32 FE_288_Coarse(STTUNER_IOREG_DeviceMap_t *DeviceMap, IOARCH_Handle_t IOHandle,U32 MasterClock_Hz,S32 *Offset_Khz);
void FE_288_Fine(STTUNER_IOREG_DeviceMap_t *DeviceMap, IOARCH_Handle_t IOHandle,U32 MasterClock_Hz,U32 Symbolrate_Bds, BOOL TRY);
FE_288_SIGNALTYPE_t FE_288_Algo(STTUNER_IOREG_DeviceMap_t *DeviceMap, IOARCH_Handle_t IOHandle,FE_288_InternalParams_t *Params, STTUNER_Handle_t TopLevelHandle);		/* Demod handle */
FE_288_Error_t	FE_288_GetSignalInfo(STTUNER_IOREG_DeviceMap_t *DeviceMap, IOARCH_Handle_t IOHandle, FE_288_SignalInfo_t	*pInfo);
FE_288_Error_t  FE_288_SetTSClock_OutputRate(STTUNER_IOREG_DeviceMap_t *DeviceMap, IOARCH_Handle_t IOHandle,U32 SymbolRate, U32 MasterClock);
BOOL FE_288_Harmonic(STTUNER_IOREG_DeviceMap_t *DeviceMap, IOARCH_Handle_t IOHandle, U32 MasterClock_Hz,U32 RfFrequency_Khz);
U32 Drv0288_SpectrumAnalysis(STTUNER_tuner_instance_t *TunerInstance, STTUNER_IOREG_DeviceMap_t *DeviceMap, IOARCH_Handle_t IOHandle, U32 StartFreq,U32 StopFreq,U32 StepSize,U32 *ToneList,U8 mode,int* power_detection_level);
U32 Drv0288_ToneDetection(STTUNER_IOREG_DeviceMap_t *DeviceMap,STTUNER_Handle_t TopLevelHandle,U32 StartFreq,U32 StopFreq,U32 *ToneList,U8 mode,int* power_detection_level);


FE_288_Error_t	FE_288_Search(STTUNER_IOREG_DeviceMap_t *DeviceMap, IOARCH_Handle_t IOHandle,
										    FE_288_SearchParams_t	*pSearch,
										    FE_288_SearchResult_t	*pResult,
										    STTUNER_Handle_t            TopLevelHandle);

#ifdef __cplusplus
extern "C"
{
#endif 

#endif
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