361_map.h

st7710的tuner标准驱动

/* TPS_RCVD2 */
 #define R_TPS_RCVD2 0xa8
 #define TPS_HIERMODE 0xa80070
 #define TPS_CONST 0xa80003



/* TPS_RCVD3 */
 #define R_TPS_RCVD3 0xa9
 #define TPS_LPCODE 0xa90070
 #define TPS_HPCODE 0xa90007



/* TPS_RCVD4 */
 #define R_TPS_RCVD4 0xaa
 #define TPS_GUARD 0xaa0030
 #define TPS_MODE 0xaa0003



/* TPS_ID_CELL1 */
 #define R_TPS_ID_CELL1 0xab
 #define TPS_ID_CELL_LO 0xab00ff

/* TPS_ID_CELL2 */
 #define R_TPS_ID_CELL2 0xac
 #define TPS_ID_CELL_HI 0xac00ff

/* RESERVED_19 */
 #define R_RESERVED_19 0xad
 #define TPS_NA 0xad00fc
 #define TPS_SETFRAME 0xad0003

/* RESERVED_20 */
 #define R_RESERVED_20 0xae
 #define TPS_SETHIERMODE 0xae0070
 #define TPS_SETCONST 0xae0003



/* RESERVED_21 */
 #define R_RESERVED_21 0xaf
 #define TPS_SETLPCODE 0xaf0070
 #define TPS_SETHPCODE 0xaf0007



/* TPS_CTL */
 #define R_TPS_CTL 0xb0
 #define TPS_IMM 0xb00004
 #define TPS_BCHDIS 0xb00002
 #define TPS_UPDDIS 0xb00001


/* CTL_FFTOSNUM */
 #define R_CTL_FFTOSNUM 0xb1
 #define SYMBOL_NUMBER 0xb1007f


/* TESTSELECT */
 #define R_TESTSELECT 0xb2
 #define TESTSELECT 0xb2001f


/* MSC_REV */
 #define R_MSC_REV 0xb3
 #define REV_NUMBER 0xb300ff

/* PIR_CTL */
 #define R_PIR_CTL 0xb4
 #define FREEZE 0xb40001


/* SNR_CARRIER1 */
 #define R_SNR_CARRIER1 0xb5
 #define SNR_CARRIER_LO 0xb500ff

/* SNR_CARRIER2 */
 #define R_SNR_CARRIER2 0xb6
 #define MEAN 0xb60080
 #define SNR_CARRIER_HI 0xb6001f


/* RESERVED_22 */
 #define R_RESERVED_22 0xb7
 #define PPM_CPC 0xb700ff

/* RESERVED_23 */
 #define R_RESERVED_23 0xb8
 #define ADDRESS_BYTE_0 0xb800ff

/* RESERVED_24 */
 #define R_RESERVED_24 0xb9
 #define ADDRESS_BYTE_1 0xb900ff

/* RESERVED_25 */
 #define R_RESERVED_25 0xba
 #define DATA_BYTE_0 0xba00ff

/* RESERVED_26 */
 #define R_RESERVED_26 0xbb
 #define DATA_BYTE_1 0xbb00ff

/* RESERVED_27 */
 #define R_RESERVED_27 0xbc
 #define DATA_BYTE_2 0xbc00ff

/* RESERVED_28 */
 #define R_RESERVED_28 0xbd
 #define DATA_BYTE_3 0xbd00ff

/* RESERVED_29 */
 #define R_RESERVED_29 0xbe


/* RESERVED_30 */
 #define R_RESERVED_30 0xbf
 #define MEM_SELECT_BYTE 0xbf00ff


/* RESERVED_31 */
 #define R_RESERVED_31 0x40
 #define FEC_MODE 0x4000f0
 #define VIT_DIFF 0x400004
 #define SYNC 0x400002
 #define SYM 0x400001



/* VTH0 */
 #define R_VTH0 0x41
 #define VTH0 0x41007f


/* VTH1 */
 #define R_VTH1 0x42
 #define VTH1 0x42007f


/* VTH2 */
 #define R_VTH2 0x43
 #define VTH2 0x43007f


/* VTH3 */
 #define R_VTH3 0x44
 #define VTH3 0x44007f


/* RESERVED_32 */
 #define R_RESERVED_32 0x45
 #define VTH4 0x45007f


/* VTH5 */
 #define R_VTH5 0x46
 #define VTH5 0x46007f


/* RESERVED_33 */
 #define R_RESERVED_33 0x47


/* VITPROG */
 #define R_VITPROG 0x49
 #define FORCE_ROTA 0x4900c0
 #define AUTO_FREEZE 0x490030
 #define MDIVIDER 0x490003


/* PR */
 #define R_PR 0x4a
 #define FRAPTCR 0x4a0080
 #define E7_8 0x4a0020
 #define E6_7 0x4a0010
 #define E5_6 0x4a0008
 #define E3_4 0x4a0004
 #define E2_3 0x4a0002
 #define E1_2 0x4a0001


/* VSEARCH */
 #define R_VSEARCH 0x4b
 #define PR_AUTO 0x4b0080
 #define PR_FREEZE 0x4b0040
 #define SAMPNUM 0x4b0030
 #define TIMEOUT 0x4b000c
 #define HYSTER 0x4b0003

/* RS */
 #define R_RS 0x4c
 #define DEINT_ENA 0x4c0080
 #define OUTRS_SP 0x4c0040
 #define RS_ENA 0x4c0020
 #define DESCR_ENA 0x4c0010
 #define ERRBIT_ENA 0x4c0008
 #define FORCE47 0x4c0004
 #define CLK_POL 0x4c0002
 #define CLK_CFG 0x4c0001

/* RSOUT */
 #define R_RSOUT 0x4d
 #define ENA_STBACKEND 0x4d0010
 #define ENA8_LEVEL 0x4d000f


/* ERRCTRL1 */
 #define R_ERRCTRL1 0x4e
 #define ERRMODE1 0x4e0080
 #define TESTERS1 0x4e0040
 #define ERR_SOURCE1 0x4e0030
 #define RESET_CNTR1 0x4e0004
 #define NUM_EVENT1 0x4e0003


/* ERRCNTM1 */
 #define R_ERRCNTM1 0x4f
 #define ERROR_COUNT1_HI 0x4f00ff

/* ERRCNTL1 */
 #define R_ERRCNTL1 0x50
 #define ERROR_COUNT1_LO 0x5000ff

/* ERRCTRL2 */
 #define R_ERRCTRL2 0x51
 #define ERRMODE2 0x510080
 #define TESTERS2 0x510040
 #define ERR_SOURCE2 0x510030
 #define RESET_CNTR2 0x510004
 #define NUM_EVENT2 0x510003


/* ERRCNTM2 */
 #define R_ERRCNTM2 0x52
 #define ERROR_COUNT2_HI 0x5200ff

/* ERRCNTL2 */
 #define R_ERRCNTL2 0x53
 #define ERROR_COUNT2_LO 0x5300ff

/* RESERVED_34 */
 #define R_RESERVED_34 0x54


/* VERROR */
 #define R_VERROR 0x55
 #define ERROR_VALUE 0x5500ff

/* ERRCTRL3 */
 #define R_ERRCTRL3 0x56
 #define ERRMODE3 0x560080
 #define TESTERS3 0x560040
 #define ERR_SOURCE3 0x560030
 #define RESET_CNTR3 0x560004
 #define NUM_EVENT3 0x560003


/* ERRCNTM3 */
 #define R_ERRCNTM3 0x57
 #define ERROR_COUNT3_HI 0x5700ff

/* ERRCNTL3 */
 #define R_ERRCNTL3 0x58
 #define ERROR_COUNT3_LO 0x5800ff

/* RESERVED_35 */
 #define R_RESERVED_35 0x59
 #define DILSTK_HI 0x5900ff

/* RESERVED_36 */
 #define R_RESERVED_36 0x5a
 #define DILSTK_LO 0x5a00ff

/* RESERVED_37 */
 #define R_RESERVED_37 0x5b


/* RESERVED_38 */
 #define R_RESERVED_38 0x5c


/* LNBRX */
 #define R_LNBRX 0x5d
 #define LINE_OK 0x5d0080
 #define OCCURRED_ERR 0x5d0040
 #define RSOV_DATAIN 0x5d0008
 #define LNBTX_CHIPADDR 0x5d0007


/* RESERVED_39 */
 #define R_RESERVED_39 0x5e
 #define DEINTTC 0x5e0080
 #define DIL64_ON 0x5e0040
 #define RSTC 0x5e0020
 #define DESCRAMTC 0x5e0010
 #define MODSYNCBYT 0x5e0004
 #define LOWP_DIS 0x5e0002
 #define HIGHP_DIS 0x5e0001


/* RESERVED_40 */
 #define R_RESERVED_40 0x5f
 #define RAND_RAMP 0x5f0040
 #define NOISE_LEVEL 0x5f0038
 #define PR_VIT_BIST 0x5f0007


/* RESERVED_41 */
 #define R_RESERVED_41 0xc0
 #define FRES_DISPLAY 0xc00080
 #define FRESRS 0xc00040
 #define FRESACS 0xc00020
 #define FRES_PRIF 0xc00010
 #define FRESFEC1_2 0xc00008
 #define FRESFEC 0xc00004
 #define FRESCORE1_2 0xc00002
 #define FRESCORE 0xc00001

/* ANACTRL */
 #define R_ANACTRL 0xc1
 #define STDBY_PLL2X4 0xc10080
 #define BYPASS_XTAL 0xc10040
 #define STDBY_BUFFER 0xc10020
 #define STDBY_BIAS 0xc10010
 #define STDBY_ADPIPE 0xc10008
 #define BYPASS_PLL 0xc10004
 #define DIS_PAD_OSC 0xc10002
 #define STDBY_PLLXN 0xc10001

/* RESERVED_42 */
 #define R_RESERVED_42 0xc2
 #define EXT_TESTIN 0xc20080
 #define EXT_ADC 0xc20040
 #define TEST_IN 0xc20038
 #define TS 0xc20007

/* RESERVED_43 */
 #define R_RESERVED_43 0xc3
 #define CKFECEXT 0xc30080
 #define FORCERATE1 0xc30008
 #define TSTCKRS 0xc30004
 #define TSTCKDIL 0xc30002
 #define DIRCKINT 0xc30001


/* RESERVED_44 */
 #define R_RESERVED_44 0xc4
 #define EN_VI2C 0xc40080
 #define TI2C 0xc40060
 #define BFAIL_BAD 0xc40010
 #define TST_PRIF 0xc40007


/* RESERVED_45 */
 #define R_RESERVED_45 0xc5
 #define SELADR1 0xc50080
 #define FSELRAM1 0xc50040
 #define FSELDEC 0xc50020
 #define FOEB 0xc5001c
 #define FADR 0xc50003

/* RESERVED_46 */
 #define R_RESERVED_46 0xc6
 #define FORCEPHA 0xc60080
 #define FNEWPHA 0xc60010
 #define FROT90 0xc60008
 #define FR 0xc60007


/* RESERVED_47 */
 #define R_RESERVED_47 0xc7
 #define EN_VLOG 0xc70080
 #define SELVIT60 0xc70040
 #define SELSYN3 0xc70020
 #define SELSYN2 0xc70010
 #define SELSYN1 0xc70008
 #define SELLIFO 0xc70004
 #define SELFIFO 0xc70002
 #define TSTFIFO 0xc70001

/* RESERVED_48 */
 #define R_RESERVED_48 0xc8
 #define SEL_VITDATAIN 0xc80080
 #define FORCE_ACS 0xc80040
 #define TSTSYN 0xc80020
 #define TSTRAM64 0xc80010
 #define TSTRAM 0xc80008
 #define TSTERR2 0xc80004
 #define TSTERR 0xc80002
 #define TSTACS 0xc80001

/* RESERVED_49 */
 #define R_RESERVED_49 0xc9
 #define FORMSB 0xc90004
 #define FORLSB 0xc90002
 #define TSTFIFO_TSTFIFO 0xc90001


/* RESERVED_50 */
 #define R_RESERVED_50 0xca
 #define TST_SCRA 0xca0080
 #define OLDRS6 0xca0040
 #define ADCT 0xca0030
 #define DILT 0xca000c
 #define SCARBIT 0xca0002
 #define TSTRS_EN 0xca0001

/* CONSTMODE */
 #define R_CONSTMODE 0xcb
 #define CAR_TYPE 0xcb0018
 #define IQ_RANGE 0xcb0004
 #define CONST_MODE 0xcb0003


/* CONSTCARR1 */
 #define R_CONSTCARR1 0xcc
 #define CONST_CARR_LO 0xcc00ff

/* CONSTCARR2 */
 #define R_CONSTCARR2 0xcd
 #define CONST_CARR_HI 0xcd001f


/* ICONSTEL */
 #define R_ICONSTEL 0xce
 #define ICONSTEL 0xce00ff

/* QCONSTEL */
 #define R_QCONSTEL 0xcf
 #define QCONSTEL 0xcf00ff

/* RESERVED_51 */
 #define R_RESERVED_51 0xd0
 #define BEND_BDI 0xd00080
 #define BBAD_BDI 0xd00040
 #define BEND_PPM 0xd00020
 #define BBAD_PPM 0xd00010
 #define BEND_SDI 0xd00008
 #define BBAD_SDI 0xd00004
 #define BEND_INS 0xd00002
 #define BBAD_INS 0xd00001

/* RESERVED_52 */
 #define R_RESERVED_52 0xd1
 #define BEND_CHC2B 0xd10080
 #define BBAD_CHC2B 0xd10040
 #define BEND_CHC3 0xd10020
 #define BBAD_CHC3 0xd10010
 #define BEND_FFTI 0xd10008
 #define BBAD_FFTI 0xd10004
 #define BEND_FFTW 0xd10002
 #define BBAD_FFTW 0xd10001

/* RESERVED_53 */
 #define R_RESERVED_53 0xd2
 #define BEND_RS 0xd20080
 #define BBAD_RS 0xd20040
 #define BEND_SYR 0xd20020
 #define BBAD_SYR 0xd20010
 #define BEND_CHC1 0xd20008
 #define BBAD_CHC1 0xd20004
 #define BEND_CHC2 0xd20002
 #define BBAD_CHC2 0xd20001

/* RESERVED_54 */
 #define R_RESERVED_54 0xd3
 #define BEND_FIFO 0xd30080
 #define BBAD_FIFO 0xd30040
 #define BEND_VIT2 0xd30020
 #define BBAD_VIT2 0xd30010
 #define BEND_VIT1 0xd30008
 #define BBAD_VIT1 0xd30004
 #define BEND_DIL 0xd30002
 #define BBAD_DIL 0xd30001

/* RF_AGC1 */
 #define R_RF_AGC1 0xd4
 #define RF_AGC1_LEVEL_HI 0xd400ff

/* RF_AGC2 */
 #define R_RF_AGC2 0xd5
 #define START_ADC 0xd50080
 #define TEST_ADCGP 0xd50040
 #define STDBY_ADCGP 0xd50020
 #define ADCGP_OVF 0xd50004
 #define RF_AGC1_LEVEL_LO 0xd50003


/* RESERVED_55 */
 #define R_RESERVED_55 0xd6
 #define BUSIN5 0xd600ff

/* ANACTRL2 */
 #define R_ANACTRL2 0xdb
 #define ANA_CTRL2_BUS 0xdb00ff

/* PLLMDIV */
 #define R_PLLMDIV 0xd8
 #define PLL_MDIV 0xd800ff

/* PLLNDIV */
 #define R_PLLNDIV 0xd9
 #define PLL_NDIV 0xd900ff

/* PLLSETUP */
 #define R_PLLSETUP 0xda
 #define PLL_PDIV 0xda0070
 #define PLL_SETUP 0xda000f


/* ANADIGCTRL */
 #define R_ANADIGCTRL 0xd7
 #define BUFFER_INCM 0xd700c0
 #define SEL_CLKDEM 0xd70020
 #define SEL_PLL 0xd70010
 #define BYPASS_ADC 0xd70008
 #define ADC_RIS_EGDE 0xd70004
 #define SGN_ADC 0xd70002
 #define TEST_ADC 0xd70001

/* TSTBIST */
 #define R_TSTBIST 0xdc
 #define TST_COLLAR_W 0xdc0020
 #define TST_COLLAR_CS 0xdc0010
 #define TST_COLLAR 0xdc0008
 #define TST_BIST_MODE 0xdc0006
 #define RBACT 0xdc0001






#define		STV361_NBREGS	177 

#define		STV361_NBFIELDS	524 
#endif