360_map.h

st7710的tuner标准驱动

/*  TESTSELECT  */
#define R_CAR_DISP_SEL 0xb2 
/*#define F_CAR_DISP_SEL_RESERVED_1 252
#define CAR_DISP_SEL 253*/

/*  MSC_REV */
#define R_MSC_REV 0xb3 
/*#define REV_NUMBER 254*/

/*  PIR_CTL */
#define R_PIR_CTL 0xb4 
/*#define F_PIR_CTL_RESERVED_1 255*/
#define FREEZE_S 0
#define FREEZE_L 1

#define FREEZE (R_PIR_CTL)|(FREEZE_S << 16)|(FREEZE_L << 24)
/*  SNR_CARRIER1    */
#define R_SNR_CARRIER1 0xb5 
/*#define SNR_CARRIER_LO 257*/

/*  SNR_CARRIER2    */

#define R_SNR_CARRIER2 0xb6 
/*#define MEAN 258 
#define F_SNR_CARRIER2_RESERVED_1 259
#define SNR_CARRIER_HI 260 */

/*  PPM_CPAMP       */
#define R_PPM_CPAMP 0xb7 
#define PPM_CPC_S 0 
#define PPM_CPC_L 8
 
#define PPM_CPC (R_PPM_CPAMP)|(PPM_CPC_S << 16)|(PPM_CPC_L << 24)
 
/*  TSM_AP0 */
#define R_TSM_AP0 0xb8 
/*#define ADDRESS_BYTE_0 262*/ 

/*  TSM_AP1 */
#define R_TSM_AP1 0xb9 
/*#define ADDRESS_BYTE_1 263*/

/*  TSM_AP2 */
#define R_TSM_AP2 0xba 
/*#define DATA_BYTE_0 264*/
/*  TSM_AP3 */
#define R_TSM_AP3 0xbb 
/*#define DATA_BYTE_1 265 */

/*  TSM_AP4 */
#define R_TSM_AP4 0xbc 
/*#define DATA_BYTE_2 266 */

/*  TSM_AP5 */
#define R_TSM_AP5 0xbd 
/*/#define DATA_BYTE_3 267 */

/*  TSM_AP6 */
#define R_TSM_AP6 0xbe 
/*#define F_TSM_AP6_RESERVED_1 268 */


/*  TSM_AP7 */
#define R_TSM_AP7 0xbf 
/*#define MEM_SELECT_BYTE 269*/

/*  CONSTMODE   */
#define R_CONSTMODE 0xcb 
/*#define F_CONSTMODE_RESERVED_1 270
#define CAR_TYPE 271
#define IQ_RANGE 272 
#define CONST_MODE 273 */

/*  CONSTCARR1  */
#define R_CONSTCARR1 0xcc 
/*#define CONST_CARR_LO 274 */

/*  CONSTCARR2  */
#define R_CONSTCARR2 0xcd
/*#define F_CONSTCARR2_RESERVED_1 275
#define CONST_CARR_HI 276*/

/*  ICONSTEL    */
#define R_ICONSTEL 0xce

#define ICONSTEL_S 0
#define ICONSTEL_L 8

#define ICONSTEL (R_ICONSTEL)|(ICONSTEL_S << 16)|(ICONSTEL_L << 24)

/*  QCONSTEL    */
#define R_QCONSTEL 0xcf 
#define QCONSTEL_S 0
#define QCONSTEL_L 8

#define QCONSTEL (R_QCONSTEL)|(QCONSTEL_S << 16)|(QCONSTEL_L << 24)

/* AGC1RF */
#define R_AGC1RF 0xd4 

#define RF_AGC1_LEVEL_S 0
#define RF_AGC1_LEVEL_L 8

#define RF_AGC1_LEVEL (R_AGC1RF)|(RF_AGC1_LEVEL_S << 16)|(RF_AGC1_LEVEL_L << 24)

/* EN_RF_AGC1 */
#define R_EN_RF_AGC1 0xd5

#define START_ADC_S 7
#define START_ADC_L 1
/*#define F_START_ADC_RESERVED_1 281*/

#define START_ADC (R_EN_RF_AGC1)|(START_ADC_S << 16)|(START_ADC_L << 24)
/*  FECM    */
#define R_FECM 0x40
/*#define FEC_MODE 282
#define F_FECM_RESERVED_1 283
#define VIT_DIFF 284
#define SYNC 285
#define SYM 286*/

/*  VTH0    */
#define R_VTH0 0x41
/*#define F_VTH0_RESERVED_1  287*/
#define VTH0_S 0
#define VTH0_L 7

#define VTH0 (R_VTH0)|(VTH0_S << 16)|(VTH0_L << 24)
/*  VTH1    */
#define R_VTH1 0x42 
#define VTH1_S 0
#define VTH1_L 7
#define VTH1 (R_VTH1)|(VTH1_S << 16)|(VTH1_L << 24)
/*  VTH2    */
#define R_VTH2 0x43
/*#define F_VTH2_RESERVED_1 291*/
#define VTH2_S 0 
#define VTH2_L 7 
 
#define VTH2 (R_VTH2)|(VTH2_S << 16)|(VTH2_L << 24)
 
/*  VTH3    */
#define R_VTH3 0x44
/*#define F_VTH3_RESERVED_1 293*/
#define VTH3_S 0 
#define VTH3_L 7 

#define VTH3 (R_VTH3)|(VTH3_S << 16)|(VTH3_L << 24)

/*  VTH4    */
#define R_VTH4 0x45 
/* #define F_VTH4_RESERVED_1 295*/
#define VTH4_S 0 
#define VTH4_L 7 

#define VTH4 (R_VTH4)|(VTH4_S << 16)|(VTH4_L << 24)
 
/*  VTH5    */
#define R_VTH5 0x46 
/* #define F_VTH5_RESERVED_1 297*/
#define VTH5_S 0 
#define VTH5_L 7

#define VTH5 (R_VTH5)|(VTH5_S << 16)|(VTH5_L << 24)

/*  FREEVIT */
#define R_FREEVIT 0x47 
/*#define F_FREEVIT_RESERVED_1 299*/

/*  VITPROG */
#define R_VITPROG 0x49
/*#define FORCE_ROTA 300
#define F_VITPROG_RESERVED_1 301
#define MDIVIDER 302*/


/*  PR  */
#define R_PR 0x4a

/*#define F_R_PR_S 0*/ /*Complete register*/
/*#define F_R_PR_L 8
#define F_R_PR  0*/ 

#define FRAPTCR_S 7
/*#define F_PR_RESERVED_1 304*/
#define E7_8_S 5
#define E6_7_S 4 
#define E5_6_S 3 
#define E3_4_S 2 
#define E2_3_S 1 
#define E1_2_s 0

#define FRAPTCR_L 1
/*#define F_PR_RESERVED_1 304*/
#define E7_8_L 1
#define E6_7_L 1 
#define E5_6_L 1 
#define E3_4_L 1 
#define E2_3_L 1 
#define E1_2_L 1

#define FRAPTCR (R_PR)|(FRAPTCR_S << 16)|(FRAPTCR_L << 24)
#define E7_8 (R_PR)|(E7_8_S << 16)|(E7_8_L << 24)
#define E6_7 (R_PR)|(E6_7_S << 16)|(E6_7_L << 24)
#define E5_6 (R_PR)|(E5_6_S << 16)|(E5_6_L << 24)
#define E3_4 (R_PR)|(E3_4_S << 16)|(E3_4_L << 24)
#define E2_3 (R_PR)|(E2_3_S << 16)|(E2_3_L << 24)
#define E1_2 (R_PR)|(E1_2_S << 16)|(E1_2_L << 24)

/*  VSEARCH */
#define R_VSEARCH 0x4b 
 
#define PR_AUTO_S 7
#define PR_FREEZE_S 6 
#define SAMPNUM_S 4
#define TIMEOUT_S 2
#define HYSTER_S 0

#define PR_AUTO_L 1
#define PR_FREEZE_L 1 
#define SAMPNUM_L 2
#define TIMEOUT_L 2
#define HYSTER_L 2	  

#define PR_AUTO_N_PR_FREEZE_S 6
#define PR_AUTO_N_PR_FREEZE_L 2
#define PR_AUTO_N_PR_FREEZE  (R_VSEARCH)|(PR_AUTO_N_PR_FREEZE_S << 16)|(PR_AUTO_N_PR_FREEZE_L << 24)


#define PR_AUTO (R_VSEARCH)|(PR_AUTO_S << 16)|(PR_AUTO_L << 24)
#define PR_FREEZE (R_VSEARCH)|(PR_FREEZE_S << 16)|(PR_FREEZE_L << 24)
#define SAMPNUM (R_VSEARCH)|(SAMPNUM_S << 16)|(SAMPNUM_L << 24)
#define TIMEOUT (R_VSEARCH)|(TIMEOUT_S << 16)|(TIMEOUT_L << 24)
#define HYSTER (R_VSEARCH)|(HYSTER_S << 16)|(HYSTER_L << 24)

/*  RS  */
#define R_RS 0x4c

#define DEINT_ENA_S 7 
#define OUTRS_SP_S  6
#define RS_ENA_S    5
#define DESCR_ENA_S 4 
#define ERRBIT_ENA_S 3 
#define FORCE47_S 2
#define CLK_POL_S 1 
#define CLK_CFG_S 0

 
#define DEINT_ENA_L 1 
#define OUTRS_SP_L 1
#define RS_ENA_L 1
#define DESCR_ENA_L 1 
#define ERRBIT_ENA_L 1 
#define FORCE47_L 1
#define CLK_POL_L 1 
#define CLK_CFG_L 1 

#define DEINT_ENA (R_RS)|(DEINT_ENA_S << 16)|(DEINT_ENA_L << 24)
#define OUTRS_SP (R_RS)|(OUTRS_SP_S << 16)|(OUTRS_SP_L << 24) 
#define RS_ENA (R_RS)|(RS_ENA_S << 16)|(RS_ENA_L << 24)
#define DESCR_ENA (R_RS)|(DESCR_ENA_S << 16)|(DESCR_ENA_L << 24)
#define ERRBIT_ENA (R_RS)|(ERRBIT_ENA_S << 16)|(ERRBIT_ENA_L << 24)
#define FORCE47 (R_RS)|(FORCE47_S << 16)|(FORCE47_L << 24)
#define CLK_POL (R_RS)|(CLK_POL_S << 16)|(CLK_POL_L << 24)
#define CLK_CFG (R_RS)|(CLK_CFG_S << 16)|(CLK_CFG_L << 24)


#define R_RSOUT 0x4d
/*#define F_RSOUT_RESERVED_1 324  
#define ENA_STBACKEND 325
#define ENA8_LEVEL 326 */

/*  ERRCTRL1    */
#define R_ERRCTRL1 0x4e 
 
#define ERRMODE1_S 7
#define TESTERS1_S 6 
#define ERR_SOURCE1_S 4
#define RESET_CNTR1_S 2
#define NUM_EVENT1_S 0 

#define ERRMODE1_L 1
#define TESTERS1_L 1 
#define ERR_SOURCE1_L 2
#define RESET_CNTR1_L 1
#define NUM_EVENT1_L 2 

 #define ERRMODE1 (R_ERRCTRL1)|(ERRMODE1_S << 16)|(ERRMODE1_L << 24)
 #define TESTERS1 (R_ERRCTRL1)|(TESTERS1_S << 16)|(TESTERS1_L << 24)
 #define ERR_SOURCE1 (R_ERRCTRL1)|(ERR_SOURCE1_S << 16)|(ERR_SOURCE1_L << 24)
 #define RESET_CNTR1 (R_ERRCTRL1)|(RESET_CNTR1_S << 16)|(RESET_CNTR1_L << 24)
 #define NUM_EVENT1 (R_ERRCTRL1)|(NUM_EVENT1_S << 16)|(NUM_EVENT1_L << 24)

/*  ERRCNTM1    */
#define R_ERRCNTM1 0x4f 

#define ERROR_COUNT1_HI_S 0
#define ERROR_COUNT1_HI_L 8
#define ERROR_COUNT1_HI (R_ERRCNTM1)|(ERROR_COUNT1_HI_S << 16)|(ERROR_COUNT1_HI_L << 24)

/*  ERRCNTL1    */
#define R_ERRCNTL1 0x50
#define ERROR_COUNT1_LO_S 0 
#define ERROR_COUNT1_LO_L 8 

#define ERROR_COUNT1_LO (R_ERRCNTL1)|(ERROR_COUNT1_LO_S << 16)|(ERROR_COUNT1_LO_L << 24)
 
/*  ERRCTRL2    */			   
#define R_ERRCTRL2 0x51
/*#define ERRMODE2 335
#define TESTERS2 336 
#define ERR_SOURCE2 337 
#define F_ERRCTRL2_RESERVED_1 338
#define RESET_CNTR2 339
#define NUM_EVENT2 340*/

/*  ERRCNTM2    */
#define R_ERRCNTM2 0x52 
/*#define ERROR_COUNT2_HI 341 */

/*  ERRCNTL2    */
#define R_ERRCNTL2 0x53
/*#define ERROR_COUNT2_LO 342 */

/*  ERRCTRL3    */
#define R_ERRCTRL3 0x56
#define ERRMODE3_S 7
#define TESTERS3_S 6 
#define ERR_SOURCE3_S 4 
#define RESET_CNTR3_S 2
#define NUM_EVENT3_S 0

#define ERRMODE3_L 1
#define TESTERS3_L 1 
#define ERR_SOURCE3_L 2 
#define RESET_CNTR3_L 1
#define NUM_EVENT3_L 2

#define ERRMODE3 (R_ERRCTRL3)|(ERRMODE3_S << 16)|(ERRMODE3_L << 24)
#define TESTERS3 (R_ERRCTRL3)|(TESTERS3_S << 16)|(TESTERS3_L << 24)
#define ERR_SOURCE3 (R_ERRCTRL3)|(ERR_SOURCE3_S << 16)|(ERR_SOURCE3_L << 24)
#define RESET_CNTR3 (R_ERRCTRL3)|(RESET_CNTR3_S << 16)|(RESET_CNTR3_L << 24)
#define NUM_EVENT3 (R_ERRCTRL3)|(NUM_EVENT3_S << 16)|(NUM_EVENT3_L << 24)


/*  ERRCNTM3    */
#define R_ERRCNTM3 0x57 
/*#define ERROR_COUNT3_HI 349 */

/*  ERRCNTL3    */
#define R_ERRCNTL3 0x58 
/*#define ERROR_COUNT3_LO 350 */

/* DILSTK1 */

#define R_DILSTK1 0x59 
/*#define DILSTK_HI 351*/

/* DILSTK0 */

#define R_DILSTK0 0x5a 
/*#define DILSTK_LO 352*/

/* DILBWSTK1 */

#define R_DILBWSTK1 0x5b 
/*#define F_DILBWSTK1_RESERVED_1 353*/

/* DILBWSTK0 */

#define R_DILBWST0 0x5c
/*#define F_DILBWSTK0_RESERVED_1 354 */

/*  LNBRX       */
#define R_LNBRX 0x5d 
 
#define LINE_OK_S 7
#define OCCURRED_ERR_S 6

#define LINE_OK_L 1
#define OCCURRED_ERR_L 1 

#define LINE_OK (R_LNBRX)|(LINE_OK_S << 16)|(LINE_OK_L << 24)
#define OCCURRED_ERR (R_LNBRX)|(OCCURRED_ERR_S << 16)|(OCCURRED_ERR_L << 24)
 

/* RSTC */

#define R_RSTC 0x5e 
/*#define DEINNTE 358
#define DIL64_ON 359 
#define RSTC 360
#define DESCRAMTC 361 
#define F_RSTC_RESERVED_1 362
#define MODSYNCBYTE 363
#define LOWP_DIS 364
#define HI 365 */

/* VIT_BIST */
/*#define R_VIT_BIST 0x5f 
#define F_VIT_BIST_RESERVED_1 366
#define RAND_RAMP 367
#define NOISE_LEVEL 368 
#define PR_VIT_BIST 369 */

/*  FREEDRS */
#define R_FREEDRS 0x54
/*#define F_FREEDRS_RESERVED_1 370*/

/*  VERROR  */
#define R_VERROR 0x55
/*#define ERROR_VALUE 371*/

/*  TSTRES  */

#define R_TSTRES 0xc0
/*#define FRESI2C 372
#define FRESRS 373
#define FRESACS 374 
#define FRES_PRIF 375 
#define FRESFEC1_2 376 
#define FRESFEC 377
#define FRESCORE1_2 378 
#define FRESCORE 379*/

/*  ANACTRL */

#define R_ANACTRL 0xc1 
/*#define STDBY_PLL 380 
#define BYPASS_XTAL 381 
#define STDBY_PGA 382
#define TEST_PGA 383
#define STDBY_ADC 384 
#define BYPASS_ADC 385 
#define SGN_ADC 386
#define TEST_ADC 387*/

/*  TSTBUS  */

#define R_TSTBUS 0xc2
/*#define EXT_TESTIN 388 
#define EXT_ADC 389
#define TEST_IN 390 
#define TS 391*/

/*  TSTCK   */

#define R_TSTCK 0xc3
/*#define CKFECEXT 392 
#define F_TSTCK_RESERVED_1 393
#define FORCERATE1 394
#define TSTCKRS 395
#define TSTCKDIL 396 
#define DIRCKINT 397*/

/*  TSTI2C  */

#define R_TSTI2C 0xc4 
/*#define EN_VI2C 398
#define TI2C 399
#define BFAIL_BAD 400 
#define RBACT 401
#define TST_PRIF 402*/

/*  TSTRAM1 */
#define R_TSTRAM1 0xc5 
/*#define SELADR1 403
#define FSELRAM1 404 
#define FSELDEC 405
#define FOEB 406
#define FADR 407*/

/*  TSTRATE */
#define R_TSTRATE 0xc5 
/*#define FORCEPHA 408
#define F_TSTRATE_RESERVED_1 409
#define FNEWPHA 410
#define FROT90 411
#define FR 412*/

/*  SELOUT  */
#define R_SELOUT 0xc7
/*#define EN_VLOG 413 
#define SELVIT60 414 
#define SELSYN3 415
#define SELSYN2 416 
#define SELSYN1 417 
#define SELLIFO 418 
#define SELFIFO 419 
#define TSTFIFO_SELOUT 420 */

/*  FORCEIN */
#define R_FORCEIN 0xc8 
/*#define SEL_VITDATAIN 421
#define FORCE_ACS 422
#define TSTSYN 423 
#define TSTRAM64 424 
#define TSTRAM 425
#define TSTERR2 426 
#define TSTERR 427 
#define TSTACS 428 */

/*  TSTFIFO */
#define R_TSTFIFO 0xc9
/*#define F_TSTFIFO_RESERVED_1  429
#define FORMSB 430
#define FORLSB 431 
#define TSTFIFO_TSTFIFO 432 */

/*  TSTRS   */
#define R_TSTRS 0xca
/*#define TST_SCRA 433
#define OLDRS6 434
#define ADCT 435
#define DILT 436 
#define SCARBIT 437 
#define TSTRS_EN 438 */

/*  TSTBISTRES0 */
#define R_TSTBISTRES0 0xd0 
/*#define BEND_CHC2 439 
#define BBAD_CHC2 440 
#define BEND_PPM 441
#define BBAD_PPM 442 
#define BEND_FFTW 443 
#define BBAD_FFTW 444 
#define BEND_FFTI 445 
#define BBAD_FFTI 446 */

/*  TSTBISTRES1 */
#define R_TSTBISTRES1 0xd1 
/*#define BEND_CHC1 447 
#define BBAD_CHC1 448 
#define BEND_SYR 449 
#define BBAD_SYR 450 
#define BEND_SDI 451 
#define BBAD_SDI 452 
#define BEND_BDI 453 
#define BBAD_BDI 454 */

/*  TSTBISTRES2 */
#define R_TSTBISTRES2 0xd2 
/*#define BEND_VIT2 455 
#define BBAD_VIT2 456 
#define BEND_VIT1 457 
#define BBAD_VIT1 458 
#define BEND_DIL 459
#define BBAD_DIL 460 
#define BEND_RS 461
#define BBAD_RS 462 */

/*  TSTBISTRES3 */
#define R_TSTBISTRES3 d3 
/*#define F_TSTBISTRES3_RESERVED_1 463
#define BEND_FIFO 464
#define BBAD_FIFO 465  */

	/* Number of registers  */
/*#else     DEBUG_VERSION*/
#define		STV360_NBREGS	159

#define		STV360_NBFIELDS	466 


#endif  /* else (minidriver)ends */

#endif