370_vsb_map.h

st7710的tuner标准驱动

#include "chip.h"



#ifndef H_MAP370VSB



	#define H_MAP370VSB




/* ID */
 #define R0370_ID 0xf000
 #define F0370_IDENTIFICATIONREGISTER 0xf00000ff

/* I2C_PAGE */
 #define R0370_I2C_PAGE 0xf001
 #define F0370_REG_PAGE_ADRESS 0xf001000f

/* I2CRPT1 */
 #define R0370_I2CRPT1 0xf002
 #define F0370_I2CT_ON_1 0xf0020080
 #define F0370_ENARPT_LEVEL_1 0xf0020070
 #define F0370_SCLT_DELAY_1 0xf0020008
 #define F0370_SCLT_NOD_1 0xf0020004
 #define F0370_STOP_ENABLE_1 0xf0020002
 #define F0370_SDAT_NOD_1 0xf0020001

/* I2CRPT2 */
 #define R0370_I2CRPT2 0xf003
 #define F0370_I2CT_ON_2 0xf0030080
 #define F0370_ENARPT_LEVEL_2 0xf0030070
 #define F0370_SCLT_DELAY_2 0xf0030008
 #define F0370_SCLT_NOD_2 0xf0030004
 #define F0370_STOP_ENABLE_2 0xf0030002
 #define F0370_SDAT_NOD_2 0xf0030001

/* CLK_CTRL */
 #define R0370_CLK_CTRL 0xf004
 #define F0370_CLKDIVQAM_DIS 0xf0040080
 #define F0370_EN_EXTCLK_VSB 0xf0040040
 #define F0370_EN_EXTCLK_QAM 0xf0040020
 #define F0370_CLK50_QAM 0xf0040008
 #define F0370_CLK50_VSBDEM 0xf0040004
 #define F0370_EN_CLKOSC 0xf0040002
 #define F0370_BYPASS_PLL 0xf0040001

/* STANDBY */
 #define R0370_STANDBY 0xf005
 #define F0370_STANDBY_TUNER 0xf0050080
 #define F0370_STANDBY_NCO 0xf0050040
 #define F0370_STANDBY_AD10 0xf0050020
 #define F0370_STANDBY_OOB 0xf0050008
 #define F0370_STANDBY_QAM 0xf0050004
 #define F0370_STANDBY_VSB 0xf0050002
 #define F0370_SEL_VSB 0xf0050001

/* IO_CTRL */
 #define R0370_IO_CTRL 0xf006
 #define F0370_TS_HIGHZ 0xf0060080
 #define F0370_OOB_OUT_HIGHZ 0xf0060040
 #define F0370_ACI_IO_NOD 0xf0060020
 #define F0370_AGC1_VSB_NOD 0xf0060010
 #define F0370_AGC2_VSB_NOD 0xf0060008
 #define F0370_AGC1_QAM_NOD 0xf0060004
 #define F0370_AGC2_QAM_NOD 0xf0060002
 #define F0370_AGC_OOB_NOD 0xf0060001

/* GPIO_INFO */
 #define R0370_GPIO_INFO 0xf007
 #define F0370_ACI_3PINS 0xf0070080
 #define F0370_SETINFO 0xf0070007

/* AD_INTERF */
 #define R0370_AD_INTERF 0xf640
 #define F0370_INV_CLK_AD8 0xf6400080
 #define F0370_DIS_SYNC_AD8 0xf6400040
 #define F0370_FIFO_STOP 0xf6400020
 #define F0370_QAM_FIFO_SRST 0xf6400008
 #define F0370_VSB_FIFO_SRST 0xf6400004
 #define F0370_INV_CLK_AD10 0xf6400002
 #define F0370_DIS_FIFO 0xf6400001

/* TEST_AD_IF */
 #define R0370_TEST_AD_IF 0xf641
 #define F0370_SEL_OUT_AD8 0xf6410010
 #define F0370_SEL_OUT_AD10 0xf641000c
 #define F0370_DSAMPLE_RAT 0xf6410003

/* PLL_CTRL */
 #define R0370_PLL_CTRL 0xf610
 #define F0370_EN_CLKAD10 0xf6100080
 #define F0370_EN_CLKAD8 0xf6100040
 #define F0370_RFILT 0xf6100010
 #define F0370_SELICP 0xf6100008
 #define F0370_DIV 0xf6100004
 #define F0370_NOT_PWR_DN 0xf6100002
 #define F0370_NOT_RESET 0xf6100001

/* PLL_TEST */
 #define R0370_PLL_TEST 0xf611
 #define F0370_SEL12DIV 0xf6110010
 #define F0370_TESTDIV_VSB 0xf6110008
 #define F0370_EN_BYP_DIV34 0xf6110004
 #define F0370_PFD 0xf6110003

/* NCO_PLL1 */
 #define R0370_NCO_PLL1 0xf612
 #define F0370_RFILT1 0xf6120020
 #define F0370_SELICP1 0xf6120018
 #define F0370_MDIV 0xf6120006
 #define F0370_NOT_PWR_DN1 0xf6120001

/* NCO_PLL2 */
 #define R0370_NCO_PLL2 0xf613
 #define F0370_RFILT2 0xf6130020
 #define F0370_SELICP2 0xf6130018
 #define F0370_NOT_PWR_DN2 0xf6130001

/* NCO_TST_PLL */
 #define R0370_NCO_TST_PLL 0xf614
 #define F0370_PFD_PLL2 0xf6140030
 #define F0370_EN_TESTCLKIN2 0xf6140008
 #define F0370_PFD_PLL1 0xf6140006
 #define F0370_EN_TESTCLKIN1 0xf6140001

/* NCO_CTRL */
 #define R0370_NCO_CTRL 0xf615
 #define F0370_ENPRG 0xf6150010
 #define F0370_SDIV 0xf615000c
 #define F0370_NRSTM11 0xf6150002
 #define F0370_NRST 0xf6150001

/* NCO_SYNTH_COARSE_FREQ */
 #define R0370_NCO_SYNTH_COARSE_FREQ 0xf616
 #define F0370_MD 0xf616001f

/* NCO_SYNTH_FINE_FREQ_1 */
 #define R0370_NCO_SYNTH_FINE_FREQ_1 0xf617
 #define F0370_PE_MSB 0xf617007f

/* NCO_SYNTH_FINE_FREQ_0 */
 #define R0370_NCO_SYNTH_FINE_FREQ_0 0xf618
 #define F0370_PE_LSB 0xf61800ff

/* OOB_TUNER_CTRL */
 #define R0370_OOB_TUNER_CTRL 0xf619
 #define F0370_ONTESTBUF 0xf6190080
 #define F0370_MUXSEL 0xf6190010
 #define F0370_VLOSEL 0xf6190008
 #define F0370_NPDAD8 0xf6190004
 #define F0370_NPDIF 0xf6190002
 #define F0370_NPDRF 0xf6190001

/* AD10_CTRL */
 #define R0370_AD10_CTRL 0xf61c
 #define F0370_SEL_AGC 0xf61c0080
 #define F0370_SEL_VSB_QAM 0xf61c0020
 #define F0370_INMODE 0xf61c0010
 #define F0370_ECO 0xf61c0008
 #define F0370_PWR_DN_MUX 0xf61c0004
 #define F0370_PWR_OFF_REF 0xf61c0002
 #define F0370_PWR_OFF 0xf61c0001

/* DEMOD_CTRL */
 #define R0370_DEMOD_CTRL 0xf010
 #define F0370_AGC_FREEZE 0xf0100080
 #define F0370_NCO_FREEZE 0xf0100040
 #define F0370_VCXO_FREEZE 0xf0100020
 #define F0370_A2DTYPE 0xf0100010
 #define F0370_INV_IQ 0xf0100004
 #define F0370_RST_TIMING 0xf0100002
 #define F0370_RST_CARRIER 0xf0100001

/* SYNCCTRL */
 #define R0370_SYNCCTRL 0xf011
 #define F0370_INVCNST 0xf0110002
 #define F0370_DCFREEZE 0xf0110001

/* AGCCTRL1 */
 #define R0370_AGCCTRL1 0xf012
 #define F0370_TAGCDIR 0xf0120040
 #define F0370_IAGCDIR 0xf0120020
 #define F0370_TST_PWM 0xf0120010
 #define F0370_INV_PWM 0xf0120008
 #define F0370_FRZAGCRF 0xf0120004
 #define F0370_FRZAGCIF 0xf0120002
 #define F0370_RSTAGC 0xf0120001

/* AGCCTRL2 */
 #define R0370_AGCCTRL2 0xf013
 #define F0370_ACCUMRSTSEL 0xf0130007

/* AGCPWR_LSB */
 #define R0370_AGCPWR_LSB 0xf014
 #define F0370_AGCPWR_LSB 0xf01400ff

/* AGCPWR_MSB */
 #define R0370_AGCPWR_MSB 0xf015
 #define F0370_AGCPWR_MSB 0xf0150003

/* AGCITHUP_LSB */
 #define R0370_AGCITHUP_LSB 0xf016
 #define F0370_AGCITHUP_LSB 0xf01600ff

/* AGCITHUP_MSB */
 #define R0370_AGCITHUP_MSB 0xf017
 #define F0370_AGCITHUP_MSB 0xf017000f

/* AGCITHLOW_LSB */
 #define R0370_AGCITHLOW_LSB 0xf018
 #define F0370_AGCITHLOW_LSB 0xf01800ff

/* AGCITHLOW_MSB */
 #define R0370_AGCITHLOW_MSB 0xf019
 #define F0370_AGCITHLOW_MSB 0xf019000f

/* AGCTH_LSB */
 #define R0370_AGCTH_LSB 0xf01a
 #define F0370_AGCTH_LSB 0xf01a00ff

/* AGCTH_MSB */
 #define R0370_AGCTH_MSB 0xf01b
 #define F0370_AGCTH_MSB 0xf01b000f

/* AGCBWSEL */
 #define R0370_AGCBWSEL 0xf01c
 #define F0370_AGCBWSEL 0xf01c000f

/* TAGCBWSEL */
 #define R0370_TAGCBWSEL 0xf01d
 #define F0370_TAGCBWSEL 0xf01d0007

/* TST_PWM1 */
 #define R0370_TST_PWM1 0xf01e
 #define F0370_PWMINRF_LSB 0xf01e00ff

/* TST_PWM2 */
 #define R0370_TST_PWM2 0xf01f
 #define F0370_PWMINIF_LSB 0xf01f00f0
 #define F0370_PWMINRF_MSB 0xf01f000f

/* TST_PWM3 */
 #define R0370_TST_PWM3 0xf020
 #define F0370_PWMINIF_MSB 0xf02000ff

/* AGC_IND_LSB */
 #define R0370_AGC_IND_LSB 0xf021
 #define F0370_AGC_IND_LSB 0xf02100ff

/* AGC_IND_MSB */
 #define R0370_AGC_IND_MSB 0xf022
 #define F0370_AGC_IND_MSB 0xf02200ff

/* AGC_IND_MMSB */
 #define R0370_AGC_IND_MMSB 0xf023
 #define F0370_AGC_IND_MMSB 0xf0230003

/* VCXOOFFSET1 */
 #define R0370_VCXOOFFSET1 0xf024
 #define F0370_VCXOOFFSET1 0xf02400ff

/* VCXOOFFSET2 */
 #define R0370_VCXOOFFSET2 0xf025
 #define F0370_VCXOOFFSET2 0xf02500ff

/* VCXOOFFSET3 */
 #define R0370_VCXOOFFSET3 0xf026
 #define F0370_VCXOOFFSET3 0xf02600ff

/* VCXOOFFSET4 */
 #define R0370_VCXOOFFSET4 0xf027
 #define F0370_VCXOOFFSET4 0xf027007f

/* GAINSRC_LSB */
 #define R0370_GAINSRC_LSB 0xf028
 #define F0370_GAINSRC_LSB 0xf02800ff

/* GAINSRC_MSB */
 #define R0370_GAINSRC_MSB 0xf029
 #define F0370_GAINSRC_MSB 0xf0290001

/* VCXOINITV */
 #define R0370_VCXOINITV 0xf02a
 #define F0370_VCXOINITV 0xf02a00ff

/* GAIN1ACQ1_LSB */
 #define R0370_GAIN1ACQ1_LSB 0xf02b
 #define F0370_GAIN1ACQ1_LSB 0xf02b00ff

/* GAIN1ACQ1_MSB */
 #define R0370_GAIN1ACQ1_MSB 0xf02c
 #define F0370_GAIN1ACQ1_MSB 0xf02c0003

/* GAIN1ACQ2_LSB */
 #define R0370_GAIN1ACQ2_LSB 0xf02d
 #define F0370_GAIN1ACQ2_LSB 0xf02d00ff

/* GAIN1ACQ2_MSB */
 #define R0370_GAIN1ACQ2_MSB 0xf02e
 #define F0370_GAIN1ACQ2_MSB 0xf02e0003

/* GAIN1TRACK_LSB */
 #define R0370_GAIN1TRACK_LSB 0xf02f
 #define F0370_GAIN1TRACK_LSB 0xf02f00ff

/* GAIN1TRACK_MSB */
 #define R0370_GAIN1TRACK_MSB 0xf030
 #define F0370_GAIN1TRACK_MSB 0xf0300003

/* GAIN2ACQ1_LSB */
 #define R0370_GAIN2ACQ1_LSB 0xf031
 #define F0370_GAIN2ACQ1_LSB 0xf03100ff

/* GAIN2ACQ1_MSB */
 #define R0370_GAIN2ACQ1_MSB 0xf032
 #define F0370_GAIN2ACQ1_MSB 0xf0320003

/* GAIN2ACQ2_LSB */
 #define R0370_GAIN2ACQ2_LSB 0xf033
 #define F0370_GAIN2ACQ2_LSB 0xf03300ff

/* GAIN2ACQ2_MSB */
 #define R0370_GAIN2ACQ2_MSB 0xf034
 #define F0370_GAIN2ACQ2_MSB 0xf0340003

/* GAIN2TRK_LSB */
 #define R0370_GAIN2TRK_LSB 0xf035
 #define F0370_GAIN2TRK_LSB 0xf03500ff

/* GAIN2TRK_MSB */
 #define R0370_GAIN2TRK_MSB 0xf036
 #define F0370_GAIN2TRK_MSB 0xf0360003

/* GAIN3ACQ */
 #define R0370_GAIN3ACQ 0xf037
 #define F0370_GAIN3ACQ 0xf03700ff

/* GAIN3TRK */
 #define R0370_GAIN3TRK 0xf038
 #define F0370_GAIN3TRK 0xf03800ff

/* VCXOERR_LSB */
 #define R0370_VCXOERR_LSB 0xf039
 #define F0370_VCXO_ERR_LSB 0xf03900ff

/* VCXOERR_MSB */
 #define R0370_VCXOERR_MSB 0xf03a
 #define F0370_VCXOERR_MSB 0xf03a00ff

/* VCXOERR_MMSB */
 #define R0370_VCXOERR_MMSB 0xf03b
 #define F0370_VCXOERR_MMSB 0xf03b00ff

/* TIMLOCKDETECT_LSB */
 #define R0370_TIMLOCKDETECT_LSB 0xf03c
 #define F0370_TIMLOCKDETECT_LSB 0xf03c00ff

/* TIMLOCKDETECT_MSB */
 #define R0370_TIMLOCKDETECT_MSB 0xf03d
 #define F0370_TIMLOCKDETECT_MSB 0xf03d00ff

/* TIMLOCKDETECT_MMSB */
 #define R0370_TIMLOCKDETECT_MMSB 0xf03e
 #define F0370_FREQ_LOCK 0xf03e0004
 #define F0370_TIMLOCKDETECT_MMSB 0xf03e0003

/* FREQLOCK_LSB */
 #define R0370_FREQLOCK_LSB 0xf03f
 #define F0370_FREQLOCKTH_LSB 0xf03f00ff

/* FREQLOCK_MSB */
 #define R0370_FREQLOCK_MSB 0xf040
 #define F0370_FREQLOCKTH_MSB 0xf04000ff

/* FREQLOCK_MMSB */
 #define R0370_FREQLOCK_MMSB 0xf041
 #define F0370_FREQLOCKTH_MMSB 0xf0410003

/* TIMINGAGCREF_LSB */
 #define R0370_TIMINGAGCREF_LSB 0xf042
 #define F0370_TIMINGAGCREF_LSB 0xf04200ff

/* TIMINGAGCREF_MSB */
 #define R0370_TIMINGAGCREF_MSB 0xf043
 #define F0370_TIMINGAGCREF_MSB 0xf043000f

/* NCOCNST_LSB */
 #define R0370_NCOCNST_LSB 0xf044
 #define F0370_NCOCNST_LSB 0xf04400ff

/* NCOCNST_MSB */
 #define R0370_NCOCNST_MSB 0xf045
 #define F0370_NCOCNST_MSB 0xf04500ff

/* NCOCNST_MMSB */
 #define R0370_NCOCNST_MMSB 0xf046
 #define F0370_NCOCNST_MMSB 0xf046007f

/* NCOGAIN1ACQ */
 #define R0370_NCOGAIN1ACQ 0xf047
 #define F0370_NCOGAIN1ACQ 0xf04700ff

/* NCOGAIN1TRACK */
 #define R0370_NCOGAIN1TRACK 0xf048
 #define F0370_NCOGAIN1TRACK 0xf04800ff

/* NCOGAIN2ACQ */
 #define R0370_NCOGAIN2ACQ 0xf049
 #define F0370_NCOGAIN2ACQ 0xf04900ff

/* NCOGAIN2TRACK */
 #define R0370_NCOGAIN2TRACK 0xf04a
 #define F0370_NCOGAIN2TRACK 0xf04a00ff

/* NCOGAIN3 */
 #define R0370_NCOGAIN3 0xf04b
 #define F0370_NCOGAIN3 0xf04b00ff

/* NCOERR_LSB */
 #define R0370_NCOERR_LSB 0xf04c
 #define F0370_NCOERR_LSB 0xf04c00ff

/* NCOERR_MSB */
 #define R0370_NCOERR_MSB 0xf04d
 #define F0370_NCOERR_MSB 0xf04d00ff

/* NCOERR_MMSB */
 #define R0370_NCOERR_MMSB 0xf04e
 #define F0370_NCOERR_MMSB 0xf04e0001