rf4000init.h

st7710的tuner标准驱动

#ifndef RF4000Init_H			/* to avoid recursive inclusion */
	#define RF4000Init_H
	
	/*Standard initial defines.*/
	#define RF4000_STEPSIZE		500000		/* Stepsize for initialization.*/
	#define RF4000_FXTAL		24			/* Set for Europe, IF = 36 MHz.*/
	#define RF4000_BW			8
	#define RF4000_IF			36000
	#define RF4000_CRYSTALBUF	0			/* Turn on the crystal output buffer.*/
	#define RF4000_CRYSTALOSC	0			/* Turn on the crystal oscillator.*/

	/* Define for the thermal mode.*/
	#define RF4000_THERM_ON		1
	#define RF4000_THERM_OFF	0
	
#define RF4000_NBREGS		77
	#define RF4000_NBFIELDS		234
/* RRF4000_REGISTER0 */
 #define RRF4000_REGISTER0 0x0
 #define FRF4000_NURO0 0xff

/* RRF4000_REGISTER1 */
 #define RRF4000_REGISTER1 0x1
 #define FRF4000_NURO1 0x100ff

/* RRF4000_REGISTER2 */
 #define RRF4000_REGISTER2 0x2
 #define FRF4000_NURO2 0x200ff

/* RRF4000_REGISTER3 */
 #define RRF4000_REGISTER3 0x3
 #define FRF4000_NURO3 0x300f0
 #define FRF4000_DVREV 0x3000f

/* RRF4000_REGISTER4 */
 #define RRF4000_REGISTER4 0x4
 #define FRF4000_NURO4 0x400f8
 #define FRF4000_RCRPR 0x40004
 #define FRF4000_RCCLK 0x40002
 #define FRF4000_RCCND 0x40001

/* RRF4000_REGISTER5 */
 #define RRF4000_REGISTER5 0x5
 #define FRF4000_NURO5 0x50080
 #define FRF4000_RCTMP 0x5007f

/* RRF4000_REGISTER6 */
 #define RRF4000_REGISTER6 0x6
 #define FRF4000_RCCAL 0x600ff

/* RRF4000_REGISTER7 */
 #define RRF4000_REGISTER7 0x7
 #define FRF4000_ADRG1 0x700ff

/* RRF4000_REGISTER8 */
 #define RRF4000_REGISTER8 0x8
 #define FRF4000_ADRG2 0x800ff

/* RRF4000_REGISTER9 */
 #define RRF4000_REGISTER9 0x9
 #define FRF4000_NURO9 0x900c0
 #define FRF4000_ALCK2 0x90020
 #define FRF4000_DLCK2 0x90010
 #define FRF4000_CALSN 0x9000f

/* RRF4000_REGISTER10 */
 #define RRF4000_REGISTER10 0xa
 #define FRF4000_CPSN1 0xa00e0
 #define FRF4000_VTSN1 0xa001c
 #define FRF4000_ALCK1 0xa0002
 #define FRF4000_DLCK1 0xa0001

/* RRF4000_REGISTER11 */
 #define RRF4000_REGISTER11 0xb
 #define FRF4000_NUROB 0xb00e0
 #define FRF4000_VCSN1 0xb001f

/* RRF4000_REGISTER12 */
 #define RRF4000_REGISTER12 0xc
 #define FRF4000_LCOM 0xc00c0
 #define FRF4000_LCFCR 0xc003f

/* RRF4000_REGISTER13 */
 #define RRF4000_REGISTER13 0xd
 #define FRF4000_NUROD 0xd0080
 #define FRF4000_LCDQR 0xd007f

/* RRF4000_REGISTER14 */
 #define RRF4000_REGISTER14 0xe
 #define FRF4000_NUROE 0xe00f0
 #define FRF4000_LCPQR 0xe0008
 #define FRF4000_LCTLR 0xe0007

/* RRF4000_REGISTER15 */
 #define RRF4000_REGISTER15 0xf
 #define FRF4000_BCOR 0xf00ff

/* RRF4000_REGISTER16 */
 #define RRF4000_REGISTER16 0x10
 #define FRF4000_NU10 0x1000f8
 #define FRF4000_VGAS 0x100004
 #define FRF4000_BMEN 0x100002
 #define FRF4000_VGEN 0x100001

/* RRF4000_REGISTER17 */
 #define RRF4000_REGISTER17 0x11
 #define FRF4000_VGAG 0x1100f0
 #define FRF4000_VG1F 0x11000f

/* RRF4000_REGISTER18 */
 #define RRF4000_REGISTER18 0x12
 #define FRF4000_VG2F 0x1200f0
 #define FRF4000_VG3F 0x12000f

/* RRF4000_REGISTER19 */
 #define RRF4000_REGISTER19 0x13
 #define FRF4000_RCXS 0x130080
 #define FRF4000_SAEN 0x130040
 #define FRF4000_SATS 0x130030
 #define FRF4000_NU13 0x130008
 #define FRF4000_SAGB 0x130007

/* RRF4000_REGISTER20 */
 #define RRF4000_REGISTER20 0x14
 #define FRF4000_NU14 0x1400e0
 #define FRF4000_FBPS 0x14001c
 #define FRF4000_BBFN 0x140002
 #define FRF4000_BCON 0x140001

/* RRF4000_REGISTER21 */
 #define RRF4000_REGISTER21 0x15
 #define FRF4000_RCCI 0x150080
 #define FRF4000_RCTN 0x150040
 #define FRF4000_RCRN 0x150020
 #define FRF4000_RCOT 0x150010
 #define FRF4000_RCTM 0x150008
 #define FRF4000_RCON 0x150004
 #define FRF4000_BDBW 0x150003

/* RRF4000_REGISTER22 */
 #define RRF4000_REGISTER22 0x16
 #define FRF4000_RCMD 0x1600f0
 #define FRF4000_RCSP 0x16000f

/* RRF4000_REGISTER23 */
 #define RRF4000_REGISTER23 0x17
 #define FRF4000_ACN1 0x170080
 #define FRF4000_AEN1 0x170040
 #define FRF4000_ADN1 0x170020
 #define FRF4000_ABW1 0x170018
 #define FRF4000_AGC1 0x170004
 #define FRF4000_ACB1 0x170002
 #define FRF4000_AFL1 0x170001

/* RRF4000_REGISTER24 */
 #define RRF4000_REGISTER24 0x18
 #define FRF4000_ASC1 0x180080
 #define FRF4000_ASN1 0x180040
 #define FRF4000_AOL1 0x180020
 #define FRF4000_AVL1 0x180010
 #define FRF4000_ARC1 0x18000e
 #define FRF4000_ARS1 0x180001

/* RRF4000_REGISTER25 */
 #define RRF4000_REGISTER25 0x19
 #define FRF4000_APEN 0x190080
 #define FRF4000_APBP 0x190040
 #define FRF4000_ASBP 0x190020
 #define FRF4000_AINV 0x190010
 #define FRF4000_ASGC 0x19000c
 #define FRF4000_NU19 0x190002
 #define FRF4000_ARS2 0x190001

/* RRF4000_REGISTER26 */
 #define RRF4000_REGISTER26 0x1a
 #define FRF4000_APD1 0x1a00ff

/* RRF4000_REGISTER27 */
 #define RRF4000_REGISTER27 0x1b
 #define FRF4000_APX1 0x1b00ff

/* RRF4000_REGISTER28 */
 #define RRF4000_REGISTER28 0x1c
 #define FRF4000_APN1 0x1c00ff

/* RRF4000_REGISTER29 */
 #define RRF4000_REGISTER29 0x1d
 #define FRF4000_AT1A 0x1d00f0
 #define FRF4000_AT1B 0x1d000f

/* RRF4000_REGISTER30 */
 #define RRF4000_REGISTER30 0x1e
 #define FRF4000_AT1C 0x1e00f0
 #define FRF4000_AT1D 0x1e000f

/* RRF4000_REGISTER31 */
 #define RRF4000_REGISTER31 0x1f
 #define FRF4000_AF1A 0x1f00f0
 #define FRF4000_AF1B 0x1f000f

/* RRF4000_REGISTER32 */
 #define RRF4000_REGISTER32 0x20
 #define FRF4000_AF1C 0x2000f0
 #define FRF4000_ASAV 0x20000f

/* RRF4000_REGISTER33 */
 #define RRF4000_REGISTER33 0x21
 #define FRF4000_AWR1 0x2100ff

/* RRF4000_REGISTER34 */
 #define RRF4000_REGISTER34 0x22
 #define FRF4000_ACN2 0x220080
 #define FRF4000_AEN2 0x220040
 #define FRF4000_ADN2 0x220020
 #define FRF4000_ABW2 0x220018
 #define FRF4000_AGC2 0x220004
 #define FRF4000_ACB2 0x220002
 #define FRF4000_AFL2 0x220001

/* RRF4000_REGISTER35 */
 #define RRF4000_REGISTER35 0x23
 #define FRF4000_ASC2 0x230080
 #define FRF4000_ASN2 0x230040
 #define FRF4000_AOL2 0x230020
 #define FRF4000_AVL2 0x230010
 #define FRF4000_ARC2 0x23000e
 #define FRF4000_ARS2_2 0x230001

/* RRF4000_REGISTER36 */
 #define RRF4000_REGISTER36 0x24
 #define FRF4000_APD2 0x2400ff

/* RRF4000_REGISTER37 */
 #define RRF4000_REGISTER37 0x25
 #define FRF4000_APX2 0x2500ff

/* RRF4000_REGISTER38 */
 #define RRF4000_REGISTER38 0x26
 #define FRF4000_APN2 0x2600ff

/* RRF4000_REGISTER39 */
 #define RRF4000_REGISTER39 0x27
 #define FRF4000_AT2A 0x2700f0
 #define FRF4000_AT2B 0x27000f

/* RRF4000_REGISTER40 */
 #define RRF4000_REGISTER40 0x28
 #define FRF4000_AT2C 0x2800f0
 #define FRF4000_AT2D 0x28000f

/* RRF4000_REGISTER41 */
 #define RRF4000_REGISTER41 0x29
 #define FRF4000_AF2A 0x2900f0
 #define FRF4000_AF2B 0x29000f

/* RRF4000_REGISTER42 */
 #define RRF4000_REGISTER42 0x2a
 #define FRF4000_AWR2 0x2a00ff

/* RRF4000_REGISTER43 */
 #define RRF4000_REGISTER43 0x2b
 #define FRF4000_NU2B 0x2b0080
 #define FRF4000_AF2C 0x2b0078
 #define FRF4000_BBPM 0x2b0006
 #define FRF4000_BBPC 0x2b0001

/* RRF4000_REGISTER44 */
 #define RRF4000_REGISTER44 0x2c
 #define FRF4000_NU2C 0x2c00c0
 #define FRF4000_IFGC 0x2c003c
 #define FRF4000_IFMN 0x2c0003

/* RRF4000_REGISTER45 */
 #define RRF4000_REGISTER45 0x2d
 #define FRF4000_NU2D 0x2d0080
 #define FRF4000_IQMN 0x2d0040
 #define FRF4000_IQLS 0x2d0020
 #define FRF4000_IQDB 0x2d0018
 #define FRF4000_IQGC 0x2d0007

/* RRF4000_REGISTER46 */
 #define RRF4000_REGISTER46 0x2e
 #define FRF4000_IQFT 0x2e0080
 #define FRF4000_IQRT 0x2e0060
 #define FRF4000_LSS2 0x2e0010
 #define FRF4000_FSV2 0x2e0008
 #define FRF4000_VSS2 0x2e0004
 #define FRF4000_OKS2 0x2e0003

/* RRF4000_REGISTER47 */
 #define RRF4000_REGISTER47 0x2f
 #define FRF4000_NU2F 0x2f00e0
 #define FRF4000_OSS2 0x2f001f

/* RRF4000_REGISTER48 */
 #define RRF4000_REGISTER48 0x30
 #define FRF4000_CP2I 0x300080
 #define FRF4000_DOS2 0x300040
 #define FRF4000_IVS2 0x300030
 #define FRF4000_OVC2 0x300008
 #define FRF4000_ENS2 0x300004
 #define FRF4000_CP2T 0x300002
 #define FRF4000_COS2 0x300001

/* RRF4000_REGISTER49 */
 #define RRF4000_REGISTER49 0x31
 #define FRF4000_NU31 0x3100f0
 #define FRF4000_XOBN 0x310008
 #define FRF4000_NU31_2 0x310006
 #define FRF4000_XRGN 0x310001

/* RRF4000_REGISTER50 */
 #define RRF4000_REGISTER50 0x32
 #define FRF4000_CNS1 0x320080
 #define FRF4000_CPTR 0x320040
 #define FRF4000_CIS1 0x320020
 #define FRF4000_VSS1 0x320010
 #define FRF4000_OKS1 0x32000c
 #define FRF4000_MDS1 0x320002
 #define FRF4000_ENS1 0x320001

/* RRF4000_REGISTER51 */
 #define RRF4000_REGISTER51 0x33
 #define FRF4000_CPRS 0x3300c0
 #define FRF4000_OSCS 0x33003e
 #define FRF4000_OSS1 0x330001

/* RRF4000_REGISTER52 */
 #define RRF4000_REGISTER52 0x34
 #define FRF4000_B 0x3400ff

/* RRF4000_REGISTER53 */
 #define RRF4000_REGISTER53 0x35
 #define FRF4000_CPS1 0x3500e0
 #define FRF4000_A 0x35001f

/* RRF4000_REGISTER54 */
 #define RRF4000_REGISTER54 0x36
 #define FRF4000_NU36 0x3600c0
 #define FRF4000_R 0x36003f

/* RRF4000_REGISTER55 */
 #define RRF4000_REGISTER55 0x37
 #define FRF4000_NU37 0x3700c0
 #define FRF4000_LODV 0x370038
 #define FRF4000_DFSC 0x370004
 #define FRF4000_DFST2 0x370003

/* RRF4000_REGISTER56 */
 #define RRF4000_REGISTER56 0x38
 #define FRF4000_DFST1 0x3800ff

/* RRF4000_REGISTER57 */
 #define RRF4000_REGISTER57 0x39
 #define FRF4000_DFST0 0x3900ff

/* RRF4000_REGISTER58 */
 #define RRF4000_REGISTER58 0x3a
 #define FRF4000_TRFM 0x3a00ff

/* RRF4000_REGISTER59 */
 #define RRF4000_REGISTER59 0x3b
 #define FRF4000_NU3B 0x3b0080
 #define FRF4000_MXEN 0x3b0040
 #define FRF4000_MXTS 0x3b0038
 #define FRF4000_NU3B_2 0x3b0007

/* RRF4000_REGISTER60 */
 #define RRF4000_REGISTER60 0x3c
 #define FRF4000_LCFP 0x3c0080
 #define FRF4000_LCSC 0x3c0040
 #define FRF4000_NU3C 0x3c0020
 #define FRF4000_MXGM 0x3c001f

/* RRF4000_REGISTER61 */
 #define RRF4000_REGISTER61 0x3d
 #define FRF4000_CMBP 0x3d00ff

/* RRF4000_REGISTER62 */
 #define RRF4000_REGISTER62 0x3e
 #define FRF4000_NU3E 0x3e0080
 #define FRF4000_LCPL 0x3e0040
 #define FRF4000_LCFC 0x3e003f

/* RRF4000_REGISTER63 */
 #define RRF4000_REGISTER63 0x3f
 #define FRF4000_LCOS 0x3f0080
 #define FRF4000_LCAL 0x3f0040
 #define FRF4000_LCTF 0x3f0038
 #define FRF4000_LCTW 0x3f0007

/* RRF4000_REGISTER64 */
 #define RRF4000_REGISTER64 0x40
 #define FRF4000_LCDS 0x400080
 #define FRF4000_LCEC 0x400040
 #define FRF4000_LCCK 0x400030
 #define FRF4000_LC1S 0x400008
 #define FRF4000_LC2S 0x400004
 #define FRF4000_LC2L 0x400002
 #define FRF4000_LC2H 0x400001

/* RRF4000_REGISTER65 */
 #define RRF4000_REGISTER65 0x41
 #define FRF4000_LCTN 0x410080
 #define FRF4000_LCGN 0x410040
 #define FRF4000_LCHT 0x41003f

/* RRF4000_REGISTER66 */
 #define RRF4000_REGISTER66 0x42
 #define FRF4000_LCLP 0x4200c0
 #define FRF4000_LCAW 0x420038
 #define FRF4000_LCAT 0x420007

/* RRF4000_REGISTER67 */
 #define RRF4000_REGISTER67 0x43
 #define FRF4000_LCFR 0x430080
 #define FRF4000_DQCW 0x43007f

/* RRF4000_REGISTER68 */
 #define RRF4000_REGISTER68 0x44
 #define FRF4000_LDS1 0x4400c0
 #define FRF4000_LIBC 0x440020
 #define FRF4000_LIFC 0x44001c
 #define FRF4000_LNEN 0x440003

/* RRF4000_REGISTER69 */
 #define RRF4000_REGISTER69 0x45
 #define FRF4000_NU45 0x450080
 #define FRF4000_LDS2 0x450060
 #define FRF4000_LSBC 0x450018
 #define FRF4000_LTBC 0x450007

/* RRF4000_REGISTER70 */
 #define RRF4000_REGISTER70 0x46
 #define FRF4000_LAEN 0x460080
 #define FRF4000_LAHO 0x460040
 #define FRF4000_LAGP 0x460020
 #define FRF4000_LAGG 0x46001c
 #define FRF4000_LAGA 0x460003

/* RRF4000_REGISTER71 */
 #define RRF4000_REGISTER71 0x47
 #define FRF4000_NU47 0x470080
 #define FRF4000_LAGD 0x470040
 #define FRF4000_EPKD 0x470020
 #define FRF4000_EPNC 0x470010
 #define FRF4000_LRF2 0x47000c
 #define FRF4000_PGSE 0x470002
 #define FRF4000_LGSM 0x470001

/* RRF4000_REGISTER72 */
 #define RRF4000_REGISTER72 0x48
 #define FRF4000_EXPN 0x4800e0
 #define FRF4000_PDPR 0x480010
 #define FRF4000_VPSL 0x48000f

/* RRF4000_REGISTER73 */
 #define RRF4000_REGISTER73 0x49
 #define FRF4000_LTSW 0x4900c0
 #define FRF4000_ENLT 0x490020
 #define FRF4000_PDPB 0x490010
 #define FRF4000_PKSB 0x49000f

/* RRF4000_REGISTER74 */
 #define RRF4000_REGISTER74 0x4a
 #define FRF4000_DCEN 0x4a0080
 #define FRF4000_DTAU 0x4a0078
 #define FRF4000_ATAU 0x4a0007

/* RRF4000_REGISTER75 */
 #define RRF4000_REGISTER75 0x4b
 #define FRF4000_NU4B 0x4b00e0
 #define FRF4000_BCDE 0x4b0010
 #define FRF4000_BDEN 0x4b000e
 #define FRF4000_IMDE 0x4b0001

/* RRF4000_REGISTER76 */
 #define RRF4000_REGISTER76 0x4c
 #define FRF4000_NU4C 0x4c00f8
 #define FRF4000_BISE 0x4c0006
 #define FRF4000_NU4D 0x4c0001	
 
 /*Standard initial defines.*/
	#define RF4000_STEPSIZE		500000		/* Stepsize for initialization.*/
	#define RF4000_FXTAL		24			/* Set for Europe, IF = 36 MHz.*/
	#define RF4000_BW			8
	#define RF4000_IF			36000
	#define RF4000_CRYSTALBUF	0			/* Turn on the crystal output buffer.*/
	#define RF4000_CRYSTALOSC	0			/* Turn on the crystal oscillator.*/

	/* Define for the thermal mode.*/
	#define RF4000_THERM_ON		1
	#define RF4000_THERM_OFF	0
	
	
 
#endif