d0372_map.h

st7710的tuner标准驱动

 #define F0372_CARRIERLOCKTH_MSB  0xf05600ff

/* CARRIERLOCKTH_MMSB */
 #define R0372_CARRIERLOCKTH_MMSB 0xf057
 #define F0372_CARRIERLOCKTH_MMSB  0xf0570003

/* CARRIERAGCREF_LSB */
 #define R0372_CARRIERAGCREF_LSB 0xf058
 #define F0372_CARRIERAGCREF_LSB  0xf05800ff

/* CARRIERAGCREF_MSB */
 #define R0372_CARRIERAGCREF_MSB 0xf059
 #define F0372_CARRIERAGCREF_MSB  0xf059000f

/* CARAGCMIXRATIO */
 #define R0372_CARAGCMIXRATIO 0xf05a
 #define F0372_CARAGCMIXRATIO  0xf05a0007

/* FSM1 */
 #define R0372_FSM1 0xf05b
 #define F0372_RSTFSM1  0xf05b0080
 #define F0372_FRZFSM1  0xf05b007f

/* FSM2 */
 #define R0372_FSM2 0xf05c
 #define F0372_RSTFSM2  0xf05c0080
 #define F0372_FRZFSM2  0xf05c001f

/* MAINSMUP */
 #define R0372_MAINSMUP 0xf05d
 #define F0372_MAINSMUP  0xf05d00ff

/* EQSMUP */
 #define R0372_EQSMUP 0xf05e
 #define F0372_EQSMUP  0xf05e00ff

/* STATEVAL_LSB */
 #define R0372_STATEVAL_LSB 0xf05f
 #define F0372_STATEVAL_LSB  0xf05f00ff

/* STATEVAL_MSB */
 #define R0372_STATEVAL_MSB 0xf060
 #define F0372_STATEVAL_MSB  0xf06000ff

/* STATEVAL_MMSB */
 #define R0372_STATEVAL_MMSB 0xf061
 #define F0372_STATEVAL_MMSB  0xf0610007

/* UPDATEVCXO_LSB */
 #define R0372_UPDATEVCXO_LSB 0xf062
 #define F0372_UPDATEVCXO_LSB  0xf06200ff

/* UPDATEVCXO_MSB */
 #define R0372_UPDATEVCXO_MSB 0xf063
 #define F0372_UPDATEVCXO_MSB  0xf06300ff

/* UPDATEVCXO_MMSB */
 #define R0372_UPDATEVCXO_MMSB 0xf064
 #define F0372_UPDATEVCXO_MMSB  0xf0640007

/* MAXNBFRAMERCA */
 #define R0372_MAXNBFRAMERCA 0xf065
 #define F0372_MAXNBFRAMERCA  0xf065003f

/* MAXNBFRAMEDD_LSB */
 #define R0372_MAXNBFRAMEDD_LSB 0xf066
 #define F0372_MAXNBFRAMEDD_LSB  0xf06600ff

/* MAXNBFRAMEDD_MSB */
 #define R0372_MAXNBFRAMEDD_MSB 0xf067
 #define F0372_MAXNBFRAMEDD_MSB  0xf0670001

/* NCO_TIMEOUT_LSB */
 #define R0372_NCO_TIMEOUT_LSB 0xf068
 #define F0372_NCO_TIMEOUT_LSB  0xf06800ff

/* NCO_TIMEOUT_MSB */
 #define R0372_NCO_TIMEOUT_MSB 0xf069
 #define F0372_NCO_TIMEOUT_MSB  0xf06900ff

/* NCO_TIMEOUT_MMSB */
 #define R0372_NCO_TIMEOUT_MMSB 0xf06a
 #define F0372_NCO_TIMEOUT_MMSB  0xf06a00ff

/* DEMSTATUS */
 #define R0372_DEMSTATUS 0xf06b
 #define F0372_EQSTATE  0xf06b00f0
 #define F0372_MAINSTATE  0xf06b000f

/* SYSCTRL */
 #define R0372_SYSCTRL 0xf06c
 #define F0372_STATE_SHUNT  0xf06c0001

/* SEG_INIT_LSB */
 #define R0372_SEG_INIT_LSB 0xf06d
 #define F0372_SEG_INIT_LSB  0xf06d00ff

/* SEG_INIT_MSB */
 #define R0372_SEG_INIT_MSB 0xf06e
 #define F0372_SEG_INIT_MSB  0xf06e0007

/* CENTROIDCALDONE_LSB */
 #define R0372_CENTROIDCALDONE_LSB 0xf06f
 #define F0372_CENTROIDCALDONE_LSB  0xf06f00ff

/* CENTROIDCALDONE_MSB */
 #define R0372_CENTROIDCALDONE_MSB 0xf070
 #define F0372_CENTROIDCALDONE_MSB  0xf0700007

/* CENTROIDOFFSET_LSB */
 #define R0372_CENTROIDOFFSET_LSB 0xf071
 #define F0372_CENTROIDOFFSET_LSB  0xf07100ff

/* CENTROIDOFFSET_MSB */
 #define R0372_CENTROIDOFFSET_MSB 0xf072
 #define F0372_CENTROIDOFFSET_MSB  0xf0720003

/* FFEGAINTRAIN */
 #define R0372_FFEGAINTRAIN 0xf073
 #define F0372_FFEGAINTRAIN  0xf073007f

/* FFEGAINRCA1 */
 #define R0372_FFEGAINRCA1 0xf074
 #define F0372_FFEGAINRCA1  0xf074007f

/* FFEGAINRCA2 */
 #define R0372_FFEGAINRCA2 0xf075
 #define F0372_FFEGAINRCA2  0xf075007f

/* FFEGAINDDM1 */
 #define R0372_FFEGAINDDM1 0xf076
 #define F0372_FFEGAINDDM1  0xf076007f

/* FFEGAINDDM2 */
 #define R0372_FFEGAINDDM2 0xf077
 #define F0372_FFEGAINDDM2  0xf077007f

/* DFEGAINTRAIN */
 #define R0372_DFEGAINTRAIN 0xf078
 #define F0372_DFEGAINTRAIN  0xf078007f

/* DFEGAINRCA1 */
 #define R0372_DFEGAINRCA1 0xf079
 #define F0372_DFEGAINRCA1  0xf079007f

/* DFEGAINRCA2 */
 #define R0372_DFEGAINRCA2 0xf07a
 #define F0372_DFEGAINRCA2  0xf07a007f

/* DFEGAINDDM1 */
 #define R0372_DFEGAINDDM1 0xf07b
 #define F0372_DFEGAINDDM1  0xf07b007f

/* DFEGAINDDM2 */
 #define R0372_DFEGAINDDM2 0xf07c
 #define F0372_DFEGAINDDM2  0xf07c007f

/* SNR0372_TH_DDM1 */
 #define R0372_SNR_TH_DDM1 0xf07d
 #define F0372_SNR_TH_DDM1_UP  0xf07d00f0
 #define F0372_SNR_TH_DDM1_DOWN  0xf07d000f

/* SNR0372_TH_DDM2 */
 #define R0372_SNR_TH_DDM2 0xf07e
 #define F0372_SNR_TH_DDM2_UP  0xf07e00f0
 #define F0372_SNR_TH_DDM2_DOWN  0xf07e000f

/* SNR0372_TH_PT */
 #define R0372_SNR_TH_PT 0xf07f
 #define F0372_SNR_TH_PT_UP  0xf07f00f0
 #define F0372_SNR_TH_PT_DOWN  0xf07f000f

/* SNR0372_TH_RCA1 */
 #define R0372_SNR_TH_RCA1 0xf080
 #define F0372_SNR_TH_RCA1_UP  0xf08000f0
 #define F0372_SNR_TH_RCA1_DOWN  0xf080000f

/* SNR0372_TH_RCA2 */
 #define R0372_SNR_TH_RCA2 0xf081
 #define F0372_SNR_TH_RCA2_UP  0xf08100f0
 #define F0372_SNR_TH_RCA2_DOWN  0xf081000f

/* LEAKFFETRAIN */
 #define R0372_LEAKFFETRAIN 0xf082
 #define F0372_LEAKFFETRAIN  0xf082000f

/* LEAKFFERCA */
 #define R0372_LEAKFFERCA 0xf083
 #define F0372_LEAKFFERCATRACK  0xf08300f0
 #define F0372_LEAKFFERCAACQ  0xf083000f

/* LEAKFFEDDM */
 #define R0372_LEAKFFEDDM 0xf084
 #define F0372_LEAKFFEDDM2  0xf08400f0
 #define F0372_LEAKFFEDDM1  0xf084000f

/* LEAKDFETRAIN */
 #define R0372_LEAKDFETRAIN 0xf085
 #define F0372_LEAKDFETRAIN  0xf085000f

/* LEAKDFERCA */
 #define R0372_LEAKDFERCA 0xf086
 #define F0372_LEAKDFERCATRACK  0xf08600f0
 #define F0372_LEAKDFERCAACQ  0xf086000f

/* LEAKDFEDDM */
 #define R0372_LEAKDFEDDM 0xf087
 #define F0372_LEAKDFEDDM2  0xf08700f0
 #define F0372_LEAKDFEDDM1  0xf087000f

/* TRACK_REG */
 #define R0372_TRACK_REG 0xf088
 #define F0372_EQ_DAGCGAIN  0xf0880020
 #define F0372_EQDAGCFRZ  0xf0880010
 #define F0372_NCOPTGAIN  0xf0880008
 #define F0372_TTFRZ  0xf0880004
 #define F0372_PTGAIN  0xf0880002
 #define F0372_PTFRZ  0xf0880001

/* DFE_CTRL */
 #define R0372_DFE_CTRL 0xf089
 #define F0372_EQSWRSTN  0xf0890080
 #define F0372_DCFILTERON  0xf0890040
 #define F0372_SEGSYNCTRAINEN  0xf0890020
 #define F0372_DFE_GO  0xf0890010
 #define F0372_DEROT_EN  0xf0890008
 #define F0372_DAGC_GO  0xf0890004
 #define F0372_DAGC_GAIN  0xf0890003

/* TAP_CTRL */
 #define R0372_TAP_CTRL 0xf08a
 #define F0372_CFGTAPS  0xf08a00c0
 #define F0372_DFE2  0xf08a0020
 #define F0372_DFE1  0xf08a0010
 #define F0372_FFE  0xf08a0008
 #define F0372_WR_NRD  0xf08a0004
 #define F0372_NEW_REQ  0xf08a0002
 #define F0372_START  0xf08a0001

/* TAP_POINTER_LSB */
 #define R0372_TAP_POINTER_LSB 0xf08b
 #define F0372_TAP_POINTER_LSB  0xf08b00ff

/* TAP_POINTER_MSB */
 #define R0372_TAP_POINTER_MSB 0xf08c
 #define F0372_TAP_POINTER_MSB  0xf08c0007

/* TAP_GETBYTE */
 #define R0372_TAP_GETBYTE 0xf08d
 #define F0372_TAP_GETBYTE  0xf08d00ff

/* TAP_PUTBYTE */
 #define R0372_TAP_PUTBYTE 0xf08e
 #define F0372_TAP_PUTBYTE  0xf08e00ff

/* DECCTRL */
 #define R0372_DECCTRL 0xf08f
 #define F0372_ILTSTEN  0xf08f0008
 #define F0372_RANDFRZ  0xf08f0004
 #define F0372_RSFRZ  0xf08f0002
 #define F0372_PS_MODE  0xf08f0001

/* DECSYNCCTRL */
 #define R0372_DECSYNCCTRL 0xf090
 #define F0372_PRST  0xf0900001

/* SER_LSB */
 #define R0372_SER_LSB 0xf091
 #define F0372_SER_LSB  0xf09100ff

/* SER_MSB */
 #define R0372_SER_MSB 0xf092
 #define F0372_SER_MSB  0xf09200ff

/* SER_PERIOD_LSB */
 #define R0372_SER_PERIOD_LSB 0xf093
 #define F0372_SER_PERIOD_LSB  0xf09300ff

/* SER_PERIOD_MSB */
 #define R0372_SER_PERIOD_MSB 0xf094
 #define F0372_SER_PERIOD_MSB  0xf09400ff

/* DEC_STATUS */
 #define R0372_DEC_STATUS 0xf095
 #define F0372_OQMEANPWORK  0xf0950040
 #define F0372_FRMLOCK  0xf0950020
 #define F0372_FIELD  0xf0950010
 #define F0372_VSBMODE  0xf095000f

/* SIGNAL_POWER_LSB */
 #define R0372_SIGNAL_POWER_LSB 0xf096
 #define F0372_SIGNAL_POWER_LSB  0xf09600ff

/* SIGNAL_POWER_MSB */
 #define R0372_SIGNAL_POWER_MSB 0xf097
 #define F0372_SIGNAL_POWER_MSB  0xf09700ff

/* ERROR_POWER_LSB */
 #define R0372_ERROR_POWER_LSB 0xf098
 #define F0372_ERROR_POWER_LSB  0xf09800ff

/* ERROR_POWER_MSB */
 #define R0372_ERROR_POWER_MSB 0xf099
 #define F0372_ERROR_POWER_MSB  0xf099007f

/* BERCTRL */
 #define R0372_BERCTRL 0xf09a
 #define F0372_BER_PER_UNCORR  0xf09a007f

/* BER0372_LSB */
 #define R0372_BER_LSB 0xf09b
 #define F0372_BER_LSB  0xf09b00ff

/* BER_MSB */
 #define R0372_BER_MSB 0xf09c
 #define F0372_BER_MSB  0xf09c00ff

/* BER_PERIOD_LLSB */
 #define R0372_BER_PERIOD_LLSB 0xf09d
 #define F0372_BER_PERIOD_LLSB  0xf09d00ff

/* BER_PERIOD_LSB */
 #define R0372_BER_PERIOD_LSB 0xf09e
 #define F0372_BER_PERIOD_LSB  0xf09e00ff

/* BER_PERIOD_MSB */
 #define R0372_BER_PERIOD_MSB 0xf09f
 #define F0372_BER_PERIOD_MSB  0xf09f00ff

/* BER_PERIOD_MMSB */
 #define R0372_BER_PERIOD_MMSB 0xf0a0
 #define F0372_BER_PERIOD_MMSB  0xf0a0000f

/* FRAMECORTH_LSB */
 #define R0372_FRAMECORTH_LSB 0xf0a1
 #define F0372_FRAMECORTH_LSB  0xf0a100ff

/* FRAMECORTH_MSB */
 #define R0372_FRAMECORTH_MSB 0xf0a2
 #define F0372_FRAMECORTH_MSB  0xf0a200ff

/* FRAMELOCKDELOCK */
 #define R0372_FRAMELOCKDELOCK 0xf0a3
 #define F0372_FRAMELOCK  0xf0a300f0
 #define F0372_FRAMEDELOCK  0xf0a3000f

/* CI_BYTE_CLK */
 #define R0372_CI_BYTE_CLK 0xf0a4
 #define F0372_T_HIGH  0xf0a400f0
 #define F0372_T_LOW  0xf0a4000f

/* TS_FORMAT */
 #define R0372_TS_FORMAT 0xf0a5
 #define F0372_SYNC_STRIP  0xf0a50010
 #define F0372_SWAP  0xf0a50008
 #define F0372_POLARITY  0xf0a50004
 #define F0372_CI  0xf0a50002
 #define F0372_SERIES  0xf0a50001

/* ACI_CTRL */
 #define R0372_ACI_CTRL 0xf0a6
 #define F0372_TRANSMIT  0xf0a60080
 #define F0372_ACI_CTRL  0xf0a6007f

/* ACI_CHANNEL */
 #define R0372_ACI_CHANNEL 0xf0a7
 #define F0372_ACI_CHANNEL  0xf0a7007f

/* ACI_PROGRAM_LSB */
 #define R0372_ACI_PROGRAM_LSB 0xf0a8
 #define F0372_ACI_PROGRAM_LSB  0xf0a800ff

/* ACI_PROGRAM_MSB */
 #define R0372_ACI_PROGRAM_MSB 0xf0a9
 #define F0372_READY  0xf0a90004
 #define F0372_ACI_PROGRAM_MSB  0xf0a90003
	

#ifdef __cplusplus
	 }
	#endif    


#endif