d0361.c

st7710的tuner标准驱动

/*R_DAC1R*/          0x00,
/*R_IOCFG2*/         0x80,
/*R_SDFR*/           0x00,
/*R_STATUS*/         0xF9,


/*R_AUX_CLK*/        0x1C,
/*R_RESERVED_1*/     0x00,
/*R_RESERVED_2*/     0x00,
/*R_RESERVED_3*/     0x00,
/*R_AGC2MAX*/        0x8C,


/*R_AGC2MIN*/        0x14,
/*R_AGC1MAX*/        0xFF,
/*R_AGC1MIN*/        0x6B,
/*R_AGCR*/           0xBC,
/*R_AGC2TH*/         0x50,


/*R_AGC12C*/         0x40,
/*R_AGCCTRL1*/       0x85,
/*R_AGCCTRL2*/       0x18,
/*R_AGC1VAL1*/       0xFF,
/*R_AGC1VAL2*/       0x0F,



/*R_AGC2VAL1*/       0xFA,
/*R_AGC2VAL2*/       0x01,
/*R_AGC2PGA*/        0x00,
/*R_OVF_RATE1*/      0x00,
/*R_OVF_RATE2*/      0x00,


/*R_GAIN_SRC1*/      0xFD,
/*R_GAIN_SRC2*/      0xAC,
/*R_INC_DEROT1*/     0x55,
/*R_INC_DEROT2*/     0x4B,
/*R_PPM_CPAMP_DIR*/  0x2C, /*0x5D*/



/*R_PPM_CPAMP_INV*/  0x00,
/*R_FREESTFE_1*/     0x03,
/*R_FREESTFE_2*/     0x1C,
/*R_DCOFFSET*/       0x06,
/*R_EN_PROCESS*/     0x01,
/*R_RESERVED_4*/     0xFF,


/*R_RESERVED_5*/     0x00,
/*R_RESERVED_6*/     0x80,
/*R_RESERVED_7*/     0x1D,
/*R_RESERVED_8*/     0x29,
/*R_RESERVED_9*/     0x14,


/*R_RESERVED_10*/    0xFE,
/*R_EPQ*/            0x02,
/*R_EPQAUTO*/        0x01,
/*R_CHP_TAPS*/       0x03,/* 0x01 for 2k mode and 0x03 for 8K mode*/
/*R_CHP_DYN_COEFF*/  0x00,


/*R_PPM_STATE_MAC*/  0x23,
/*R_INR_THRESHOLD*/  0x09,
/*R_COR_CTL*/        0x20,
/*R_COR_STAT*/       0xF6,
/*R_COR_INTEN*/      0x00,


/*R_COR_INTSTAT*/    0x3D,
/*R_COR_MODEGUARD*/  0x00,
/*R_AGC_CTL*/        0x18,
/*R_RESERVED_11*/    0x00,
/*R_RESERVED_12*/    0x00,


/*R_AGC_TARGET*/     0x1E,
/*R_AGC_GAIN1*/      0xFB,
/*R_AGC_GAIN2*/      0x1A,
/*R_RESERVED_13*/    0x00,
/*R_RESERVED_14*/    0x00,


/*R_RESERVED_15*/    0x00,
/*R_CAS_CTL*/        0x40,
/*R_CAS_FREQ*/       0xB3,
/*R_CAS_DAGCGAIN*/   0x10,
/*R_SYR_CTL*/        0x04,


/*R_SYR_STAT*/       0x13,
/*R_RESERVED_16*/    0x00,
/*R_RESERVED_17*/    0x00,
/*R_SYR_OFFSET1*/    0x00,
/*R_SYR_OFFSET2*/    0x00,


/*R_RESERVED_18*/    0x00,
/*R_SCR_CTL*/        0x00,
/*R_PPM_CTL1*/       0x38,
/*R_TRL_CTL*/        0x94,/* 0x14 */
/*R_TRL_NOMRATE1*/   0xAB, /*0xAC*/



/*R_TRL_NOMRATE2*/   0x56,
/*R_TRL_TIME1*/      0x3C,
/*R_TRL_TIME2*/      0x01,
/*R_CRL_CTL*/        0x4F,
/*R_CRL_FREQ1*/      0x30,


/*R_CRL_FREQ2*/      0xBE,
/*R_CRL_FREQ3*/      0xFE,
/*R_CHC_CTL1*/       0x11,
/*R_CHC_SNR*/        0xC3,
/*R_BDI_CTL*/        0x00,


/*R_DMP_CTL*/        0x00,
/*R_TPS_RCVD1*/      0x31,
/*R_TPS_RCVD2*/      0x02,
/*R_TPS_RCVD3*/      0x01,
/*R_TPS_RCVD4*/      0x30,


/*R_TPS_ID_CELL1*/   0x00,
/*R_TPS_ID_CELL2*/   0x00,
/*R_RESERVED_19*/    0x01,
/*R_RESERVED_20*/    0x02,
/*R_RESERVED_21*/    0x02,


/*R_TPS_CTL*/        0x00,
/*R_CTL_FFTOSNUM*/   0x10,
/*R_TESTSELECT*/     0x0C,
/*R_MSC_REV*/        0x0A,
/*R_PIR_CTL*/        0x00,


/*R_SNR_CARRIER1*/   0xA9,
/*R_SNR_CARRIER2*/   0x86,
/*R_RESERVED_22*/    0x30,
/*R_RESERVED_23*/    0x00,
/*R_RESERVED_24*/    0x00,


/*R_RESERVED_25*/    0x00,
/*R_RESERVED_26*/    0x00,
/*R_RESERVED_27*/    0x00,
/*R_RESERVED_28*/    0x00,
/*R_RESERVED_29*/    0x00,


/*R_RESERVED_30*/    0x00,
/*R_RESERVED_31*/    0x00,
/*R_VTH0*/           0x1E,
/*R_VTH1*/           0x14,
/*R_VTH2*/           0x0F,


/*R_VTH3*/           0x09,
/*R_RESERVED_32*/    0x00,
/*R_VTH5*/           0x05,
/*R_RESERVED_33*/    0x00,
/*R_VITPROG*/        0x92,


/*R_PR*/             0xAF,
/*R_VSEARCH*/        0x30,
/*R_RS*/             0xBC,
/*R_RSOUT*/          0x05,
/*R_ERRCTRL1*/       0x12,


/*R_ERRCNTM1*/       0x00,
/*R_ERRCNTL1*/       0x00,
/*R_ERRCTRL2*/       0xB3,
/*R_ERRCNTM2*/       0x00,
/*R_ERRCNTL2*/       0x00,


/*R_RESERVED_34*/    0x00,
/*R_VERROR*/         0x00,
/*R_ERRCTRL3*/       0x12,
/*R_ERRCNTM3*/       0x00,
/*R_ERRCNTL3*/       0x00,


/*R_RESERVED_35*/    0x00,
/*R_RESERVED_36*/    0x03,
/*R_RESERVED_37*/    0x00,
/*R_RESERVED_38*/    0x03,
/*R_LNBRX*/          0x80, /*0xC0*/


/*R_RESERVED_39*/    0xB0,
/*R_RESERVED_40*/    0x07,
/*R_RESERVED_41*/    0x00,
/*R_ANACTRL*/        0x00,
/*R_RESERVED_42*/    0x00,
 

/*R_RESERVED_43*/    0x00,
/*R_RESERVED_44*/    0x00,
/*R_RESERVED_45*/    0x00,
/*R_RESERVED_46*/    0x00,
/*R_RESERVED_47*/    0x00,


/*R_RESERVED_48*/    0x00,
/*R_RESERVED_49*/    0x00,
/*R_RESERVED_50*/    0x00,
/*R_CONSTMODE*/      0x02,
/*R_CONSTCARR1*/     0xD2,


/*R_CONSTCARR2*/     0x04,
/*R_ICONSTEL*/       0xDB,
/*R_QCONSTEL*/       0x8,
/*R_RESERVED_51*/    0x00,
/*R_RESERVED_52*/    0x00,



/*R_RESERVED_53*/    0x00,
/*R_RESERVED_54*/    0x00,
/*R_RF_AGC1*/        0x81,
/*R_RF_AGC2*/        0x80,
/*R_RESERVED_55*/    0x08,         


/*R_ANACTRL2*/       0x00,
/*R_PLLMDIV*/        0x00,
/*R_PLLNDIV*/        0x03,
/*R_PLLSETUP*/       0x17,
/*R_ANADIGCTRL*/     0x00,
/*R_TSTBIST*/        0x00

	        };/** end of array TMM7MHZ**/
#elif defined (STTUNER_TERR_TMM_8MHZ)
 U8 Def361Val[STV361_NBREGS]={
/*R_ID*/             0x30, 
/*R_I2CRPT*/         0x22,
/*R_TOPCTRL*/        0x02,
/*R_IOCFG0*/         0x40,
/*R_DAC0R*/          0x00,


/*R_IOCFG1*/         0x40,
/*R_DAC1R*/          0x00,
/*R_IOCFG2*/         0x80,
/*R_SDFR*/           0x00,
/*R_STATUS*/         0xF9,


/*R_AUX_CLK*/        0x1C,
/*R_RESERVED_1*/     0x00,
/*R_RESERVED_2*/     0x00,
/*R_RESERVED_3*/     0x00,
/*R_AGC2MAX*/        0x8C,


/*R_AGC2MIN*/        0x14,
/*R_AGC1MAX*/        0xFF,
/*R_AGC1MIN*/        0x6B,
/*R_AGCR*/           0xBC,
/*R_AGC2TH*/         0x50,


/*R_AGC12C*/         0x40,
/*R_AGCCTRL1*/       0x85,
/*R_AGCCTRL2*/       0x18,
/*R_AGC1VAL1*/       0xFF,
/*R_AGC1VAL2*/       0x0F,



/*R_AGC2VAL1*/       0xFA,
/*R_AGC2VAL2*/       0x01,
/*R_AGC2PGA*/        0x00,
/*R_OVF_RATE1*/      0x00,
/*R_OVF_RATE2*/      0x00,


/*R_GAIN_SRC1*/      0xFD,
/*R_GAIN_SRC2*/      0xAC,
/*R_INC_DEROT1*/     0x55,
/*R_INC_DEROT2*/     0x4B,
/*R_PPM_CPAMP_DIR*/  0x2C, /*0x5D*/



/*R_PPM_CPAMP_INV*/  0x00,
/*R_FREESTFE_1*/     0x03,
/*R_FREESTFE_2*/     0x1C,
/*R_DCOFFSET*/       0x06,
/*R_EN_PROCESS*/     0x01,
/*R_RESERVED_4*/     0xFF,


/*R_RESERVED_5*/     0x00,
/*R_RESERVED_6*/     0x80,
/*R_RESERVED_7*/     0x1D,
/*R_RESERVED_8*/     0x29,
/*R_RESERVED_9*/     0x14,


/*R_RESERVED_10*/    0xFE,
/*R_EPQ*/            0x02,
/*R_EPQAUTO*/        0x01,
/*R_CHP_TAPS*/       0x03,/* 0x01 for 2k mode and 0x03 for 8K mode*/
/*R_CHP_DYN_COEFF*/  0x00,


/*R_PPM_STATE_MAC*/  0x23,
/*R_INR_THRESHOLD*/  0x09,
/*R_COR_CTL*/        0x20,
/*R_COR_STAT*/       0xF6,
/*R_COR_INTEN*/      0x00,


/*R_COR_INTSTAT*/    0x3D,
/*R_COR_MODEGUARD*/  0x00,
/*R_AGC_CTL*/        0x18,
/*R_RESERVED_11*/    0x00,
/*R_RESERVED_12*/    0x00,


/*R_AGC_TARGET*/     0x1E,
/*R_AGC_GAIN1*/      0xFB,
/*R_AGC_GAIN2*/      0x1A,
/*R_RESERVED_13*/    0x00,
/*R_RESERVED_14*/    0x00,


/*R_RESERVED_15*/    0x00,
/*R_CAS_CTL*/        0x40,
/*R_CAS_FREQ*/       0xB3,
/*R_CAS_DAGCGAIN*/   0x10,
/*R_SYR_CTL*/        0x04,


/*R_SYR_STAT*/       0x13,
/*R_RESERVED_16*/    0x00,
/*R_RESERVED_17*/    0x00,
/*R_SYR_OFFSET1*/    0x00,
/*R_SYR_OFFSET2*/    0x00,


/*R_RESERVED_18*/    0x00,
/*R_SCR_CTL*/        0x00,
/*R_PPM_CTL1*/       0x38,
/*R_TRL_CTL*/        0x94,/* 0x14 */
/*R_TRL_NOMRATE1*/   0xAB, /*0xAC*/



/*R_TRL_NOMRATE2*/   0x56,
/*R_TRL_TIME1*/      0x3C,
/*R_TRL_TIME2*/      0x01,
/*R_CRL_CTL*/        0x4F,
/*R_CRL_FREQ1*/      0x30,


/*R_CRL_FREQ2*/      0xBE,
/*R_CRL_FREQ3*/      0xFE,
/*R_CHC_CTL1*/       0x11,
/*R_CHC_SNR*/        0xC3,
/*R_BDI_CTL*/        0x00,


/*R_DMP_CTL*/        0x00,
/*R_TPS_RCVD1*/      0x31,
/*R_TPS_RCVD2*/      0x02,
/*R_TPS_RCVD3*/      0x01,
/*R_TPS_RCVD4*/      0x30,


/*R_TPS_ID_CELL1*/   0x00,
/*R_TPS_ID_CELL2*/   0x00,
/*R_RESERVED_19*/    0x01,
/*R_RESERVED_20*/    0x02,
/*R_RESERVED_21*/    0x02,


/*R_TPS_CTL*/        0x00,
/*R_CTL_FFTOSNUM*/   0x10,
/*R_TESTSELECT*/     0x0C,
/*R_MSC_REV*/        0x0A,
/*R_PIR_CTL*/        0x00,


/*R_SNR_CARRIER1*/   0xA9,
/*R_SNR_CARRIER2*/   0x86,
/*R_RESERVED_22*/    0x30,
/*R_RESERVED_23*/    0x00,
/*R_RESERVED_24*/    0x00,


/*R_RESERVED_25*/    0x00,
/*R_RESERVED_26*/    0x00,
/*R_RESERVED_27*/    0x00,
/*R_RESERVED_28*/    0x00,
/*R_RESERVED_29*/    0x00,


/*R_RESERVED_30*/    0x00,
/*R_RESERVED_31*/    0x00,
/*R_VTH0*/           0x1E,
/*R_VTH1*/           0x14,
/*R_VTH2*/           0x0F,


/*R_VTH3*/           0x09,
/*R_RESERVED_32*/    0x00,
/*R_VTH5*/           0x05,
/*R_RESERVED_33*/    0x00,
/*R_VITPROG*/        0x92,


/*R_PR*/             0xAF,
/*R_VSEARCH*/        0x30,
/*R_RS*/             0xBC,
/*R_RSOUT*/          0x05,
/*R_ERRCTRL1*/       0x12,


/*R_ERRCNTM1*/       0x00,
/*R_ERRCNTL1*/       0x00,
/*R_ERRCTRL2*/       0xB3,
/*R_ERRCNTM2*/       0x00,
/*R_ERRCNTL2*/       0x00,


/*R_RESERVED_34*/    0x00,
/*R_VERROR*/         0x00,
/*R_ERRCTRL3*/       0x12,
/*R_ERRCNTM3*/       0x00,
/*R_ERRCNTL3*/       0x00,


/*R_RESERVED_35*/    0x00,
/*R_RESERVED_36*/    0x03,
/*R_RESERVED_37*/    0x00,
/*R_RESERVED_38*/    0x03,
/*R_LNBRX*/          0x80, /*0xC0*/


/*R_RESERVED_39*/    0xB0,
/*R_RESERVED_40*/    0x07,
/*R_RESERVED_41*/    0x00,
/*R_ANACTRL*/        0x00,
/*R_RESERVED_42*/    0x00,
 

/*R_RESERVED_43*/    0x00,
/*R_RESERVED_44*/    0x00,
/*R_RESERVED_45*/    0x00,
/*R_RESERVED_46*/    0x00,
/*R_RESERVED_47*/    0x00,


/*R_RESERVED_48*/    0x00,
/*R_RESERVED_49*/    0x00,
/*R_RESERVED_50*/    0x00,
/*R_CONSTMODE*/      0x02,
/*R_CONSTCARR1*/     0xD2,


/*R_CONSTCARR2*/     0x04,
/*R_ICONSTEL*/       0xDB,
/*R_QCONSTEL*/       0x8,
/*R_RESERVED_51*/    0x00,
/*R_RESERVED_52*/    0x00,



/*R_RESERVED_53*/    0x00,
/*R_RESERVED_54*/    0x00,
/*R_RF_AGC1*/        0x81,
/*R_RF_AGC2*/        0x80,
/*R_RESERVED_55*/    0x08,         


/*R_ANACTRL2*/       0x00,
/*R_PLLMDIV*/        0x00,
/*R_PLLNDIV*/        0x03,
/*R_PLLSETUP*/       0x17,
/*R_ANADIGCTRL*/     0x00,
/*R_TSTBIST*/        0x00

	        };/** end of array TMM8MHZ**/
#else
 U8 Def361Val[STV361_NBREGS]={
/*R_ID*/             0x30, 
/*R_I2CRPT*/         0x22,
/*R_TOPCTRL*/        0x02,
/*R_IOCFG0*/         0x40,
/*R_DAC0R*/          0x00,


/*R_IOCFG1*/         0x40,
/*R_DAC1R*/          0x00,
/*R_IOCFG2*/         0x80,
/*R_SDFR*/           0x00,
/*R_STATUS*/         0xF9,