d0360.c

st7710的tuner标准驱动

/* ----------------------------------------------------------------------------
File Name: d0360.c

Description:

    stv0360 demod driver.


Copyright (C) 1999-2001 STMicroelectronics

History:

   date: 12-Sept-2001
version: 3.1.0
 author: GB from work by GJP
comment: rewrite for terrestrial.

Reference:

    ST API Definition "TUNER Driver API" DVD-API-06
---------------------------------------------------------------------------- */


/* Includes ---------------------------------------------------------------- */
#ifdef ST_OSLINUX
   #include "stos.h"
#else
/* C libs */
#include <string.h>

#include "stlite.h"     /* Standard includes */

/* STAPI */
#include "sttbx.h"
#endif
#include "stevt.h"
#include "sttuner.h"

/* local to sttuner */
#include "util.h"       /* generic utility functions for sttuner */
#include "dbtypes.h"    /* data types for databases */
#include "sysdbase.h"   /* functions to accesss system data */

#include "ioarch.h"     /* I/O for this driver */
#include "ioreg.h"      /* I/O for this driver */


/* LLA */
#include "360_echo.h"

#include "360_drv.h"    /* misc driver functions */
#include "d0360.h"      /* header for this file */
#include "360_map.h"

#include "tioctl.h"     /* data structure typedefs for all the ter ioctl functions */
#include "mdemod.h"



 
 
 U16 STV0360_Address[STV360_NBREGS]={
 /*R_ID*/             0x00, 
/*R_I2CRPT*/         0x01, 
/*R_TOPCTRL*/        0x02 ,
/*R_IOCFG0*/         0x03, 
/*R_DAC0R*/          0x04, 

/*R_IOCFG1*/         0x05, 
/*R_DAC1R*/          0x06, 
/*R_IOCFG2*/         0x07, 
/*R_PWMFR*/          0x08,
/*R_STATUS*/         0x09,

/*R_AUX_CLK*/        0x0a,
/*R_FREESYS1*/       0x0b,
/*R_FREESYS2*/       0x0c,
/*R_FREESYS3*/       0x0d,
/*R_AGC2MAX*/        0x10, 

/*R_AGC2MIN*/        0x11, 
/*R_AGC1MAX*/        0x12, 
/*R_AGC1MIN*/        0x13, 
/*R_AGCR*/           0x14, 
/*R_AGC2TH*/         0x15, 

/*R_AGC12C3*/        0x16,
/*R_AGCCTRL1*/       0x17, 
/*R_AGCCTRL2*/       0x18,
/*R_AGC1VAL1*/       0x19,
/*R_AGC1VAL2*/       0x1a,

/*R_AGC2VAL1*/       0x1b, 
/*R_AGC2VAL2*/       0x1c, 
/*R_AGC2PGA*/        0x1d, 
/*R_OVF_RATE1*/      0x1e, 
/*R_OVF_RATE2*/      0x1f, 

/*R_GAIN_SRC1*/      0x20, 
/*R_GAIN_SRC2*/      0x21,
/*R_INC_DEROT1*/     0x22,
/*R_INC_DEROT2*/     0x23,
/*R_FREESTFE_1*/     0x26,

/*R_SYR_THR*/        0x27,
/*R_INR*/            0x28, 
/*R_EN_PROCESS*/     0x29, 
/*R_SDI_SMOOTHER*/   0x2A, 
/*R_FE_LOOP_OPEN*/   0x2B, 

/*R_EPQ*/            0x31, 
/*R_EPQ2*/           0x32,
/*R_COR_CTL*/        0x80,
/*R_COR_STAT*/       0x81,
/*R_COR_INTEN*/      0x82,

/*R_COR_INTSTAT*/    0x83,
/*R_COR_MODEGUARD*/  0x84,
/*R_AGC_CTL*/        0x85,
/*R_AGC_MANUAL1*/    0x86,
/*R_AGC_MANUAL2*/    0x87,

/*R_AGC_TARGET*/     0x88,
/*R_AGC_GAIN1*/      0x89,
/*R_AGC_GAIN2*/      0x8a,
/*R_ITB_CTL*/        0x8b,
/*R_ITB_FREQ1*/      0x8c,

/*R_ITB_FREQ2*/      0x8d,
/*R_CAS_CTL*/        0x8e,
/*R_CAS_FREQ*/       0x8f,
/*R_CAS_DAGCGAIN*/   0x90,
/*R_SYR_CTL*/        0x91,

/*R_SYR_STAT*/       0x92,
/*R_SYR_NC01*/       0x93,
/*R_SYR_NC02*/       0x94,
/*R_SYR_OFFSET1*/    0x95,
/*R_SYR_OFFSET2*/    0x96,

/*R_FFT_CTL*/        0x97,
/*R_SCR_CTL*/        0x98,
/*R_PPM_CTL1*/       0x99,
/*R_TRL_CTL*/        0x9a,
/*R_TRL_NOMRATE1*/   0x9b,

/*R_TRL_NOMRATE2*/   0x9c,
/*R_TRL_TIME1*/      0x9d,
/*R_TRL_TIME2*/      0x9e,
/*R_CRL_CTL*/        0x9f,
/*R_CRL_FREQ1*/      0xa0,

/*R_CRL_FREQ2*/      0xa1,
/*R_CRL_FREQ3*/      0xa2,
/*R_CHC_CTL1*/       0xa3,
/*R_CHC_SNR*/        0xa4,
/*R_BDI_CTL*/        0xa5,

/*R_DMP_CTL*/        0xa6,
/*R_TPS_RCVD1*/      0xa7,
/*R_TPS_RCVD2*/      0xa8,
/*R_TPS_RCVD3*/      0xa9,
/*R_TPS_RCVD4*/      0xaa,

/*R_TPS_CELLID*/     0xab,
/*R_TPS_FREE2*/      0xac,
/*R_TPS_SET1*/       0xad,
/*R_TPS_SET2*/       0xae,
/*R_TPS_SET3*/       0xaf,

/*R_TPS_CTL*/        0xb0,
/*R_CTL_FFTOSNUM*/   0xb1,
/*R_CAR_DISP_SEL*/   0xb2,
/*R_MSC_REV*/        0xb3,
/*R_PIR_CTL*/        0xb4,

/*R_SNR_CARRIER1*/   0xb5,
/*R_SNR_CARRIER2*/   0xb6,
/*R_PPM_CPAMP*/      0xb7,
/*R_TSM_AP0*/        0xb8,
/*R_TSM_AP1*/        0xb9,

/*R_TSM_AP2*/        0xba,
/*R_TSM_AP3*/        0xbb,
/*R_TSM_AP4*/        0xbc,
/*R_TSM_AP5*/        0xbd,
/*R_TSM_AP6*/        0xbe,

/*R_TSM_AP7*/        0xbf,
/*R_CONSTMODE*/      0xcb,
/*R_CONSTCARR1*/     0xcc,
/*R_CONSTCARR2*/     0xcd,
/*R_ICONSTEL*/       0xce,

/*R_QCONSTEL*/       0xcf,
/*R_AGC1RF*/         0xD4,
/*R_EN_RF_AGC1*/     0xD5,
/*R_FECM*/           0x40,
/*R_VTH0*/           0x41,

/*R_VTH1*/           0x42,
/*R_VTH2*/           0x43,
/*R_VTH3*/           0x44,
/*R_VTH4*/           0x45,
/*R_VTH5*/           0x46,

/*R_FREEVIT*/        0x47,
/*R_VITPROG*/        0x49,
/*R_PR*/             0x4a,
/*R_VSEARCH*/        0x4b,
/*R_RS*/             0x4c,

/*R_RSOUT*/          0x4d,
/*R_ERRCTRL1*/       0x4e,
/*R_ERRCNTM1*/       0x4f,
/*R_ERRCNTL1*/       0x50,
/*R_ERRCTRL2*/       0x51,

/*R_ERRCNTM2*/       0x52,
/*R_ERRCNTL2*/       0x53,
/*R_ERRCTRL3*/       0x56,
/*R_ERRCNTM3*/       0x57,
/*R_ERRCNTL3*/       0x58,

/*R_DILSTK1*/        0x59,
/*R_DILSTK0*/        0x5A,
/*R_DILBWSTK1*/      0x5B,
/*R_DILBWST0*/       0x5C,
/*R_LNBRX*/          0x5D,

/*R_RSTC*/           0x5E,
/*R_VIT_BIST*/       0x5F,
/*R_FREEDRS*/        0x54,
/*R_VERROR*/         0x55,
/*R_TSTRES*/         0xc0,

/*R_ANACTRL*/        0xc1,
/*R_TSTBUS*/         0xc2,
/*R_TSTCK*/          0xc3,
/*R_TSTI2C*/         0xc4,
/*R_TSTRAM1*/        0xc5,

/*R_TSTRATE*/        0xc6,
/*R_SELOUT*/         0xc7,
/*R_FORCEIN*/        0xc8,
/*R_TSTFIFO*/        0xc9,
/*R_TSTRS*/          0xca,

/*R_TSTBISTRES0*/    0xd0,
/*R_TSTBISTRES1*/    0xd1,
/*R_TSTBISTRES2*/    0xd2,
/*R_TSTBISTRES3*/    0xd3

	        };/** end of array**/
 
 
/*******Never change the order of this array elements as it is accordance with******
******360_init.c settings of register.*********************/
/****** Register settings for DemodSTV0360*************/
#ifdef STTUNER_TERR_TMM_6MHZ
U8 Def360Val[STV360_NBREGS]={
/*R_ID*/             0x21, 
/*R_I2CRPT*/         0x27, 
/*R_TOPCTRL*/        0x2 ,
/*R_IOCFG0*/         0x0, 
/*R_DAC0R*/          0x00, 

/*R_IOCFG1*/         0x00, 
/*R_DAC1R*/          0x00, 
/*R_IOCFG2*/         0x70, 
/*R_PWMFR*/          0x00,
/*R_STATUS*/         0xf9,

/*R_AUX_CLK*/        0x1c,
/*R_FREESYS1*/       0x00,
/*R_FREESYS2*/       0x00,
/*R_FREESYS3*/       0x00,
/*R_AGC2MAX*/        0xff, 

/*R_AGC2MIN*/        0x0, 
/*R_AGC1MAX*/        0x0, 
/*R_AGC1MIN*/        0x0, 
/*R_AGCR*/           0x0, 
/*R_AGC2TH*/         0x0, 

/*R_AGC12C3*/        0x00,
/*R_AGCCTRL1*/       0x85, 
/*R_AGCCTRL2*/       0x7,
/*R_AGC1VAL1*/       0xf,
/*R_AGC1VAL2*/       0x0,

/*R_AGC2VAL1*/       0xfc, 
/*R_AGC2VAL2*/       0x07, 
/*R_AGC2PGA*/        0x00, 
/*R_OVF_RATE1*/      0x00, 
/*R_OVF_RATE2*/      0x00, 

/*R_GAIN_SRC1*/      0xca, 
/*R_GAIN_SRC2*/      0x8c,
/*R_INC_DEROT1*/     0x54,
/*R_INC_DEROT2*/     0xbb,
/*R_FREESTFE_1*/     0x03,

/*R_SYR_THR*/        0x1c,
/*R_INR*/            0xff, 
/*R_EN_PROCESS*/     0x1, 
/*R_SDI_SMOOTHER*/   0xff, 
/*R_FE_LOOP_OPEN*/   0x00, 

/*R_EPQ*/            0x12, 
/*R_EPQ2*/           0xd,
/*R_COR_CTL*/        0x20,
/*R_COR_STAT*/       0xf6,
/*R_COR_INTEN*/      0x00,

/*R_COR_INTSTAT*/    0x3f,
/*R_COR_MODEGUARD*/  0x3,
/*R_AGC_CTL*/        0x18,
/*R_AGC_MANUAL1*/    0x00,
/*R_AGC_MANUAL2*/    0x00,

/*R_AGC_TARGET*/     0x20,
/*R_AGC_GAIN1*/      0xf9,
/*R_AGC_GAIN2*/      0x1f,
/*R_ITB_CTL*/        0x00,
/*R_ITB_FREQ1*/      0x00,

/*R_ITB_FREQ2*/      0x00,
/*R_CAS_CTL*/        0x85,
/*R_CAS_FREQ*/       0xB3,
/*R_CAS_DAGCGAIN*/   0xf,
/*R_SYR_CTL*/        0x00,

/*R_SYR_STAT*/       0x17,
/*R_SYR_NC01*/       0x00,
/*R_SYR_NC02*/       0x00,
/*R_SYR_OFFSET1*/    0x01,
/*R_SYR_OFFSET2*/    0x00,

/*R_FFT_CTL*/        0x00,
/*R_SCR_CTL*/        0x00,
/*R_PPM_CTL1*/       0x30,
/*R_TRL_CTL*/        0x14,
/*R_TRL_NOMRATE1*/   0x4,

/*R_TRL_NOMRATE2*/   0x41,
/*R_TRL_TIME1*/      0x7c,
/*R_TRL_TIME2*/      0xfc,
/*R_CRL_CTL*/        0x4F,
/*R_CRL_FREQ1*/      0xfe,

/*R_CRL_FREQ2*/      0xb4,
/*R_CRL_FREQ3*/      0x2,
/*R_CHC_CTL1*/       0xb1,
/*R_CHC_SNR*/        0xdb,
/*R_BDI_CTL*/        0x00,

/*R_DMP_CTL*/        0x00,
/*R_TPS_RCVD1*/      0x33,
/*R_TPS_RCVD2*/      0x2,
/*R_TPS_RCVD3*/      0x01,
/*R_TPS_RCVD4*/      0x31,

/*R_TPS_CELLID*/     0x00,
/*R_TPS_FREE2*/      0x00,
/*R_TPS_SET1*/       0x01,
/*R_TPS_SET2*/       0x02,
/*R_TPS_SET3*/       0x4,

/*R_TPS_CTL*/        0x00,
/*R_CTL_FFTOSNUM*/   0x2b,
/*R_CAR_DISP_SEL*/   0x0C,
/*R_MSC_REV*/        0x0A,
/*R_PIR_CTL*/        0x00,

/*R_SNR_CARRIER1*/   0xA8,
/*R_SNR_CARRIER2*/   0x86,
/*R_PPM_CPAMP*/      0xc1,
/*R_TSM_AP0*/        0x00,
/*R_TSM_AP1*/        0x00,

/*R_TSM_AP2*/        0x00,
/*R_TSM_AP3*/        0x00,
/*R_TSM_AP4*/        0x00,
/*R_TSM_AP5*/        0x00,
/*R_TSM_AP6*/        0x00,

/*R_TSM_AP7*/        0x00,
/*R_CONSTMODE*/      0x02,
/*R_CONSTCARR1*/     0xD2,
/*R_CONSTCARR2*/     0x04,
/*R_ICONSTEL*/       0x17,

/*R_QCONSTEL*/       0x18,
/*R_AGC1RF*/         0xff,
/*R_EN_RF_AGC1*/     0x83,
/*R_FECM*/           0x00,
/*R_VTH0*/           0x1E,

/*R_VTH1*/           0x1e,
/*R_VTH2*/           0x0F,
/*R_VTH3*/           0x09,
/*R_VTH4*/           0x00,
/*R_VTH5*/           0x05,

/*R_FREEVIT*/        0x00,
/*R_VITPROG*/        0x92,
/*R_PR*/             0x2,
/*R_VSEARCH*/        0xb0,
/*R_RS*/             0xbc,

/*R_RSOUT*/          0x15,
/*R_ERRCTRL1*/       0x12,
/*R_ERRCNTM1*/       0x00,
/*R_ERRCNTL1*/       0x00,
/*R_ERRCTRL2*/       0xb2,

/*R_ERRCNTM2*/       0x00,
/*R_ERRCNTL2*/       0x00,
/*R_ERRCTRL3*/       0x12,
/*R_ERRCNTM3*/       0x00,
/*R_ERRCNTL3*/       0x00,

/*R_DILSTK1*/        0x00,
/*R_DILSTK0*/        0x03,
/*R_DILBWSTK1*/      0x00,
/*R_DILBWST0*/       0x03,
/*R_LNBRX*/          0x80,

/*R_RSTC*/           0xB0,
/*R_VIT_BIST*/       0x07,
/*R_FREEDRS*/        0x00,
/*R_VERROR*/         0x00,
/*R_TSTRES*/         0x00,

/*R_ANACTRL*/        0x00,
/*R_TSTBUS*/         0x00,
/*R_TSTCK*/          0x00,
/*R_TSTI2C*/         0x00,
/*R_TSTRAM1*/        0x00,

/*R_TSTRATE*/        0x00,
/*R_SELOUT*/         0x00,
/*R_FORCEIN*/        0x00,
/*R_TSTFIFO*/        0x00,
/*R_TSTRS*/          0x00,

/*R_TSTBISTRES0*/    0x00,
/*R_TSTBISTRES1*/    0x00,
/*R_TSTBISTRES2*/    0x00,
/*R_TSTBISTRES3*/    0x00

	        };/** end of array TMM6MHZ**/
#elif defined (STTUNER_TERR_TMM_7MHZ)
 U8 Def360Val[STV360_NBREGS]={