📄 tcxmaster.lst
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C51 COMPILER V7.02b TCXMASTER 04/24/2005 22:31:53 PAGE 1
C51 COMPILER V7.02b, COMPILATION OF MODULE TCXMASTER
OBJECT MODULE PLACED IN tcxmaster.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE tcxmaster.c OPTIMIZE(6,SPEED) DEBUG
- OBJECTEXTEND CODE SYMBOLS PAGEWIDTH(80)
stmt level source
1 #pragma NOIV // Do not generate interrupt vecto
-rs
2 //----------------------------------------------------------------
--------------
3 // File: tcxmaster.c
4 // Contents: Hooks required to implement USB peripheral functio
-n.
5 // Code written for FX2 56-pin REVD...
6 // This firmware is used to test the FX ext. master C
-Y3682 DK
7 // Copyright (c) 2001 Cypress Semiconductor All rights reserved
8 //----------------------------------------------------------------
--------------
9 #include "fx2.h"
10 #include "fx2regs.h"
11 #include "fx2sdly.h" // SYNCDELAY macro
12
13 extern BOOL GotSUD; // Received setup data flag
14 extern BOOL Sleep;
15 extern BOOL Rwuen;
16 extern BOOL Selfpwr;
17
18 BYTE Configuration; // Current configuration
19 BYTE AlternateSetting; // Alternate settings
20
21 // EZUSB FX2 PORTA = slave fifo enable(s), when IFCFG[1:0]=11
22 sbit PA0 = IOA ^ 0; // alt. func., INT0#
23 sbit PA1 = IOA ^ 1; // alt. func., INT1#
24 // sbit PA2 = IOA ^ 2; // is SLOE
25 sbit PA3 = IOA ^ 3; // alt. func., WU2
26 // sbit PA4 = IOA ^ 4; // is FIFOADR0
27 // sbit PA5 = IOA ^ 5; // is FIFOADR1
28 // sbit PA6 = IOA ^ 6; // is PKTEND
29 // sbit PA7 = IOA ^ 7; // is FLAGD
30
31 // EZUSB FX2 PORTC i/o... port NA for 56-pin FX2
32 // sbit PC0 = IOC ^ 0;
33 // sbit PC1 = IOC ^ 1;
34 // sbit PC2 = IOC ^ 2;
35 // sbit PC3 = IOC ^ 3;
36 // sbit PC4 = IOC ^ 4;
37 // sbit PC5 = IOC ^ 5;
38 // sbit PC6 = IOC ^ 6;
39 // sbit PC7 = IOC ^ 7;
40
41 // EZUSB FX2 PORTB = FD[7:0], when IFCFG[1:0]=11
42 // sbit PB0 = IOB ^ 0;
43 // sbit PB1 = IOB ^ 1;
44 // sbit PB2 = IOB ^ 2;
45 // sbit PB3 = IOB ^ 3;
46 // sbit PB4 = IOB ^ 4;
47 // sbit PB5 = IOB ^ 5;
48 // sbit PB6 = IOB ^ 6;
49 // sbit PB7 = IOB ^ 7;
C51 COMPILER V7.02b TCXMASTER 04/24/2005 22:31:53 PAGE 2
50
51 // EZUSB FX2 PORTD = FD[15:8], when IFCFG[1:0]=11 and WORDWIDE=1
52 sbit PD0 = IOD ^ 0;
53 sbit PD1 = IOD ^ 1;
54 sbit PD2 = IOD ^ 2;
55 sbit PD3 = IOD ^ 3;
56 sbit PD4 = IOD ^ 4;
57 sbit PD5 = IOD ^ 5;
58 sbit PD6 = IOD ^ 6;
59 sbit PD7 = IOD ^ 7;
60
61 // EZUSB FX2 PORTE is not bit-addressable...
62
63 //----------------------------------------------------------------
--------------
64 // Task Dispatcher hooks
65 // The following hooks are called by the task dispatcher.
66 //----------------------------------------------------------------
--------------
67 void TD_Init( void )
68 { // Called once at startup
69 1 OEA=0xff;
70 1 IOA=0x00;
71 1
72 1 CPUCS = 0x10; // CLKSPD[1:0]=10, for 48MHz opera
-tion
73 1
74 1 IFCONFIG = 0xCB;
75 1 // IFCLKSRC=1 , FIFOs executes on internal clk source
76 1 // xMHz=1 , 48MHz internal clk rate
77 1 // IFCLKOE=0 , Don't drive IFCLK pin signal at 48MHz
78 1 // IFCLKPOL=0 , Don't invert IFCLK pin signal from internal cl
-k
79 1 // ASYNC=1 , master samples asynchronous
80 1 // GSTATE=0 , Don't drive GPIF states out on PORTE[2:0], deb
-ug WF
81 1 // IFCFG[1:0]=11, FX2 in slave FIFO mode
82 1
83 1
84 1 // Registers which require a synchronization delay, see section
-15.14
85 1 // FIFORESET FIFOPINPOLAR
86 1 // INPKTEND OUTPKTEND
87 1 // EPxBCH:L REVCTL
88 1 // GPIFTCB3 GPIFTCB2
89 1 // GPIFTCB1 GPIFTCB0
90 1 // EPxFIFOPFH:L EPxAUTOINLENH:L
91 1 // EPxFIFOCFG EPxGPIFFLGSEL
92 1 // PINFLAGSxx EPxFIFOIRQ
93 1 // EPxFIFOIE GPIFIRQ
94 1 // GPIFIE GPIFADRH:L
95 1 // UDMACRCH:L EPxGPIFTRIG
96 1 // GPIFTRIG
97 1
98 1 // Note: The pre-REVE EPxGPIFTCH/L register are affected, as wel
-l...
99 1 // ...these have been replaced by GPIFTC[B3:B0] registers
100 1
101 1 SYNCDELAY;
102 1 FIFORESET = 0x80; // activate NAK-ALL to avoid race
-conditions
103 1 SYNCDELAY; // see TRM section 15.14
C51 COMPILER V7.02b TCXMASTER 04/24/2005 22:31:53 PAGE 3
104 1 FIFORESET = 0x02; // reset, FIFO 2
105 1 SYNCDELAY; //
106 1 FIFORESET = 0x04; // reset, FIFO 4
107 1 SYNCDELAY; //
108 1 FIFORESET = 0x06; // reset, FIFO 6
109 1 SYNCDELAY; //
110 1 FIFORESET = 0x08; // reset, FIFO 8
111 1 SYNCDELAY; //
112 1 FIFORESET = 0x00; // deactivate NAK-ALL
113 1
114 1 SYNCDELAY;
115 1 PINFLAGSAB = 0x98; // FLAGA - fixed EP2EF, FLAGB - fi
-xed EP4EF
116 1 SYNCDELAY;
117 1 PINFLAGSCD = 0xFE; // FLAGC - fixed EP6FF, FLAGD - fi
-xed EP8FF
118 1 SYNCDELAY;
119 1 PORTACFG |= 0x80; // FLAGD, set alt. func. of PA7 pi
-n
120 1 SYNCDELAY;
121 1 FIFOPINPOLAR = 0x00; // all signals active low
122 1 SYNCDELAY;
123 1
124 1 // handle the case where we were already in AUTO mode...
125 1 EP2FIFOCFG = 0x01; // AUTOOUT=0, WORDWIDE=0
126 1 SYNCDELAY;
127 1
128 1 EP2FIFOCFG = 0x11; // AUTOOUT=1, WORDWIDE=0
129 1 SYNCDELAY;
130 1
131 1 // handle the case where we were already in AUTO mode...
132 1 EP4FIFOCFG = 0x00; // AUTOOUT=0, WORDWIDE=0
133 1 SYNCDELAY;
134 1
135 1 EP4FIFOCFG = 0x10; // AUTOOUT=1, WORDWIDE=0
136 1 SYNCDELAY;
137 1
138 1 EP6FIFOCFG = 0x0C; // AUTOIN=1, ZEROLENIN=1, WORDWIDE
-=0
139 1 SYNCDELAY;
140 1 EP8FIFOCFG = 0x0C; // AUTOIN=1, ZEROLENIN=1, WORDWIDE
-=0
141 1 }
142
143 void TD_Poll( void )
144 { // Called repeatedly while the device is idle
145 1
146 1 // ...nothing to do... slave fifo's are in AUTO mode...
147 1
148 1 }
149
150 BOOL TD_Suspend( void )
151 { // Called before the device goes into suspend mode
152 1 return( TRUE );
153 1 }
154
155 BOOL TD_Resume( void )
156 { // Called after the device resumes
157 1 return( TRUE );
158 1 }
159
160 //----------------------------------------------------------------
C51 COMPILER V7.02b TCXMASTER 04/24/2005 22:31:53 PAGE 4
--------------
161 // Device Request hooks
162 // The following hooks are called by the end point 0 device requ
-est parser.
163 //----------------------------------------------------------------
--------------
164 BOOL DR_GetDescriptor( void )
165 {
166 1 return( TRUE );
167 1 }
168
169 BOOL DR_SetConfiguration( void )
170 { // Called when a Set Configuration command is received
171 1
172 1 if( EZUSB_HIGHSPEED( ) )
173 1 { // ...FX2 in high speed mode
174 2 EP6AUTOINLENH = 0x02;
175 2 SYNCDELAY;
176 2 EP8AUTOINLENH = 0x02; // set core AUTO commit len = 512 byte
-s
177 2 SYNCDELAY;
178 2 EP6AUTOINLENL = 0x00;
179 2 SYNCDELAY;
180 2 EP8AUTOINLENL = 0x00;
181 2 }
182 1 else
183 1 { // ...FX2 in full speed mode
184 2 EP6AUTOINLENH = 0x00;
185 2 SYNCDELAY;
186 2 EP8AUTOINLENH = 0x00; // set core AUTO commit len = 64 bytes
187 2 SYNCDELAY;
188 2 EP6AUTOINLENL = 0x40;
189 2 SYNCDELAY;
190 2 EP8AUTOINLENL = 0x40;
191 2 }
192 1
193 1 Configuration = SETUPDAT[ 2 ];
194 1 return( TRUE ); // Handled by user code
195 1 }
196
197 BOOL DR_GetConfiguration( void )
198 { // Called when a Get Configuration command is received
199 1 EP0BUF[ 0 ] = Configuration;
200 1 EP0BCH = 0;
201 1 EP0BCL = 1;
202 1 return(TRUE); // Handled by user code
203 1 }
204
205 BOOL DR_SetInterface( void )
206 { // Called when a Set Interface command is received
207 1 AlternateSetting = SETUPDAT[ 2 ];
208 1 return( TRUE ); // Handled by user code
209 1 }
210
211 BOOL DR_GetInterface( void )
212 { // Called when a Set Interface command is received
213 1 EP0BUF[ 0 ] = AlternateSetting;
214 1 EP0BCH = 0;
215 1 EP0BCL = 1;
216 1 return( TRUE ); // Handled by user code
217 1 }
218
C51 COMPILER V7.02b TCXMASTER 04/24/2005 22:31:53 PAGE 5
219 BOOL DR_GetStatus( void )
220 {
221 1 return( TRUE );
222 1 }
223
224 BOOL DR_ClearFeature( void )
225 {
226 1 return( TRUE );
227 1 }
228
229 BOOL DR_SetFeature( void )
230 {
231 1 return( TRUE );
232 1 }
233
234 BOOL DR_VendorCmnd( void )
235 {
236 1 return( TRUE );
237 1 }
238
239 //----------------------------------------------------------------
--------------
240 // USB Interrupt Handlers
241 // The following functions are called by the USB interrupt jump
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