📄 fw.lst
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-akeup# pin activity.
222 4 EZUSB_Resume(); // If source is the Wakeup# pin, si
-gnal the host to Resume.
223 4 TD_Resume();
224 4 }
225 3 }
226 2 TD_Poll();
227 2 }
228 1 }
229
230 // Device request parser
231 void SetupCommand(void)
232 {
233 1 void *dscr_ptr;
234 1
235 1 switch(SETUPDAT[1])
236 1 {
237 2 case SC_GET_DESCRIPTOR: // *** Get Descript
-or
238 2 if(DR_GetDescriptor())
239 2 switch(SETUPDAT[3])
240 2 {
241 3 case GD_DEVICE: // Device
242 3 SUDPTRH = MSB(pDeviceDscr);
243 3 SUDPTRL = LSB(pDeviceDscr);
244 3 break;
245 3 case GD_DEVICE_QUALIFIER: // Device Qual
-ifier
246 3 SUDPTRH = MSB(pDeviceQualDscr);
247 3 SUDPTRL = LSB(pDeviceQualDscr);
248 3 break;
249 3 case GD_CONFIGURATION: // Configuration
250 3 SUDPTRH = MSB(pConfigDscr);
251 3 SUDPTRL = LSB(pConfigDscr);
252 3 break;
253 3 case GD_OTHER_SPEED_CONFIGURATION: // Other Speed
-Configuration
254 3 SUDPTRH = MSB(pOtherConfigDscr);
255 3 SUDPTRL = LSB(pOtherConfigDscr);
C51 COMPILER V7.02b FW 04/24/2005 22:31:52 PAGE 6
256 3 break;
257 3 case GD_STRING: // String
258 3 if(dscr_ptr = (void *)EZUSB_GetStringDscr(SETUPD
-AT[2]))
259 3 {
260 4 SUDPTRH = MSB(dscr_ptr);
261 4 SUDPTRL = LSB(dscr_ptr);
262 4 }
263 3 else
264 3 EZUSB_STALL_EP0(); // Stall End Point 0
265 3 break;
266 3 default: // Invalid request
267 3 EZUSB_STALL_EP0(); // Stall End Point 0
268 3 }
269 2 break;
270 2 case SC_GET_INTERFACE: // *** Get Interface
271 2 DR_GetInterface();
272 2 break;
273 2 case SC_SET_INTERFACE: // *** Set Interface
274 2 DR_SetInterface();
275 2 break;
276 2 case SC_SET_CONFIGURATION: // *** Set Configur
-ation
277 2 DR_SetConfiguration();
278 2 break;
279 2 case SC_GET_CONFIGURATION: // *** Get Configur
-ation
280 2 DR_GetConfiguration();
281 2 break;
282 2 case SC_GET_STATUS: // *** Get Status
283 2 if(DR_GetStatus())
284 2 switch(SETUPDAT[0])
285 2 {
286 3 case GS_DEVICE: // Device
287 3 EP0BUF[0] = ((BYTE)Rwuen << 1) | (BYTE)Selfpwr;
288 3 EP0BUF[1] = 0;
289 3 EP0BCH = 0;
290 3 EP0BCL = 2;
291 3 break;
292 3 case GS_INTERFACE: // Interface
293 3 EP0BUF[0] = 0;
294 3 EP0BUF[1] = 0;
295 3 EP0BCH = 0;
296 3 EP0BCL = 2;
297 3 break;
298 3 case GS_ENDPOINT: // End Point
299 3 EP0BUF[0] = *(BYTE xdata *) epcs(SETUPDAT[4]) &
-bmEPSTALL;
300 3 EP0BUF[1] = 0;
301 3 EP0BCH = 0;
302 3 EP0BCL = 2;
303 3 break;
304 3 default: // Invalid Command
305 3 EZUSB_STALL_EP0(); // Stall End Point 0
306 3 }
307 2 break;
308 2 case SC_CLEAR_FEATURE: // *** Clear Feature
309 2 if(DR_ClearFeature())
310 2 switch(SETUPDAT[0])
311 2 {
312 3 case FT_DEVICE: // Device
313 3 if(SETUPDAT[2] == 1)
C51 COMPILER V7.02b FW 04/24/2005 22:31:52 PAGE 7
314 3 Rwuen = FALSE; // Disable Remote Wakeup
315 3 else
316 3 EZUSB_STALL_EP0(); // Stall End Point 0
317 3 break;
318 3 case FT_ENDPOINT: // End Point
319 3 if(SETUPDAT[2] == 0)
320 3 {
321 4 *(BYTE xdata *) epcs(SETUPDAT[4]) &= ~bmEPSTA
-LL;
322 4 EZUSB_RESET_DATA_TOGGLE( SETUPDAT[4] );
323 4 }
324 3 else
325 3 EZUSB_STALL_EP0(); // Stall End Point 0
326 3 break;
327 3 }
328 2 break;
329 2 case SC_SET_FEATURE: // *** Set Feature
330 2 if(DR_SetFeature())
331 2 switch(SETUPDAT[0])
332 2 {
333 3 case FT_DEVICE: // Device
334 3 if(SETUPDAT[2] == 1)
335 3 Rwuen = TRUE; // Enable Remote Wakeup
336 3 else if(SETUPDAT[2] == 2)
337 3 // Set Feature Test Mode. The core handles t
-his request. However, it is
338 3 // necessary for the firmware to complete the
- handshake phase of the
339 3 // control transfer before the chip will ente
-r test mode. It is also
340 3 // necessary for FX2 to be physically disconn
-ected (D+ and D-)
341 3 // from the host before it will enter test mo
-de.
342 3 break;
343 3 else
344 3 EZUSB_STALL_EP0(); // Stall End Point 0
345 3 break;
346 3 case FT_ENDPOINT: // End Point
347 3 *(BYTE xdata *) epcs(SETUPDAT[4]) |= bmEPSTALL;
348 3 break;
349 3 }
350 2 break;
351 2 default: // *** Invalid Command
352 2 if(DR_VendorCmnd())
353 2 EZUSB_STALL_EP0(); // Stall End Point 0
354 2 }
355 1
356 1 // Acknowledge handshake phase of device request
357 1 EP0CS |= bmHSNAK;
358 1 }
359
360 // Wake-up interrupt handler
361 void resume_isr(void) interrupt WKUP_VECT
362 {
363 1 EZUSB_CLEAR_RSMIRQ();
364 1 }
365
366
C51 COMPILER V7.02b FW 04/24/2005 22:31:52 PAGE 8
ASSEMBLY LISTING OF GENERATED OBJECT CODE
; FUNCTION main (BEGIN)
; SOURCE LINE # 106
; SOURCE LINE # 107
; SOURCE LINE # 111
0000 E4 CLR A
0001 F500 R MOV j+03H,A
0003 F500 R MOV j+02H,A
0005 F500 R MOV j+01H,A
0007 F500 R MOV j,A
; SOURCE LINE # 116
0009 C200 R CLR Sleep
; SOURCE LINE # 117
000B C200 R CLR Rwuen
; SOURCE LINE # 118
000D C200 R CLR Selfpwr
; SOURCE LINE # 119
000F C200 R CLR GotSUD
; SOURCE LINE # 122
0011 120000 E LCALL TD_Init
; SOURCE LINE # 130
0014 7E00 E MOV R6,#HIGH DeviceDscr
0016 7F00 E MOV R7,#LOW DeviceDscr
0018 8E00 R MOV pDeviceDscr,R6
001A 8F00 R MOV pDeviceDscr+01H,R7
; SOURCE LINE # 131
001C 750000 E MOV pDeviceQualDscr,#HIGH DeviceQualDscr
001F 750000 E MOV pDeviceQualDscr+01H,#LOW DeviceQualDscr
; SOURCE LINE # 132
0022 750000 E MOV pHighSpeedConfigDscr,#HIGH HighSpeedConfigDscr
0025 750000 E MOV pHighSpeedConfigDscr+01H,#LOW HighSpeedConfigDscr
; SOURCE LINE # 133
0028 750000 E MOV pFullSpeedConfigDscr,#HIGH FullSpeedConfigDscr
002B 750000 E MOV pFullSpeedConfigDscr+01H,#LOW FullSpeedConfigDscr
; SOURCE LINE # 134
002E 750000 E MOV pStringDscr,#HIGH StringDscr
0031 750000 E MOV pStringDscr+01H,#LOW StringDscr
; SOURCE LINE # 136
0034 900000 E MOV DPTR,#USBCS
0037 E0 MOVX A,@DPTR
0038 30E70E JNB ACC.7,?C0001
; SOURCE LINE # 137
; SOURCE LINE # 138
003B 850000 R MOV pConfigDscr,pHighSpeedConfigDscr
003E 850000 R MOV pConfigDscr+01H,pHighSpeedConfigDscr+01H
; SOURCE LINE # 139
0041 850000 R MOV pOtherConfigDscr,pFullSpeedConfigDscr
0044 850000 R MOV pOtherConfigDscr+01H,pFullSpeedConfigDscr+01H
; SOURCE LINE # 140
0047 800C SJMP ?C0002
0049 ?C0001:
; SOURCE LINE # 142
; SOURCE LINE # 143
0049 850000 R MOV pConfigDscr,pFullSpeedConfigDscr
004C 850000 R MOV pConfigDscr+01H,pFullSpeedConfigDscr+01H
; SOURCE LINE # 144
004F 850000 R MOV pOtherConfigDscr,pHighSpeedConfigDscr
0052 850000 R MOV pOtherConfigDscr+01H,pHighSpeedConfigDscr+01H
; SOURCE LINE # 145
0055 ?C0002:
C51 COMPILER V7.02b FW 04/24/2005 22:31:52 PAGE 9
; SOURCE LINE # 147
0055 EE MOV A,R6
0056 54E0 ANL A,#0E0H
0058 7003 JNZ $ + 5H
005A 020000 R LJMP ?C0003
; SOURCE LINE # 148
; SOURCE LINE # 149
005D 750000 R MOV IntDescrAddr,#00H
0060 750080 R MOV IntDescrAddr+01H,#080H
; SOURCE LINE # 150
0063 7E00 E MOV R6,#HIGH DeviceDscr
0065 7F00 E MOV R7,#LOW DeviceDscr
0067 8E00 R MOV ExtDescrAddr,R6
0069 8F00 R MOV ExtDescrAddr+01H,R7
; SOURCE LINE # 151
006B C3 CLR C
006C 7400 E MOV A,#LOW UserDscr
006E 9F SUBB A,R7
006F FF MOV R7,A
0070 7400 E MOV A,#HIGH UserDscr
0072 9E SUBB A,R6
0073 CF XCH A,R7
0074 2402 ADD A,#02H
0076 CF XCH A,R7
0077 3400 ADDC A,#00H
0079 FE MOV R6,A
007A E4 CLR A
007B 8F00 R MOV DevDescrLen+03H,R7
007D 8E00 R MOV DevDescrLen+02H,R6
007F F500 R MOV DevDescrLen+01H,A
0081 F500 R MOV DevDescrLen,A
; SOURCE LINE # 152
0083 F500 R MOV i+03H,A
0085 F500 R MOV i+02H,A
0087 F500 R MOV i+01H,A
0089 F500 R MOV i,A
008B ?C0004:
008B AF00 R MOV R7,DevDescrLen+03H
008D AE00 R MOV R6,DevDescrLen+02H
008F AD00 R MOV R5,DevDescrLen+01H
0091 AC00 R MOV R4,DevDescrLen
0093 AB00 R MOV R3,i+03H
0095 AA00 R MOV R2,i+02H
0097 A900 R MOV R1,i+01H
0099 A800 R MOV R0,i
009B C3 CLR C
009C 120000 E LCALL ?C?ULCMP
009F 502A JNC ?C0005
; SOURCE LINE # 153
00A1 E500 R MOV A,IntDescrAddr+01H
00A3 2500 R ADD A,i+03H
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