ltcrt.c

此代码为WCE5.0下显示器的源代码

    }
    else
    {
        // set CRT_ON bit to 1 which turns on the CRT display.
        ulLCDGenCtrlData |= LCD_GEN_CTRL__CRT_ON;
    }

    // Write out LCD GEN CTRL data to LCD data register.
    MMWRITEULONG(hGDORageCRT->lpMMR, LCD_DATA, ulLCDGenCtrlData);
}

/******************************Public*Routine******************************\
* VOID CRTSetDisplayOn(HGDO hGDO, ULONG ulcontroller)
*
* CRTSetDisplayOn turns on a display on a specific graphics controller.
*
\**************************************************************************/
VOID FAR
CRTSetDisplayOn(
    HGDO hGDO,
    ULONG ulController
    )
{
    ULONG               ulLCDIndex;
    ULONG               ulLCDGenCtrlData;
    ULONG               ulDacCntlData; 
    //ULONG             ulScratch2_data;
    LPGDO_RAGE_CRT      hGDORageCRT;

    hGDORageCRT = (LPGDO_RAGE_CRT)hGDO;

    DALDEBUG((DALDBG_NORMAL, "ATIRAGE.SYS! GDO-CRT: CRTSetDisplayOn - Entry"));

    // No LCD data register for RAGE PRO family
    if(hGDORageCRT->ulChipFamily == FAMILY_GTC) // EPR# 042986 Task# 5994
    {
        // EPR#51282, Task#8039
        ulDacCntlData = MMREADULONG(hGDORageCRT->lpMMR, DAC_CNTL);
        ulDacCntlData &= (~DAC_CNTL__DAC_PDWN);
        MMWRITEULONG(hGDORageCRT->lpMMR, DAC_CNTL, ulDacCntlData);
        return;
    }

    // Moved to RageProUpdateBIOSDisplayInfo function in GCO

    if((hGDORageCRT->ulChipFamily == FAMILY_RAGE_MOBILITY) ||
       (hGDORageCRT->ulChipFamily == FAMILY_LT_PRO))
    {
        // Turn on CRT
        // Clear the bit before we set the new information
        DDLRegisterAND(hGDORageCRT->hDDL, (ULONG)SCRATCH_REG2, (ULONG)(~SCRATCH_REG2__REQ_CRT));
        DDLRegisterAND(hGDORageCRT->hDDL, (ULONG)SCRATCH_REG3, (ULONG)(~SCRATCH_REG3__CRT_ACTIVE));

        // Set CRT REQ bit in scratch register 2 if CRT is attached
        // Also update the controller bit to indicate to which it belongs.
        if (hGDORageCRT->ulController == PRIMARY_CONTROLLER)
        {
            DDLRegisterAND(hGDORageCRT->hDDL, (ULONG)SCRATCH_REG2, (ULONG)(~SCRATCH_REG2__CRTC_CRT));
            DDLRegisterAND(hGDORageCRT->hDDL, (ULONG)SCRATCH_REG3, (ULONG)(~SCRATCH_REG3__CRTC_CRT_ACTIVE));
        }
        else if(hGDORageCRT->ulController == SECONDARY_CONTROLLER)
        {
            DDLRegisterOR(hGDORageCRT->hDDL, (ULONG)SCRATCH_REG2, (ULONG)SCRATCH_REG2__CRTC_CRT);
            DDLRegisterOR(hGDORageCRT->hDDL, (ULONG)SCRATCH_REG3, (ULONG)SCRATCH_REG3__CRTC_CRT_ACTIVE);
        }

        DDLRegisterOR(hGDORageCRT->hDDL, (ULONG)SCRATCH_REG2, (ULONG)SCRATCH_REG2__REQ_CRT);
        DDLRegisterOR(hGDORageCRT->hDDL, (ULONG)SCRATCH_REG3, (ULONG)SCRATCH_REG3__CRT_ACTIVE);
    }

    // Set LCD_DATA register to index 1( LCD_GEN_CTRL).
    ulLCDIndex = MMREADULONG(hGDORageCRT->lpMMR, LCD_INDEX);
    ulLCDIndex &= (~LCD_INDEX__LCD_REG_INDEX_MASK);
    ulLCDIndex |= LCD_INDEX_lcdGenCtrlReg;
    MMWRITEULONG(hGDORageCRT->lpMMR, LCD_INDEX, ulLCDIndex);

    // Read LCD GEN CTRL data from LCD data register first.
    ulLCDGenCtrlData = MMREADULONG(hGDORageCRT->lpMMR, LCD_DATA);

    // set CRT_ON bit to 1 which turns on the CRT display.
    ulLCDGenCtrlData |= LCD_GEN_CTRL__CRT_ON;

    // Write out LCD GEN CTRL data to LCD data register.
    MMWRITEULONG(hGDORageCRT->lpMMR, LCD_DATA, ulLCDGenCtrlData);

} // end CRTSetDisplayOn

/******************************Public*Routine******************************\
* VOID CRTSetDisplayOff(HW_DISPAY_OBJECT hGDO, ULONG ulcontroller)
*
* CRTSetDisplayOff turns off a display on a specific graphics controller.
*
\**************************************************************************/
VOID FAR
CRTSetDisplayOff(
    HGDO hGDO,
    ULONG ulController
    )
{
    ULONG               ulLCDIndex;
    ULONG               ulLCDGenCtrlData;
    ULONG               ulDacCntlData; 
    //ULONG               ulScratch2_data;
    ULONG               ulTemp;
    LPGDO_RAGE_CRT      hGDORageCRT;

    hGDORageCRT = (LPGDO_RAGE_CRT)hGDO;

    DALDEBUG((DALDBG_NORMAL, "ATIRAGE.SYS! GDO-CRT: CRTSetDisplayOff - Entry"));

    // Turn off CRT

    // No LCD data register for RAGE PRO family
    if(hGDORageCRT->ulChipFamily == FAMILY_GTC) // EPR# 042986 Task# 5994
    {
        // EPR#51282, Task#8039
        ulDacCntlData = MMREADULONG(hGDORageCRT->lpMMR, DAC_CNTL);
        ulDacCntlData |= DAC_CNTL__DAC_PDWN; 
        MMWRITEULONG(hGDORageCRT->lpMMR, DAC_CNTL, ulDacCntlData);
        return;
    }

    // Moved to RageProUpdateBIOSDisplayInfo function in GCO

    //  Reset CRT REQ bit in scratch register 2 if CRT is not selected
    if((hGDORageCRT->ulChipFamily == FAMILY_RAGE_MOBILITY) ||
       (hGDORageCRT->ulChipFamily == FAMILY_LT_PRO))
    {
        // Reset CRT Request Bits and CRT CRTC Request bits
        DDLRegisterAND(hGDORageCRT->hDDL, (ULONG)SCRATCH_REG2, (ULONG)(~SCRATCH_REG2__REQ_CRT));
        DDLRegisterAND(hGDORageCRT->hDDL, (ULONG)SCRATCH_REG2, (ULONG)(~SCRATCH_REG2__CRTC_CRT));
        // Reset CRT Active Bit and CRT CRTC Active bits
        DDLRegisterAND(hGDORageCRT->hDDL, (ULONG)SCRATCH_REG3, (ULONG)(~SCRATCH_REG3__CRT_ACTIVE));
        DDLRegisterAND(hGDORageCRT->hDDL, (ULONG)SCRATCH_REG3, (ULONG)(~SCRATCH_REG3__CRTC_CRT_ACTIVE));
    }

    // Set LCD_DATA register to index 1( LCD_GEN_CTRL).
    ulLCDIndex = MMREADULONG(hGDORageCRT->lpMMR, LCD_INDEX);
    ulLCDIndex &= (~LCD_INDEX__LCD_REG_INDEX_MASK);
    ulLCDIndex |= LCD_INDEX_lcdGenCtrlReg;
    MMWRITEULONG(hGDORageCRT->lpMMR, LCD_INDEX, ulLCDIndex);

    // Read LCD GEN CTRL data from LCD data register first.
    ulLCDGenCtrlData = MMREADULONG(hGDORageCRT->lpMMR, LCD_DATA);

    // set CRT_ON bit to 0 which turns off the CRT display.
    ulLCDGenCtrlData &= (~LCD_GEN_CTRL__CRT_ON);

    // Write out LCD GEN CTRL data to LCD data register.
    MMWRITEULONG(hGDORageCRT->lpMMR, LCD_DATA, ulLCDGenCtrlData);

    // Since CRT is OFF let us attach the engine to the primary
    // in case BIOS need to access it.
    ulTemp  = MMREADULONG(hGDORageCRT->lpMMR, DAC_CNTL);
    // Attach monitor to primary controller
    ulTemp &= ~DAC_CNTL_Dac1ClkSel;
    // This allows the BIOS to use its detection scheme
    // for CRT even if the CRT is off.
    MMWRITEULONG(hGDORageCRT->lpMMR, DAC_CNTL, ulTemp);

} // end CRTSetDisplayOff

/******************************Public*Routine******************************\
* BOOLEAN CRTIsDisplayPhysicallyConnected(HGDO hGDO)
*
* This routine checks chip type to decide what method will be used to handle
* CRT detection.
*
\**************************************************************************/
BOOL FAR
CRTIsDisplayPhysicallyConnected(
    HGDO hGDO
    )
{
    BOOL bRet = FALSE;
    LPGDO_RAGE_CRT  hGDORageCRT;
    hGDORageCRT = (LPGDO_RAGE_CRT)hGDO;

    if(hGDORageCRT->ulCrtGdoRegFlag & CRT_GDO_REG_FLAG_FORCE_DETECT_TRUE)
    {
        return TRUE;
    }

    switch(hGDORageCRT->ulChipFamily)
    {
    case(FAMILY_LT_PRO):
//      return CRTSoftwareDetection(hGDO);

    case(FAMILY_RAGE_MOBILITY):
    case(FAMILY_RAGE_XL):
    case(FAMILY_RAGE_XC):
        case(FAMILY_GTC):       //[vichan] port by [espiritu]
//      return CRTAutoDetection(hGDO);
//
// Temporarily we use software detection routine for all mobile adapters.
//
        bRet = CRTSoftwareDetection(hGDO);
        break;

    default:
        return FALSE;

    }// end switch

    // If detection has passed we will update BIOS bits to indicate to BIOS
    // the current CRT detection status. This to resolve corruption in full
    // screen DOS box after a hot plug in accelerator mode. [sah] 02/11/99
    if((hGDORageCRT->ulChipFamily == FAMILY_LT_PRO) ||
       (hGDORageCRT->ulChipFamily == FAMILY_RAGE_MOBILITY))
    {
        if(bRet)
        {
            DDLRegisterOR(hGDORageCRT->hDDL, (ULONG)SCRATCH_REG2, (ULONG)SCRATCH_REG2__CRT_COLOR);
        }
        else
        {
            DDLRegisterAND(hGDORageCRT->hDDL, (ULONG)SCRATCH_REG2, (ULONG)(~SCRATCH_REG2__CRT_COLOR));
        }
    }

    return (bRet);

} // End CRTIsDisplayPhysicallyConnected

/******************************Public*Routine******************************\
* BOOL CRTAutoDetection(HGDO hGDO)
*
* This routine enables the hardware monitor detection feature to find out
* if CRT is attached.
*
\**************************************************************************/
BOOL FAR
CRTAutoDetection(
    HGDO hGDO
    )
{
    LPGDO_RAGE_CRT  hGDORageCRT;
    ULONG           ulDACCntlData     = 0;
    ULONG           ulLCDMiscCntlData = 0;
    ULONG           ulLCDIndex        = 0;

    hGDORageCRT = (LPGDO_RAGE_CRT)hGDO;

    // Set LCD_DATA register to index 14( LCD_MISC_CNTL).
    ulLCDIndex = MMREADULONG(hGDORageCRT->lpMMR, LCD_INDEX);
    ulLCDIndex &= (~LCD_INDEX__LCD_REG_INDEX_MASK);
    ulLCDIndex |= LCD_INDEX_LcdMiscCntl;
    MMWRITEULONG(hGDORageCRT->lpMMR, LCD_INDEX, ulLCDIndex);

    //
    // 1. set CRT_DETECTION_ON bit to enable old algorithm.
    // 2. set Monitor_DET_EN bit to enable new algorithm.
    // 3. check CRT_Sense bit to find out if CRT is attached.
    // 4. Reset Monitor_DET_EN bit to disable new algorithm.
    // 5. Reset CRT_DETECTION_ON bit to disable old algorithm.
    //

    // Set CRT_DETECTION_ON Bit in DAC_CNTL register.
    ulDACCntlData  = MMREADULONG(hGDORageCRT->lpMMR, DAC_CNTL);
    MMWRITEULONG(hGDORageCRT->lpMMR, DAC_CNTL, ulDACCntlData
                                              | DAC_CNTL__CRTDetectionOn);

    // Set Monitor_DET_EN bit in LCD_MISC_CNTL register.
    ulLCDMiscCntlData = MMREADULONG(hGDORageCRT->lpMMR, LCD_DATA);
    ulLCDMiscCntlData |= LCD_MISC_CNTL__MONITOR_DET_EN;
    MMWRITEULONG(hGDORageCRT->lpMMR, LCD_DATA, ulLCDMiscCntlData);

    ulDACCntlData  = MMREADULONG(hGDORageCRT->lpMMR, DAC_CNTL);

    // Reset Monitor_DET_EN bit.
    MMWRITEULONG(hGDORageCRT->lpMMR, LCD_DATA, ulLCDMiscCntlData
                                           & (LCD_MISC_CNTL__MONITOR_DET_EN));
    // Reset CRT_DETECTION_ON bit.
    MMWRITEULONG(hGDORageCRT->lpMMR, DAC_CNTL, ulDACCntlData
                                           & (~DAC_CNTL__CRTDetectionOn));

    if( ulDACCntlData & DAC_CNTL__CRTSense )
    {
        DALDEBUG((DALDBG_NORMAL, "ATIRAGE.SYS! GDO-CRT: CRT is physically Connected (hardware)"));
        return TRUE;
    }
    else
    {
        DALDEBUG((DALDBG_NORMAL, "ATIRAGE.SYS! GDO-CRT: CRT is not physically Connected (hardware)"));
        return FALSE;
    }

} // End CRTAutoDetection

/******************************Public*Routine******************************\
* BOOL CRTSoftwareDetection(HGDO hGDO)
*
* CRTSoftwareDetection determines if the display is physically connected
* to the graphics adapter hardware.
*
* Basic algorithm:
* Set up at least one line of overscan (OVR_WID_TOP_BOTTOM Register)
* Set the overscan color register (OVER_CLR) to 0's for a black overscan
* until the current scan line (CRTC_VLINE_DISP_CRNT Register) is in the
* overscan part of the screen.  Change the color of the overscan to a value
* that will give good results.  This value needs to be determined by
* experimentation.  While the current scan line is in the overscan part use
* the DAC compare function to compare voltages on the DAC pins.  If the
* DAC_CMP_OUTPUT bit in the DAC_CNTL register is 0 more often than it is
* 1 than a display is connected and we return TRUE.
*
* This algorthim is believed to be the least "artifacty" way of detecting
* if a CRT is connected.
*
* It is important to note that there is the chance that this algorithm will
* not detect a connected CRT 100% of the time.  However, it is thought to be
* the best known algorthim that produces the least noticable artifacts.
*
\**************************************************************************/
BOOL FAR
CRTSoftwareDetection(
    HGDO hGDO
    )
{
    LPGDO_RAGE_CRT  hGDORageCRT;
    LONG            lMaxLines;
    LONG            lCurrentLine;
    ULONG           ulOverTopBottom;
    ULONG           ulOverClr;
    ULONG           ulDACCntlData;
    ULONG           ulDACCntlTemp;
    LONG            lZeroCount;
    LONG            lOneCount;
    ULONG           ulLCDIndex;
    ULONG           ulLCDIndexData;
    ULONG           ulLCDGenCtrlData;
    ULONG           ulLCDGenCtrlTemp;
    BOOL            bInDACCntlLoop;
    ULONG           ulCRTCGenCntlData;
    ULONG           ulCRTCGenCntlTemp;
    UCHAR           ucSequencerData;
    UCHAR           ucSequencerTemp;

    hGDORageCRT = (LPGDO_RAGE_CRT)hGDO;

    bInDACCntlLoop = FALSE;
    lZeroCount = 0;
    lOneCount = 0;