es1371.h

此代码为WCE5.0下声卡的源代码

#define SRC_TRUNC_N_OFF     0x00
#define SRC_INT_REGS_OFF    0x01
#define SRC_ACCUM_FRAC_OFF  0x02
#define SRC_VFREQ_FRAC_OFF  0x03

/* Sample rate converter bit defines */
#define SRC_IOPOLL_COUNT    0x20000UL
#define SRC_WENABLE         (1UL << 24)
#define SRC_BUSY            (1UL << 23)
#define SRC_DISABLE         (1UL << 22)
#define SRC_DAC0FREEZE      (1UL << 21)
#define SRC_DAC1FREEZE      (1UL << 20)
#define SRC_ADCFREEZE       (1UL << 19)
#define SRC_CTLMASK         0x00780000UL

/* DMA Channel State defines */
#define DMA_STOPPED         0
#define DMA_RUNNING         1
#define DMA_PAUSED          2

/* UART State defines */
#define UART_ENABLE         0x00000001  // is the chip's UART section turned on
#define UART_RX_ENABLE      0x00000002  // does the higher level have MIDI input on
#define UART_TX_ENABLE      0x00000004  // does the higher level have MIDI output on
#define UART_TX_ACTIVE      0x00000008  // is the Tx interrupt on (data in the queue)

/* UART Queue defines */
#define UART_RX_QUEUE_SIZE  0x1000
#define UART_RX_QSIZE_MASK  0x0fff
#define UART_TX_QUEUE_SIZE  0x1000
#define UART_TX_QSIZE_MASK  0x0fff

#define DMADIR_IN       1           // DMA Input Channel
#define DMADIR_OUT      2           // DMA Output Channel

typedef VOID (*DMAINTHANDLER) (PVOID);

typedef struct DMAChannelTag
{
    BOOL  fAllocated;           // is the channel available for allocation?

    ULONG ulDirection;          // combination of DMADIR_IN and DMADIR_OUT
    UCHAR ucIntMask;            // which bit in interrupt register belongs to this channel?
    ULONG ulDMAChannelState;

    // system things
    PVOID pvBufferVirtAddr;
    ULONG ulBufferPhysAddr;      // physical RAM address of the buffer
    ULONG ulBufferSize;          // length of contiguous physical RAM
    ULONG ulAllocatedSize;      // allocated size - might be larger than current buffer size
    ULONG ulInitialSize;         // default pre-allocation sizes

    // internal things
    ULONG ulChannels;            // number of channels (1 or 2)
    ULONG ulSampleSize;          // sample word size (0=8bit 1=16bit)
    ULONG ulSampleRate;          // sample rate in samples/second
    ULONG ulBufferLength;        // size of buffer currently in use
    ULONG ulSamplesPerInt;       // number of samples to play before interrupting
    DMAINTHANDLER pfIntHandler;  // callback function to invoke on DMA interrupts
    PVOID pvIntContext;          // int handler callback context information
    
} DMACHANNEL;


class CES1371
{
public:
	CES1371::CES1371();
    ~CES1371 ();

    // Power Management
    ULONG SetPowerState( ULONG ulState );

    // DMA control
    MMRESULT AllocDMAChannel (ULONG ulDirection, 
                              ULONG ulSize, 
                              PULONG pulChannelIndex);
    BOOL FreeDMAChannel (ULONG ulChannelIndex);
	ULONG	GetNumFreeDMAChannels(ULONG ulDirection);
    void GetDMABuffer(      ULONG ulChannelIndex, 
                              PULONG pulBufferSize,
                              PVOID* ppvVirtAddr);
    
    void InitDMAChannel(      ULONG ulChannelIndex, 
                              DMAINTHANDLER pfHandler,
                              PVOID pvContext);

    void SetDMAChannelFormat( ULONG ulChannelIndex,
                              ULONG ulChannels,
                              ULONG ulSampleSize,
                              ULONG ulSampleRate );
    void SetDMAChannelBuffer( ULONG ulChannelIndex,
                              ULONG ulBufferLength,
                              ULONG ulSamplesPerInt );
    void StartDMAChannel( ULONG ulChannelIndex );
    void StopDMAChannel( ULONG ulChannelIndex );
    void PauseDMAChannel( ULONG ulChannelIndex );
    void SetDMAVolume (ULONG ulChannelIndex, USHORT usVolLeft, USHORT usVolRight);
    ULONG GetDMAPosition( ULONG ulChannelIndex );
    void SetDMAPosition( ULONG ulChannelIndex, ULONG ulPosition );


    // Codec control
    void WriteCodecRegister( UCHAR Reg, USHORT Val);
    USHORT ReadCodecRegister( UCHAR Reg );
    void RMWCodecRegister (UCHAR Reg, USHORT Mask, USHORT Value); // Reg = (Reg & Mask) | Value
    USHORT GetCodecRegisterValue( UCHAR Reg );
    ULONG Codec_SetPowerState( ULONG ulNewState );

	// PCI routines
	BOOL AudioInitialize(CRegKey * pKey);
    BOOL MapDevice (CRegKey * pKey);


    // Sample Rate Converter
    void InitSRC( BOOLEAN fEnable );
    USHORT SRCRegRead( USHORT reg );
    void SRCRegWrite( USHORT reg, USHORT val );
    void SRCSetRate ( ULONG ulChannelIndex, USHORT wSampleRate );
    ULONG SRCPollIOReg ();
    void SRCWaitForFrame1 ();
    void SRCSaveRegisterState( void );
    void SRCRestoreRegisterState( void );

    // global variables pointing to pre-allocated memory
private:
    // Interrupts
    UCHAR GetInterruptSource( void );
    void AckDMAInterrupt( UCHAR ucIntSrc );

    // Register Access
    VOID HwPagedIOWrite( UCHAR Page, ULONG pAddr, ULONG ulData );
    ULONG HwPagedIORead( UCHAR Page, ULONG pAddr );
    ULONG HwRegRMW ( UCHAR Reg, ULONG dwBitMask, ULONG dwSetBits );
    USHORT HwRegRMW ( UCHAR Reg, USHORT wBitMask, USHORT wSetBits );
    UCHAR HwRegRMW ( UCHAR Reg, UCHAR bBitMask, UCHAR bSetBits );

    // Member Variable
    PUCHAR m_pPciAddr;
    DWORD   m_dwPciLength;
    DWORD m_dwDeviceID;             // the PCI Device ID
    DWORD m_dwRevisionID;        // the PCI chip revision
    HANDLE m_hIsrHandler;       // installable ISR handler
    DWORD m_dwBusNumber;
    DWORD m_dwInterfaceType;

    ULONG m_ulDRegs[12];  // ES1371 direct registers
    ULONG m_ulIRegs[16];  // ES1371 indirect registers

    // power management
    ULONG m_ulPowerState; // ES1371 power state
    UCHAR m_ucSerialControl;
    UCHAR m_ucDeviceControl;
    ULONG m_ulDRegsPMContext[12];  
    ULONG m_ulIRegsPMContext[64];
    USHORT m_usCRegsPMContext[40];
    USHORT m_usSRCRegsPMContext[20];

    // codec
    USHORT m_usCRegs[40]; // AC97 CoDec registers
    ULONG m_ulCodecVendorID;
    ULONG m_ulCodecRevision;
    ULONG m_ulCodecPowerState; // current power state of the AC97 Codec

    // DMA
#define NUM_DMACHANNELS 3

    DMACHANNEL m_dmachannel[NUM_DMACHANNELS]; // info about dma channel states

    // UART
    ULONG m_ulUARTState;       // flags that indicate the state of UART activity
    ULONG m_ulUARTRxPointer;   // pointer to the current RxPostion

    UCHAR m_ulUARTRxQ[UART_RX_QUEUE_SIZE];
    ULONG m_ulUARTRxQHead;
    ULONG m_ulUARTRxQTail;

    UCHAR m_ulUARTTxQ[UART_TX_QUEUE_SIZE];
    ULONG m_ulUARTTxQHead;
    ULONG m_ulUARTTxQTail;

	// PCI related variables
	DWORD	m_IntrAudio;	// Interrupt ID
	BOOL	m_fIsMapped;	// must call MmUnmapIoSpace when destroyed

    // Initialization
    void InitHardware();

    // Power Management
    void SaveES1371Context( void );
    void RetoreES1371Context( void );

    // AC97 Codec
    void InitCodec();
    void Codec_WaitForPowerState( USHORT usState );
    void Codec_SaveRegisterState( USHORT *pusRegisters );
    void Codec_RestoreRegisterState( USHORT *pusRegisters );


    // UART
    void InitUART();
    UCHAR UARTWaitForTxRdy();

	// IST
	static DWORD WINAPI IST_Startup(LPVOID lpParameter);
	void IST();
	HANDLE m_hISTInterruptEvent;
	BOOL   m_bExitIST;
	HANDLE m_hISThread;

	CRITICAL_SECTION m_csPageLock;
};


#endif  // ES1371_H