📄 bpsk_ber1.mdl
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Cell "PurelyIntegerCode"
Cell "SupportNonFinite"
Cell "SupportComplex"
Cell "SupportAbsoluteTime"
Cell "SupportContinuousTime"
Cell "SupportNonInlinedSFcns"
PropName "DisabledProps"
}
Version "1.2.0"
TargetFcnLib "ansi_tfl_tmw.mat"
TargetLibSuffix ""
TargetPreCompLibLocation ""
GenFloatMathFcnCalls "ANSI_C"
UtilityFuncGeneration "Auto"
GenerateFullHeader on
GenerateSampleERTMain off
GenerateTestInterfaces off
IsPILTarget off
ModelReferenceCompliant on
IncludeMdlTerminateFcn on
CombineOutputUpdateFcns off
SuppressErrorStatus off
IncludeFileDelimiter "Auto"
ERTCustomFileBanners off
SupportAbsoluteTime on
LogVarNameModifier "rt_"
MatFileLogging on
MultiInstanceERTCode off
SupportNonFinite on
SupportComplex on
PurelyIntegerCode off
SupportContinuousTime on
SupportNonInlinedSFcns on
EnableShiftOperators on
ParenthesesLevel "Nominal"
ExtMode off
ExtModeStaticAlloc off
ExtModeTesting off
ExtModeStaticAllocSize 1000000
ExtModeTransport 0
ExtModeMexFile "ext_comm"
RTWCAPISignals off
RTWCAPIParams off
RTWCAPIStates off
GenerateASAP2 off
}
PropName "Components"
}
}
hdlcoderui.hdlcc {
$ObjectID 11
Description "HDL Coder custom configuration component"
Version "1.2.0"
Name "HDL Coder"
Array {
Type "Cell"
Dimension 1
Cell ""
PropName "HDLConfigFile"
}
HDLCActiveTab "0"
}
PropName "Components"
}
Name "Configuration"
SimulationMode "normal"
CurrentDlgPage "Solver"
}
PropName "ConfigurationSets"
}
Simulink.ConfigSet {
$PropName "ActiveConfigurationSet"
$ObjectID 1
}
BlockDefaults {
Orientation "right"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Arial"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
}
BlockParameterDefaults {
Block {
BlockType Ground
}
Block {
BlockType Inport
Port "1"
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
DataType "auto"
OutDataType "sfix(16)"
OutScaling "2^0"
SignalType "auto"
SamplingMode "auto"
LatchByDelayingOutsideSignal off
LatchByCopyingInsideSignal off
Interpolate on
}
Block {
BlockType Outport
Port "1"
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
DataType "auto"
OutDataType "sfix(16)"
OutScaling "2^0"
SignalType "auto"
SamplingMode "auto"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType Reference
}
Block {
BlockType "S-Function"
FunctionName "system"
SFunctionModules "''"
PortCounts "[]"
}
Block {
BlockType SubSystem
ShowPortLabels on
Permissions "ReadWrite"
PermitHierarchicalResolution "All"
TreatAsAtomicUnit off
SystemSampleTime "-1"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
SimViewingDevice off
DataTypeOverride "UseLocalSettings"
MinMaxOverflowLogging "UseLocalSettings"
}
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Arial"
FontSize 10
FontWeight "normal"
FontAngle "normal"
}
LineDefaults {
FontName "Arial"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "BPSK_BER1"
Location [224, 115, 804, 408]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
ReportName "simulink-default.rpt"
Block {
BlockType Reference
Name "AWGN\nChannel"
Ports [1, 1]
Position [185, 51, 280, 109]
SourceBlock "commchan3/AWGN\nChannel"
SourceType "AWGN Channel"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
seed "xInitialSeed"
noiseMode "Signal to noise ratio (SNR)"
EbNodB "xSNR"
EsNodB "10"
SNRdB "xSNR"
bitsPerSym "1"
Ps "1"
Tsym "1"
variance "1"
}
Block {
BlockType Reference
Name "Error Rate\nCalculation"
Ports [2]
Position [465, 67, 540, 118]
SourceBlock "commsink2/Error Rate\nCalculation"
SourceType "Error Rate Calculation"
N "0"
st_delay "0"
cp_mode "Entire frame"
subframe "[]"
PMode "Workspace"
WsName "xErrorRate"
RsMode2 off
stop off
numErr "100"
maxBits "1e6"
}
Block {
BlockType Reference
Name "M-PSK\nDemodulator\nBaseband"
Ports [1, 1]
Position [335, 55, 410, 105]
DialogController "commDDGCreate"
DialogControllerArgs "DataTag0"
SourceBlock "commdigbbndpm3/M-PSK\nDemodulator\nBaseband"
SourceType "M-PSK Demodulator Baseband"
M "2"
Ph "pi/2"
Dec "Binary"
Mapping "[0:7]"
OutType "Bit"
DecType "Hard decision"
VarSource "Dialog"
Variance "1"
outDtype1 "double"
outDtype2 "double"
}
Block {
BlockType SubSystem
Name "Souce"
Ports [0, 2]
Position [55, 65, 95, 125]
MinAlgLoopOccurrences off
RTWSystemCode "Auto"
FunctionWithSeparateData off
MaskHideContents off
System {
Name "Souce"
Location [279, 144, 679, 374]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
Block {
BlockType Reference
Name "Bernoulli Binary\nGenerator"
Ports [0, 1]
Position [25, 33, 105, 77]
DialogController "commDDGCreate"
DialogControllerArgs "DataTag1"
SourceBlock "commrandsrc2/Bernoulli Binary\nGenerator"
SourceType "Bernoulli Binary Generator"
ShowPortLabels "on"
SystemSampleTime "-1"
FunctionWithSeparateData "off"
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
P "0.5"
seed "xInitialSeed"
Ts "xSampleTime"
frameBased "on"
sampPerFrame "1"
orient "off"
outDataType "double"
}
Block {
BlockType Reference
Name "M-PSK\nModulator\nBaseband"
Ports [1, 1]
Position [190, 29, 265, 81]
SourceBlock "commdigbbndpm3/M-PSK\nModulator\nBaseband"
SourceType "M-PSK Modulator Baseband"
M "2"
InType "Bit"
Enc "Binary"
Mapping "0"
Ph "pi/2"
outDtype "double"
outWordLen "16"
outUDDataType "sfix(16)"
outFracLenMode "Best precision"
outFracLen "15"
}
Block {
BlockType Outport
Name "Out1"
Position [345, 48, 375, 62]
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "Out2"
Position [340, 193, 370, 207]
Port "2"
IconDisplay "Port number"
BusOutputAsStruct off
}
Line {
SrcBlock "Bernoulli Binary\nGenerator"
SrcPort 1
Points [25, 0]
Branch {
DstBlock "M-PSK\nModulator\nBaseband"
DstPort 1
}
Branch {
Points [0, 145]
DstBlock "Out2"
DstPort 1
}
}
Line {
SrcBlock "M-PSK\nModulator\nBaseband"
SrcPort 1
DstBlock "Out1"
DstPort 1
}
}
}
Line {
SrcBlock "Souce"
SrcPort 1
DstBlock "AWGN\nChannel"
DstPort 1
}
Line {
SrcBlock "Souce"
SrcPort 2
Points [60, 0; 0, 70; 290, 0]
DstBlock "Error Rate\nCalculation"
DstPort 2
}
Line {
SrcBlock "AWGN\nChannel"
SrcPort 1
DstBlock "M-PSK\nDemodulator\nBaseband"
DstPort 1
}
Line {
SrcBlock "M-PSK\nDemodulator\nBaseband"
SrcPort 1
DstBlock "Error Rate\nCalculation"
DstPort 1
}
}
}
MatData {
NumRecords 2
DataRecord {
Tag DataTag1
Data " %)30 . > 8 ( 0 % "
"\" $ ! 0 . 2 8 ( ! % \" $ "
"2 0 0 $@ $)E<FYO=6QL:4)I;F%R>4=E;@ "
}
DataRecord {
Tag DataTag0
Data " %)30 . < 8 ( 0 % "
"\" $ ! 0 . 0 8 ( ! % \" $ "
"/ 0 0 #P $U04TM$96UO9'5L871O<@ "
}
}
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