start.s

arm-linux下的blob编译源码

/*
 * start.s: Mainstone/Bulverde start code using XLLI
 *
 * Copyright (C) 2004 Intel Corporation ([e-mail])
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */

        .include  "xlli_Bulverde_defs.inc"                 @ Bulverde specific include file
        .include  "xlli_Mainstone_defs.inc"                @ Mainstone specific include file

.text

/*
 * We start by implementing *all* exception vectors
 *
 * Reset vector: this initialises the machine
 * note here that this not yet taken sleep wakeup into account -- lets just
 * get something to work first.
 */

.macro blink, count
	mov		r3, \count
	b		endless_blink
.endm

.globl reset
reset:
	/* Check reset cause */
	ldr 	r0, =xlli_PMRCREGS_PHYSICAL_BASE
	ldr 	r10, [r0, #xlli_RCSR_offset]

	mov 	r2, #xlli_RCSR_ALL
	and 	r10, r10, r2

	mov 	r12, #0

	/* Clear RCSR bits as they are sticky */
	str 	r2, [r0, #xlli_RCSR_offset]

	/* Pack PSSR/RCSR together */
	ldr 	r1, [r0, #xlli_PSSR_offset]
	mov 	r2, #0x3F
	and 	r1, r1, r2
	mov 	r1, r1, lsl #16
	orr 	r10, r10, r1

	/* GPIO Reset */
	tst 	r10, #xlli_RCSR_GPR
	bne 	1f

	/* Hardware/Power On reset */
	tst 	r10, #xlli_RCSR_HWR
	bne 	1f

	/* Sleep or Deep sleep Mode Reset */
	tst 	r10, #xlli_RCSR_SMR
	add 	r12, r12, #0x1
	bne 	2f

1:
	/* Read system configuration and LCD configuration,
         * stored in PSPR 
	 */
	bl 	xlli_read_SCR

	/* Initialize clocks */
	bl 	xlli_clks_init

	/* Intialize power manager and internal memory */
	bl 	xlli_pwrmgr_init
	bl 	xlli_IMpwr_init	

2:
	/* Initialize GPIO */
	bl 	xlli_GPIO_init

	/* Initialize Memory Controller */
	bl 	xlli_mem_init

	/* Initialize Interrupt Controller */
	bl 	xlli_intr_init

	/* Intialize clocks when sleep reset */
	tst 	r12, #0x1
	blne 	xlli_clks_init_sleepReset

	/* Perform frequence change */
	bl 	xlli_setClocks
	bl 	xlli_freq_change

	/* Initialize OS timer */
	bl 	xlli_ost_init

	/* Check whether last sleep due to vdd/batt error: pspr should 
	 * has special value 0x3 :
         * - if so, do normal boot
         * - otherwise, do suspend/resume
         */
	ldr 	r0, =xlli_PMRCREGS_PHYSICAL_BASE
	ldr	r1, [r0, #xlli_PSPR_offset]
	tst	r12, #0x1
	cmpne	r1, #0x3
	movne	pc, r1

	bl normal_boot

	/* should never be here */
	blink	#1

.globl undefined_instruction
undefined_instruction:
	blink	#2

.globl software_interrupt
software_interrupt:
	blink	#3

.globl prefetch_abort
prefetch_abort:
	blink	#4

.globl data_abort
data_abort:
	blink	#5

.globl not_used
not_used:
	blink	#6

.globl irq
irq:
	blink	#7

.globl fiq
fiq:
	blink	#8

ledset:
	mov		pc, lr

ledclear:
	mov		pc, lr

ledsetup:
	mov		r2, lr
	bl		ledclear
	mov		pc, r2

.macro wait, count
	mov		r0, \count
0:
	subs	r0, r0, #1
	bne		0b
.endm

ledflash:
	mov		r2, lr
	bl		ledset
	wait	#0x400000
	bl		ledclear
	wait	#0x400000
	mov		pc, r2

endless_blink:
	mov		r4, r3
        ldr     	r1, =(xlli_PLATFORM_REGISTERS + xlli_PLATFORM_HEXLED_DATA_offset)
	str		r3, [r1]
0:
	bl		ledflash
	subs	r4, r4, #1
	bne		0b
	wait	#0x2000000
	b		endless_blink