lubbock.h

arm-linux下的blob编译源码

/*
 * lubbock.h: Lubbock specific defines
 *
 * Copyright (C) 2002 Intel Corporation
 * Written by Rusty Geldmacher ([e-mail])
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */

#ifndef BLOB_ARCH_LUBBOCK_H
#define BLOB_ARCH_LUBBOCK_H

/* boot CPU speed */
#define CPU_SPEED		(0x0b)

/* Use FFUART */
#define USE_SERIAL1	1
#define TERMINAL_SPEED	baud_115200

/* the base address were BLOB is loaded by the first stage loader */
#define BLOB_ABS_BASE_ADDR	(0xa0200400)


/* where do various parts live in RAM */
#define BLOB_RAM_BASE		(0xa0100000)
#define KERNEL_RAM_BASE		(0xa0008000)
#define PARAM_RAM_BASE		(0xa0110000)
#define RAMDISK_RAM_BASE	(0xa0400000)


/* and where do they live in flash */
#define BLOB_FLASH_BASE		(0x00000000)
#define BLOB_FLASH_LEN		(256 * 1024)
#define PARAM_FLASH_BASE	(BLOB_FLASH_BASE + BLOB_FLASH_LEN)
#define PARAM_FLASH_LEN		(256 * 1024)
#define KERNEL_FLASH_BASE	(PARAM_FLASH_BASE + PARAM_FLASH_LEN)
#define KERNEL_FLASH_LEN	(1024 * 1024)
#define LOAD_RAMDISK		1 /* load ramdisk into ram */
#define RAMDISK_FLASH_BASE	(KERNEL_FLASH_BASE + KERNEL_FLASH_LEN)
#define RAMDISK_FLASH_LEN	(4 * 1024 * 1024)


/* the position of the kernel boot parameters */
#define BOOT_PARAMS		(0xa0000100)


/* the size (in kbytes) to which the compressed ramdisk expands */
#define RAMDISK_SIZE		(8 * 1024)


/* GPIO settings */
#undef GPSR0_VALUE
#undef GPSR1_VALUE
#undef GPSR2_VALUE
#undef GPDR0_VALUE
#undef GPDR1_VALUE
#undef GPDR2_VALUE
#undef GPCR0_VALUE
#undef GPCR1_VALUE
#undef GPCR2_VALUE
#undef GAFR0_L_VALUE
#undef GAFR0_U_VALUE
#undef GAFR1_L_VALUE
#undef GAFR1_U_VALUE
#undef GAFR2_L_VALUE
#undef GAFR2_U_VALUE

#define GPSR0_VALUE	0x00008000
#define GPSR1_VALUE	0x00FC0382
#define GPSR2_VALUE	0x0001FFFF

#define GPDR0_VALUE	0x0060A800
#define GPDR1_VALUE	0x00FF0382
#define GPDR2_VALUE	0x0001C000

#define GPCR0_VALUE	0x00000000
#define GPCR1_VALUE	0x00000000
#define GPCR2_VALUE	0x00000000

#define GAFR0_L_VALUE	0x98400000
#define GAFR0_U_VALUE	0x00002950
#define GAFR1_L_VALUE	0x000A9558
#define GAFR1_U_VALUE	0x0005AAAA
#define GAFR2_L_VALUE	0xA0000000
#define GAFR2_U_VALUE	0x00000002

/* Memory configuration */
#define MDCNFG_VALUE	0x00001AC9
#define MDREFR_VALUE	0x00018018 
#define MDMRS_VALUE	0x00000000

#define MSC0_VAL	0x23D223D2
#define MSC1_VAL	0x3FF1A441
#define MSC2_VAL	0x7FF17FF1

/* TFTP download RAM base */
#define TFTP_RAM_START	0xa1000000

/* FPGA */
#define LUB_FPGA_BASE	0x08000000
#define LUB_LEDHEX	__REG(LUB_FPGA_BASE + 0x10)
#define LUB_LEDCTL	__REG(LUB_FPGA_BASE + 0x40)
#define LUB_USERSW	__REG(LUB_FPGA_BASE + 0x60)

/* LED */
#define LED_ADDR	(LUB_FPGA_BASE + 0x40)
#define LED_ON		(0x00FE)
#define LED_OFF		(0x00FF)

/* SMC91c96 */
#define SMC_BASE	(0x0c000000)

#endif