ramses.h

arm-linux下的blob编译源码

/*
 * ramses.h: M&N Ramses MN-CI
 *
 * Copyright (C) 2001  Erik Mouw ([e-mail])
 * Copyright (c) 2002  Jeff Sutherland <[e-mail]>
 * Copyright (C) 2003  Holger Schurig <[e-mail]>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */

#ifndef BLOB_ARCH_RAMSES_H
#define BLOB_ARCH_RAMSES_H

/* speed definitions are more complex on Xscale- need core, internal bus,
 * and memory numbers.  Not all combinations are valid.
 */

#undef  CPU_SPEED_400

/* boot CPU speed */
#ifdef CPU_SPEED_100
#       define CPU_SPEED                (0x05)
#else
#       define CPU_SPEED                (0x0a)
#endif

#define USE_SERIAL1
#define TERMINAL_SPEED baud_115200

/* the base address were BLOB is loaded by the first stage loader */
#define BLOB_ABS_BASE_ADDR	(0xa0200400)

/* where do various parts live in RAM */
#define BOOT_PARAMS		(0xa0000100)
#define BLOB_RAM_BASE		(0xa0100000)
#define PARAM_RAM_BASE		(0xa0200000)
#define KERNEL_RAM_BASE		(0xa0800000)
//#define RAMDISK_RAM_BASE	(0xa1000000)

/* and where do they live in flash */
#define BLOB_FLASH_BASE		(0x00000000)
#define BLOB_FLASH_LEN		(256 * 1024)
#define PARAM_FLASH_BASE	(BLOB_FLASH_BASE + BLOB_FLASH_LEN)
#define PARAM_FLASH_LEN		(256 * 1024)
#define KERNEL_FLASH_BASE	(PARAM_FLASH_BASE + PARAM_FLASH_LEN)
#define KERNEL_FLASH_LEN	(1024 * 1024)
//#define RAMDISK_FLASH_BASE	(KERNEL_FLASH_BASE + KERNEL_FLASH_LEN)
//#define RAMDISK_FLASH_LEN	(4 * 1024 * 1024)

/* this needs to be defined if you want parameter block support */
#define PARAM_START PARAM_FLASH_BASE
#define PARAM_LEN PARAM_FLASH_LEN

/* load ramdisk into ram */
#define LOAD_RAMDISK		0

/* the size (in kbytes) to which the compressed ramdisk expands */
//#define RAMDISK_SIZE		(4 * 1024)


/* #ifdef BLOB_NEED_MEMCONFIG */

/* this is full tilt boogie (400MHz cpu, 100Mhz mem, 100MHz clk)

#define MDCNFG_VALUE	0x0A000AC9
#define MDREFR_VALUE	0x0085C017
#define MSC0_VALUE	0x29DCA4D2
#define MSC1_VALUE	0x439C493C
#define MSC2_VALUE	0x7FD449D1
#define MECR_VALUE	0x00000003

*/

/* I took these from the Lubbock setup, they should probably be changed
 * for actual IDP values, but these are there for now :-)
 */

#define PERIF_BASE_PHYSICAL 0x40000000
#define MEMC_BASE_PHYSICAL  0x48000000
#define SDRAM_BASE_PHYSICAL 0xA0000000

#define OST_OFFSET          0x00A00000
#define OSCR_OFFSET         0x10

#define OST_BASE_PHYSICAL   (PERIF_BASE_PHYSICAL + OST_OFFSET)
#define OSCR_BASE_PHYSICAL  (OST_BASE_PHYSICAL + OSCR_OFFSET)

#define MSC0_VAL            0x23F223F2
#define MSC1_VAL            0x3FF1A441
#define MSC2_VAL            0x7FF17FF1
#define MECR_VAL            0x00000000
#define MCMEM0_VAL          0x00010504
#define MCMEM1_VAL          0x00010504
#define MCATT0_VAL          0x00010504
#define MCATT1_VAL          0x00010504
#define MCIO0_VAL           0x00004715
#define MCIO1_VAL           0x00004715
#define MDREFR_VAL          0x00018018
#define MDCNFG_VAL          0x00001AC9
#define MDMRS_VAL           0x00000000


/* Debugging macros used in accelent code */
#define RAMSES_DEBUG 1

#ifdef RAMSES_DEBUG
#	define _DBGU32( x )	SerialOutputString( #x"=0x" ); \
				SerialOutputHex( (u32)x ); \
				serial_write( '\n' );
#else
#	define _DBGU32( x )
#endif


#endif