📄 rf24l01_drv.c
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void L01_RTX_LastFrame(void)
{
SPI_RW_Reg(REUSE_TX_PL,0);
CE_Pin(CE_PULSE);
}
//-----------------------------------------------------------------------------
// Used in RX mode.
//-----------------------------------------------------------------------------
void L01_RX(BYTE *prx_buf,BYTE length)
{
if(prx_buf != NULL)SPI_Read_Buf(RD_RX_PLOAD, prx_buf, length);
}
//-----------------------------------------------------------------------------
//
// Function: L01_Polling_IRQ
//
// Description:
// Deal with IQR event with polling mode
//
//-----------------------------------------------------------------------------
BYTE L01_Polling_IRQ(BYTE * rev_buf,BYTE length)
{
BYTE irq_status;
if(IRQ_Pin())
{
if(SPI_Read(FIFO_STATUS) & MASK_RX_EMPTY) return 0; //no data
L01_RX(rev_buf, length);
return (BYTE)RX_DR;
}
irq_status=SPI_Read(STATUS);
switch(irq_status&MASK_IRQ_FLAGS)
{
case MASK_RX_DR_FLAG: //rf receive data
{
L01_RX(rev_buf, length);
irq_status = (BYTE)RX_DR;
break;
}
case MASK_TX_DS_FLAG: //send rf data success (with ack response)
{
irq_status = (BYTE)TX_DS;
break;
}
case MASK_MAX_RT_FLAG: //Maximum number of TX retries interrupt If MAX_RT is set it must be cleared to enable further communication.
{
irq_status = (BYTE)MAX_RT;
break;
}
case IDLE:
{
irq_status = (BYTE)IDLE;
break;
}
}
L01_Clear_IRQ(MASK_IRQ_FLAGS);
return irq_status;
}
#if 1
//下面的定义仅限cos_24L01driver.c文件使用
//定义配置24L01的结构L01_cfg里面需要修改变量的表示
//#define DEF_RF_CONTROL_CONFIG 0x01 //config 变量要修改
#define DEF_RF_CONTROL_EE_AA 0x02 //ee_aa 变量要修改
#define DEF_RF_CONTROL_EN_RXADDR 0x04 //en_rxaddr 变量要修改
#define DEF_RF_CONTROL_SETUP_AW 0x08 //setup_aw 变量要修改
#define DEF_RF_CONTROL_SETUP_RETR 0x10 //setup_retr变量要修改
#define DEF_RF_CONTROL_RF_CH 0x20 //rf_ch 变量要修改
//#define DEF_RF_CONTROL_RF_SETUP 0x40 //rf_setup 变量要修改
#define DEF_RF_CONTROL_RX_ADDR_P0 0x80 //rx_addr_p0 变量要修改
#define DEF_RF_CONTROL_RX_PW_P0 0x100 //rx_pw_p0 变量要修改
#define DEF_RF_CONTROL_TX_ADDR 0x200 //tx_addr 变量要修改
#define DEF_RF_CONTROL_FORCE_RUN 0x400 //强制执行设置的标志
//**********************************************************//
//
// Function: L01_cfg_init
//
// Description:
// Initialize nRf24L01 registers
// the initial data be store in the struct L01_CFG
//
// In/Out parameters:
// In: initial struct data : L01_cfg
// Out:
// Author: lxc Date: 22.07.06
//**********************************************************//
BYTE L01_cfg_init(L01_CFG *strcfg,unsigned short iDiff)
{
unsigned char ucindex,ucTemp[5];
CE_Pin(CE_LOW);
L01_Flush_RX(); //flush TX/RX FIFO to be empty
L01_Flush_TX(); //
L01_Clear_IRQ(MASK_IRQ_FLAGS); //clear IRQ STATUS register
#if 1
//1 get config
//if(iDiff & (DEF_RF_CONTROL_CONFIG|DEF_RF_CONTROL_FORCE_RUN))
{
SPI_RW_Reg(WRITE_REG + CONFIG, strcfg->config);
if(SPI_Read(CONFIG) !=strcfg->config) return 1;
}
//2 get ee_aa
if(iDiff & (DEF_RF_CONTROL_EE_AA|DEF_RF_CONTROL_FORCE_RUN))
{
SPI_RW_Reg(WRITE_REG + EN_AA, strcfg->ee_aa); // Enable Auto.Ack:Pipe0
if(SPI_Read(EN_AA) !=strcfg->ee_aa) return 2;
}
//3 get en_rxaddr
if(iDiff & (DEF_RF_CONTROL_FORCE_RUN|DEF_RF_CONTROL_EN_RXADDR))
{
SPI_RW_Reg(WRITE_REG + EN_RXADDR, strcfg->en_rxaddr);
if(SPI_Read(EN_RXADDR) !=strcfg->en_rxaddr) return 3;
}
//4 get setup_aw
if(iDiff & (DEF_RF_CONTROL_FORCE_RUN|DEF_RF_CONTROL_SETUP_AW))
{
SPI_RW_Reg(WRITE_REG + SETUP_AW, strcfg->setup_aw);
if(SPI_Read(SETUP_AW) !=strcfg->setup_aw) return 4;
}
//5 get setup_retr
if(iDiff & (DEF_RF_CONTROL_FORCE_RUN|DEF_RF_CONTROL_SETUP_RETR))
{
SPI_RW_Reg(WRITE_REG + SETUP_RETR, strcfg->setup_retr);
if(SPI_Read(SETUP_RETR) !=strcfg->setup_retr) return 5;
}
//6 get rf_ch
if(iDiff & (DEF_RF_CONTROL_FORCE_RUN|DEF_RF_CONTROL_RF_CH))
{
SPI_RW_Reg(WRITE_REG + RF_CH, strcfg->rf_ch);
ucindex =SPI_Read(RF_CH);
if(ucindex !=strcfg->rf_ch) return 6;
}
//7 get rf_setup
//if(iDiff & (DEF_RF_CONTROL_FORCE_RUN|DEF_RF_CONTROL_RF_SETUP))
{
SPI_RW_Reg(WRITE_REG + RF_SETUP, strcfg->rf_setup);
if(SPI_Read(RF_SETUP) !=strcfg->rf_setup) return 7;
}
//8 get rx_addr_p0
if(iDiff & (DEF_RF_CONTROL_FORCE_RUN|DEF_RF_CONTROL_RX_ADDR_P0))
{
SPI_Write_Buf(WRITE_REG + RX_ADDR_P0,strcfg->rx_addr_p0,strcfg->addr_width);
SPI_Read_Buf(RX_ADDR_P0,ucTemp,strcfg->addr_width);
for(ucindex = 0;ucindex<strcfg->addr_width;ucindex++)
{
if(ucTemp[ucindex]!=strcfg->rx_addr_p0[ucindex])return 8;
}
}
//9 get rx_pw_p0
if(iDiff & (DEF_RF_CONTROL_FORCE_RUN|DEF_RF_CONTROL_RX_PW_P0))
{
SPI_RW_Reg(WRITE_REG + RX_PW_P0, strcfg->rx_pw_p0);
if(SPI_Read(RX_PW_P0) !=strcfg->rx_pw_p0) return 10;
}
//9 get tx_addr
if(iDiff & (DEF_RF_CONTROL_FORCE_RUN|DEF_RF_CONTROL_TX_ADDR))
{
SPI_Write_Buf(WRITE_REG + TX_ADDR,strcfg->tx_addr,strcfg->addr_width);
SPI_Read_Buf(TX_ADDR,ucTemp,strcfg->addr_width);
for(ucindex = 0;ucindex<strcfg->addr_width;ucindex++)
{
if(ucTemp[ucindex]!=strcfg->rx_addr_p0[ucindex])return 9;
}
}
#endif
return 0;//check config ok
}
BYTE Set_L01_Init(DataRF_Control *drc)//BYTE * addr,BYTE txPower,BYTE rf_ch,BYTE rtCount,BYTE plWidth)
{
//和上回的数字的区别bit 0~9 代表L01_cfg里面各个变量是否改变（1：yes，o：no），最高bit代表是否强制改(1:force;0:not)
unsigned short int iDiff=0;//DEF_RF_CONTROL_CONFIG | DEF_RF_CONTROL_RF_SETUP;
unsigned char btemp;
//------------------------------------------------------
//1 set config
btemp =0x0e;
if(drc->WorkMode == Dev_Normal)btemp +=0x01;
if(btemp != L01_cfg.config)
{
L01_cfg.config =btemp; //bit6 = 0;RX interrupt enable
//bit5 = 0--enable TX Succeed interrupt enable,IRQ pin active low
//bit4 = 0--eanble TX time over interrupt enable,IRQ pin active low
//bit3 = 1,CRC enable,if EN_AA be set,this bit will be forced to high
//bit2 = 1,CRC width,0--one byte,1--two bytes
//bit1 = 1,ON; RF POWER ON/OFF,1--ON, 0--OFF
//bit0 = 0,PTX; transmmit mode: 0--PTX,1--PRX
}
//------------------------------------------------------
//2 set ee_aa
if(L01_cfg.ee_aa != 0x01)
{
L01_cfg.ee_aa = 0x01; //'Enable Auto Acknowledgment'
// bit 5-0 response to Pip5-0; bit: 1-en, 0-disen
// bit0 = 1;only enble pipe0
iDiff |= DEF_RF_CONTROL_EE_AA;
iDiff |= DEF_RF_CONTROL_FORCE_RUN;//用这个来标志可以使L01_cfg初次初始化
}
//------------------------------------------------------
//3 set en_rxaddr
if(L01_cfg.en_rxaddr != 0x01)
{
L01_cfg.en_rxaddr = 0x01; //pipe rx enble,bit0 = 1,only enable pipe0 RX
iDiff |= DEF_RF_CONTROL_EN_RXADDR;
iDiff |= DEF_RF_CONTROL_FORCE_RUN;//用这个来标志可以使L01_cfg初次初始化
}
//------------------------------------------------------
if(L01_cfg.addr_width != 5)
{
L01_cfg.addr_width = 5;
iDiff |= DEF_RF_CONTROL_FORCE_RUN;//用这个来标志可以使L01_cfg初次初始化
}
//------------------------------------------------------
//4 set setup_aw
if(L01_cfg.setup_aw != 0x03)
{
L01_cfg.setup_aw = 0x03; //address width is 5 bytes;bit10: 00--illegal,01--3bytes,10--4bytes,11--5bytes
iDiff |= DEF_RF_CONTROL_SETUP_AW;
iDiff |= DEF_RF_CONTROL_FORCE_RUN;//用这个来标志可以使L01_cfg初次初始化
}
//------------------------------------------------------
//5 set setup_retr
btemp = (drc->ART_Factor&0x0f)<<4;//0x10; //retran delay time:250us+86us
btemp += (drc->Retran > 15 ? 15 : drc->Retran);//drc->Retran;
if(L01_cfg.setup_retr != btemp)
{
L01_cfg.setup_retr = btemp;
iDiff |= DEF_RF_CONTROL_SETUP_RETR;
}
//------------------------------------------------------
//6 set rf_ch
#if 0
if(drc->Base_Channel>105)drc->Base_Channel = 105;
else if(drc->Base_Channel == 0)drc->Base_Channel = 95;
if(drc->Channel>18)drc->Channel = 18;
btemp =drc->Base_Channel+drc->Channel; //default we choice frequency range 2.495GHz~2.513GHZ channel
#else
if(drc->Base_Channel>122)drc->Base_Channel = 122;
else if(drc->Base_Channel == 0)drc->Base_Channel = 122;
if(drc->Channel > drc->Base_Channel) drc->Channel = 0;
btemp =drc->Base_Channel-drc->Channel; //default we choice frequency range 2.495GHz~2.513GHZ channel
#endif
if(L01_cfg.rf_ch != btemp )
{
L01_cfg.rf_ch = btemp;
iDiff |= DEF_RF_CONTROL_RF_CH;
}
//------------------------------------------------------
//7 set rf_setup
btemp =((drc->Power&0x0f)>3 ? 3:(drc->Power&0x0f))<<1; // bit3 = 0; data rate :0--1Mbps,1--2Mbps;
// bit2~1 = 11; rf power:00,-18dbm,,01,-12dbm,,10,-6dbm,,11,0dbm
// bit0 = 1; must be 1
btemp +=0x01;
if((drc->Power&0xf0)>0) btemp += 0x08;
if(L01_cfg.rf_setup != btemp)
{
L01_cfg.rf_setup = btemp;
}
//------------------------------------------------------
//8 set rx_addr_p0
if(memcmp(L01_cfg.rx_addr_p0,drc->Addr+1,5))
{
memcpy(L01_cfg.rx_addr_p0,drc->Addr+1,5);
iDiff |= DEF_RF_CONTROL_RX_ADDR_P0;
}
//------------------------------------------------------
//9 set rx_pw_p0
if(drc->Len>32)drc->Len = 32;
else if(drc->Len == 0)drc->Len = 1;
if(L01_cfg.rx_pw_p0 != drc->Len)
{
L01_cfg.rx_pw_p0 = drc->Len; //pip0 rx payload width,we set 25 bytes
iDiff |= DEF_RF_CONTROL_RX_PW_P0;
}
//------------------------------------------------------
//10 set tx_addr
if(memcmp(L01_cfg.tx_addr,drc->Addr+1,5))
{
memcpy(L01_cfg.tx_addr,drc->Addr+1,5);
iDiff |= DEF_RF_CONTROL_TX_ADDR;
}
//------------------------------------------------------
CE_Pin(CE_LOW);
btemp =L01_cfg_init( &L01_cfg ,iDiff);
if(drc->WorkMode == Dev_Normal)CE_Pin(CE_HIGH);
return btemp;
}
#endif
#if 1
//-----------------------------------------------------------
// test code
//-----------------------------------------------------------
void RFTest(void)
{
int i;
unsigned char nRetval;
unsigned char gaPackBuffer[156];
DataRF_Control gsControl;
gsControl.Addr[0]=;
gsControl.Addr[1]=0x0b;
gsControl.Addr[2]=0x0;
gsControl.Addr[3]=0xa3;
gsControl.Addr[4]=0xa4;
gsControl.Addr[5]=0xa5;
gsControl.Power=0x03;
gsControl.Channel=0;
gsControl.Retran=0x0f;
gsControl.Len=28;
gsControl.ART_Factor=0x0f;
gsControl.Base_Channel=95;
//RF_Control(&gsControl);
Set_L01_Init(&gsControl);
for (i=0;i<28;i++)
{
gaPackBuffer[i]=i;
}
while(1)
{
L01_RxTx_SW(PRX);
while(1)
{
nRetval=L01_Polling_IRQ(gaPackBuffer,28);
if (nRetval==IDLE)
{
continue;
}
break;
}
if (nRetval==RX_DR)
{
L01_TX(gaPackBuffer,28);
while(1)
{
nRetval=L01_Polling_IRQ(gaPackBuffer,28);
if (nRetval==IDLE)
{
continue;
}
break;
}
}
else
{
break;
}
}
//=======================================================================
while(1)
{
L01_TX(gaPackBuffer,28);
while(1)
{
nRetval=L01_Polling_IRQ(gaPackBuffer,28);
if (nRetval==IDLE)
{
continue;
}
break;
}
if (nRetval==TX_DS)
{
L01_RxTx_SW(PRX);
while(1)
{
nRetval=L01_Polling_IRQ(gaPackBuffer+28,28);
if (nRetval==IDLE)
{
continue;
}
else if (nRetval==RX_DR)
{
gaPackBuffer[0]=gaPackBuffer[28];
break;
}
}
}
else
{
break;
}
}
}
#endif
// code end
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