📄 rf24l01_drv.c
字号:
//-----------------------------------------------------------------------------
// Cos_24L01Driver.c
//-----------------------------------------------------------------------------
#include "Inc.h"
L01_CFG L01_cfg; // size = 20
//-----------------------------------------------------------------------------
// wait for 10 us( CLOCK = 8M )
//-----------------------------------------------------------------------------
void Wait10Us(void)
{
unsigned char i;
//SetBit(DDRD,LEDPIN); //LEDPIN OUTPUT
//SetBit(PORTD,LEDPIN); //Default output High level
for(i=0;i<28;i++); // 13us
//ClrBit(PORTD,LEDPIN);
}
//-----------------------------------------------------------------------------
// Set GPIO attributes
//-----------------------------------------------------------------------------
void GPIOInit(void)
{
#if 0
HSI_GPIO_Dir(MASK_MISO|MASK_IRQ); // GPIO_MISO and GPIO_IRQ as input
HSI_GPIO_OutputConfiguration(0x00);// all GPIO in push-pull
HSI_GPIO_CtrlIT(0x00,0x00); // the interruption on GPIO be disabled,
// bitx:0=rising edge,1=falling edge
HSI_GPIO_ClearBit(NB_CE); // Set CE 0
HSI_GPIO_ClearBit(NB_SCK); // Set NB_SCK 0
HSI_GPIO_SetBit(NB_CSN); // Set CSN 1
#else
DDRC |= 0x3f;
DDRC &= ~(_BV(NB_MISO)|_BV(NB_IRQ));
//DDRC = 0xb5; //1111 1100 GPIO_MISO and GPIO_IRQ as input
//PORTC = 0x00; //0000 0000 all GPIO in push-pull
ClrBit(PORTC,NB_CE); // Set CE 0
ClrBit(PORTC,NB_SCK); // Set NB_SCK 0
SetBit(PORTC,NB_CSN); // Set CSN 1
#endif
}
//-----------------------------------------------------------------------------
// Set Pin
//-----------------------------------------------------------------------------
void GPIO_Set(BYTE NB,BYTE state)
{
#if 0
if (state)
HSI_GPIO_SetBit(NB);
else
HSI_GPIO_ClearBit(NB);
#else
if (state)
SetBit(PORTC,NB);
else
ClrBit(PORTC,NB);
#endif
}
//-----------------------------------------------------------------------------
// Set CE pin (Function: Chip Enable Activates RX or TX mode)
//-----------------------------------------------------------------------------
void CE_Pin(BYTE action) // CE pin high, low or pulse..
{
#if 0
switch(action)
{
case CE_LOW: // action == 0, CE low
HSI_GPIO_ClearBit(NB_CE);
break;
case CE_HIGH: // action == 1, CE high
HSI_GPIO_SetBit(NB_CE);
break;
case CE_PULSE:
HSI_GPIO_SetBit(NB_CE); // action == 2, CE pulse (10us)
Wait10Us();
HSI_GPIO_ClearBit(NB_CE);
break;
}
#else
switch(action)
{
case CE_LOW: // action == 0, CE low
ClrBit(PORTC,NB_CE);
break;
case CE_HIGH: // action == 1, CE high
SetBit(PORTC,NB_CE);
break;
case CE_PULSE:
SetBit(PORTC,NB_CE); // action == 2, CE pulse (10us)
Wait10Us();
ClrBit(PORTC,NB_CE);
break;
}
Wait10Us();
#endif
}
//-----------------------------------------------------------------------------
// Set/reset CSN pin (Function: SPI Chip Select)
//-----------------------------------------------------------------------------
void CSN_Pin(BYTE state)
{
#if 0
if(state)
HSI_GPIO_SetBit(NB_CSN);
else
HSI_GPIO_ClearBit(NB_CSN);
#else
if(state)
SetBit(PORTC,NB_CSN);
else
ClrBit(PORTC,NB_CSN);
#endif
}
//-----------------------------------------------------------------------------
// Set/reset SCK pin
//-----------------------------------------------------------------------------
void SCK_Pin(BYTE state)
{
#if 0
if(state)
HSI_GPIO_SetBit(NB_SCK);
else
HSI_GPIO_ClearBit(NB_SCK);
#else
if(state)
SetBit(PORTC,NB_SCK);
else
ClrBit(PORTC,NB_SCK);
#endif
}
//-----------------------------------------------------------------------------
// Set/reset MOSI pin (Function: SPI Slave Data Input)
//-----------------------------------------------------------------------------
void MOSI_Pin(BYTE state)
{
#if 0
if(state)
HSI_GPIO_SetBit(NB_MOSI);
else
HSI_GPIO_ClearBit(NB_MOSI);
#else
if(state)
SetBit(PORTC,NB_MOSI);
else
ClrBit(PORTC,NB_MOSI);
#endif
}
//-----------------------------------------------------------------------------
// Read MISO pin (Function: SPI Slave Data Output, with tri-state option)
//-----------------------------------------------------------------------------
BYTE MISO_Pin(void)
{
#if 0
return HSI_GPIO_ReadBit(NB_MISO);
#else
if(ValBit(PINC,NB_MISO))return 1;//avrx8 read pin dada,must use PINx register
else return 0;
#endif
}
//-----------------------------------------------------------------------------
// Read IRQ pin
//-----------------------------------------------------------------------------
BYTE IRQ_Pin(void)
{
#if 0
return HSI_GPIO_ReadBit(NB_IRQ);
#else
if(ValBit(PINC,NB_IRQ))return 1;//avrx8 read pin dada,must use PINx register
else return 0;
#endif
}
//**********************************************************//
//
// Function: SPI_RW
//
// Description:
// Writes one byte to nRF24L01, and return the byte read
// from nRF24L01 during write, according to SPI protocol
//
// In/Out parameters:
// In: 'byte', current byte to be written
// Out: 'SPI0DAT', HW SPI mode, 'byte' SW SPI mode,
//
// Author: RSK Date: 28.11.05
//**********************************************************//
BYTE SPI_RW(BYTE byte)
{
BYTE bit_ctr;
for(bit_ctr=0;bit_ctr<8;bit_ctr++)
{
MOSI_Pin(byte & 0x80); // output 'byte', MSB to MOSI
byte = (byte << 1); // shift next bit into MSB..
SCK_Pin(1); // Set SCK high..
byte |= MISO_Pin(); // capture current MISO bit
SCK_Pin(0); // ..then set SCK low again
}
MOSI_Pin(0); // MOSI pin low before return
return(byte); // return 'read' byte
}
//**********************************************************//
//
// Function: SPI_Read
//
// Description:
// Read one byte from nRF24L01 register, 'reg'
//
//
// In/Out parameters:
// In: reg, register to read
// Out: return reg_val, register value.
//
//
// Author: RSK Date: 28.11.05
//**********************************************************//
BYTE SPI_Read(BYTE reg)
{
BYTE reg_val;
CSN_Pin(0);
SPI_RW(reg); // Select register to read from..
reg_val = SPI_RW(0); // ..then read registervalue
CSN_Pin(1); // CSN high, terminate SPI communication
return(reg_val); // return register value
}
//**********************************************************//
//
// Function: SPI_RW_Reg
//
// Description:
// Writes value 'value' to register 'reg'
//
//
// In/Out parameters:
// In: 'reg' register to write value 'value' to.
// Return status byte.
//
// Author: RSK Date: 28.11.05
//**********************************************************//
BYTE SPI_RW_Reg(BYTE reg, BYTE value)
{
BYTE status;
CSN_Pin(0); // CSN low, init SPI transaction
status = SPI_RW(reg); // select register
SPI_RW(value); // ..and write value to it..
CSN_Pin(1); // CSN high again
return(status); // return nRF24L01 status byte
}
//**********************************************************//
//
// Function: SPI_Write_Buf
//
// Description:
// Writes contents of buffer '*pBuf' to nRF24L01
// Typically used to write TX payload, Rx/Tx address
//
//
// In/Out parameters:
// In: register 'reg' to write, buffer '*pBuf*' contains
// data to be written and buffer size 'buf_size' is #of
// bytes to be written
// Out: return nRF24L01 status byte.
//
// Author: RSK Date: 28.11.05
//**********************************************************//
BYTE SPI_Write_Buf(BYTE reg, BYTE *pBuf, BYTE bytes)
{
BYTE status,byte_ctr;
CSN_Pin(0); // Set CSN low, init SPI tranaction
status = SPI_RW(reg); // Select register to write to and read status byte
for(byte_ctr=0; byte_ctr<bytes; byte_ctr++) // then write all byte in buffer(*pBuf)
SPI_RW(*pBuf++);
CSN_Pin(1); // Set CSN high again
return(status); // return nRF24L01 status byte
}
//**********************************************************//
//
// Function: SPI_Read_Buf
//
// Description:
// Reads 'bytes' #of bytes from register 'reg'
// Typically used to read RX payload, Rx/Tx address
//
//
// In/Out parameters:
// In: 'reg', register to read from, '*pBuf' are buffer
// the read bytes are stored to and 'bytes' are #of bytes
// to read.
// Out: return nRF24L01 status byte.
//
// Author: RSK Date: 28.11.05
//**********************************************************//
BYTE SPI_Read_Buf(BYTE reg, BYTE *pBuf, BYTE bytes)
{
BYTE status,byte_ctr;
CSN_Pin(0); // Set CSN low, init SPI tranaction
status = SPI_RW(reg); // Select register to write to and read status byte
for(byte_ctr=0;byte_ctr<bytes;byte_ctr++)
pBuf[byte_ctr] = SPI_RW(0); // Perform SPI_RW to read byte from nRF24L01
CSN_Pin(1); // Set CSN high again
return(status); // return nRF24L01 status byte
}
//-----------------------------------------------------------------------------
// Clear nRF24L01 IRQ flag(s)
//-----------------------------------------------------------------------------
BYTE L01_Clear_IRQ(BYTE irq_flag)
{
return SPI_RW_Reg(WRITE_REG + STATUS, irq_flag);
}
//-----------------------------------------------------------------------------
// Flush TX FIFO
//-----------------------------------------------------------------------------
void L01_Flush_TX(void)
{
//do
//{
SPI_RW_Reg(FLUSH_TX,0);
//}while((SPI_Read(FIFO_STATUS) & MASK_TX_EMPTY) == 0);
}
//-----------------------------------------------------------------------------
// Flush RX FIFO
//-----------------------------------------------------------------------------
void L01_Flush_RX(void)
{
//do
//{
SPI_RW_Reg(FLUSH_RX,0);
//}while((SPI_Read(FIFO_STATUS) & MASK_RX_EMPTY) == 0);
}
//-----------------------------------------------------------------------------
// Set 24L01 power down/on
//-----------------------------------------------------------------------------
void L01_RF_POW(BYTE on_off)
{
BYTE temp;
CE_Pin(CE_LOW);
L01_Flush_TX();
L01_Flush_RX();
L01_Clear_IRQ(MASK_IRQ_FLAGS);
temp = SPI_Read(CONFIG)&0xfd; //CONFIG reg bit1 is rf power flag bit
if((on_off == RF_POW_ON)||(on_off == RF_POW_OFF))
{
temp |= on_off;
SPI_RW_Reg(WRITE_REG + CONFIG, temp);
}
}
//-----------------------------------------------------------------------------
//switch PTX/PRX
//-----------------------------------------------------------------------------
void L01_RxTx_SW(BYTE bMode)
{
BYTE bRTM;
CE_Pin(CE_LOW);
L01_Flush_RX(); //set TX/RX FIFO to be empty
L01_Flush_TX(); //
L01_Clear_IRQ(MASK_IRQ_FLAGS); //clear IRQ STATUS register
bRTM = SPI_Read(CONFIG);
if(bMode == PRX)
{
if((bRTM&0x01))
{
return;
}
bRTM &= 0xfe;
bRTM |= 0x01;
SPI_RW_Reg(WRITE_REG + CONFIG, bRTM);
CE_Pin(CE_HIGH);
}
else if(bMode == PTX)
{
if(!(bRTM&0x01))
{
return;
}
bRTM &= 0xfe;
SPI_RW_Reg(WRITE_REG + CONFIG, bRTM);
}
}
//-----------------------------------------------------------------------------
// Used in TX mode.
//-----------------------------------------------------------------------------
void L01_TX(BYTE *ptx_buf,BYTE length)
{
L01_RxTx_SW(PTX);
L01_Flush_TX(); //clear 24L01 tx buffer
SPI_Write_Buf(WR_TX_PLOAD, ptx_buf, length);
CE_Pin(CE_PULSE);
}
//-----------------------------------------------------------------------------
// Reuse last sent payload. Packets will be repeatedly resent
// as long as CE is high
//-----------------------------------------------------------------------------
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -