rf24l01_drv.h

AVR单片机驱动程序源代码_RF24L01

//-----------------------------------------------------------------------------
// RF24L01_Drv.h
//-----------------------------------------------------------------------------
#ifndef RF24L01Drv_H
#define RF24L01Drv_H


//---------------------------------------------------------------------------
// 端口定义
//---------------------------------------------------------------------------

//typedef unsigned char BYTE;
typedef unsigned short SHORT;

//---------------------------------------------------------------------------
// Define pins to drive spi port of nrf24l01
#define NB_IRQ      0x00
#define NB_MISO     0x01
#define NB_MOSI     0x02
#define NB_SCK      0x03
#define NB_CSN      0x04
#define NB_CE       0x05
#define NB_PIN6     0x06
#define NB_PIN7     0x07

#define MASK_IRQ    0x01
#define MASK_MISO   0x02
#define MASK_MOSI   0x04
#define MASK_SCK    0x08
#define MASK_CSN    0x10
#define MASK_CE     0x20
#define MASK_PIN6   0x40
#define MASK_PIN7   0x80

//---------------------------------------------------------------------------
// CE_Action definitions
#define CE_LOW      0x00
#define CE_HIGH     0x01
#define CE_PULSE    0x02

//---------------------------------------------------------------------------
// Declare SW/HW SPI modes
#define SW_MODE     0x00
#define HW_MODE     0x01

//---------------------------------------------------------------------------
// Define nRF2401 RF Power switch
#define RF_POW_ON   0x02
#define RF_POW_OFF  0x00  

//---------------------------------------------------------------------------
// Define nRF24L01 interrupt flag's
#define IDLE            0x00  // Idle, no interrupt pending
#define MAX_RT          0x10  // Max #of TX retrans interrupt
#define TX_DS           0x20  // TX data sent interrupt
#define RX_DR           0x40  // RX data received

//---------------------------------------------------------------------------
// SPI(nRF24L01) commands
#define READ_REG        0x00  // Define read command to register
#define WRITE_REG       0x20  // Define write command to register
#define RD_RX_PLOAD     0x61  // Define RX payload register address
#define WR_TX_PLOAD     0xA0  // Define TX payload register address
#define FLUSH_TX        0xE1  // Define flush TX register command
#define FLUSH_RX        0xE2  // Define flush RX register command
#define REUSE_TX_PL     0xE3  // Define reuse TX payload register command
#define NOP             0xFF  // Define No Operation, might be used to read status register

//---------------------------------------------------------------------------
// SPI(nRF24L01) registers(addresses)
#define CONFIG          0x00  // 'Config' register address
#define EN_AA           0x01  // 'Enable Auto Acknowledgment' register address
#define EN_RXADDR       0x02  // 'Enabled RX addresses' register address
#define SETUP_AW        0x03  // 'Setup address width' register address
#define SETUP_RETR      0x04  // 'Setup Auto. Retrans' register address
#define RF_CH           0x05  // 'RF channel' register address
#define RF_SETUP        0x06  // 'RF setup' register address
#define STATUS          0x07  // 'Status' register address
#define OBSERVE_TX      0x08  // 'Observe TX' register address
#define CD              0x09  // 'Carrier Detect' register address
#define RX_ADDR_P0      0x0A  // 'RX address pipe0' register address
#define RX_ADDR_P1      0x0B  // 'RX address pipe1' register address
#define RX_ADDR_P2      0x0C  // 'RX address pipe2' register address
#define RX_ADDR_P3      0x0D  // 'RX address pipe3' register address
#define RX_ADDR_P4      0x0E  // 'RX address pipe4' register address
#define RX_ADDR_P5      0x0F  // 'RX address pipe5' register address
#define TX_ADDR         0x10  // 'TX address' register address
#define RX_PW_P0        0x11  // 'RX payload width, pipe0' register address
#define RX_PW_P1        0x12  // 'RX payload width, pipe1' register address
#define RX_PW_P2        0x13  // 'RX payload width, pipe2' register address
#define RX_PW_P3        0x14  // 'RX payload width, pipe3' register address
#define RX_PW_P4        0x15  // 'RX payload width, pipe4' register address
#define RX_PW_P5        0x16  // 'RX payload width, pipe5' register address
#define FIFO_STATUS     0x17  // 'FIFO Status Register' register address

//---------------------------------------------------------------------------
//define 24L01 Transmit mode
#define PTX                 0x00
#define PRX                 0x01
       
#define TX_MODE             0x00
#define RX_MODE             0x01
    
//---------------------------------------------------------------------------
// Define nRF24L01 interrupt flag's
#define IDLE            0x00  // Idle, no interrupt pending
#define MAX_RT          0x10  // Max #of TX retrans interrupt
#define TX_DS           0x20  // TX data sent interrupt
#define RX_DR           0x40  // RX data received

//---------------------------------------------------------------------------
//
// 确认包
//
//---------------------------------------------------------------------------
#define ACK_TX_Fail   1
#define Ack_TX_OK     2 
  
#define Ack_Cfg_OK    0xf0
#define Ack_Cfg_Fail  0xff
 
//---------------------------------------------------------------------------
// define 24L01 data rate
#define DATA_RATE_1M        0x00
#define DATA_RATE_2M        0x08

#define RX_P_NO             0x0e

#define MASK_IRQ_FLAGS      0x70
#define MASK_RX_DR_FLAG     0x40
#define MASK_TX_DS_FLAG     0x20
#define MASK_MAX_RT_FLAG    0x10

#define PIPE0               0x00
#define PIPE1               0x01
#define PIPE2               0x02
#define PIPE3               0x03
#define PIPE4               0x04
#define PIPE5               0x05

//---------------------------------------------------------------------------
//FIFO_STATUS
#define MASK_TX_EMPTY		0x10
#define MASK_RX_FULL		0x02
#define MASK_RX_EMPTY		0x01
//---------------------------------------------------------------------------
//24L01 work mode
#define Dev_Close          0
#define Dev_Normal         1
#define Dev_TX             2    
#define Dev_AutoTx         3  
#define Dev_RT             4
//--
//---------------------------------------------------------------------------
// nRF24L01 config message struct 
typedef struct _L01_CFG{
	BYTE config;    //'comm config' default value:0000 1000                
		         	//bit7 must be 0;
			 		//bit6,0--enable,RX interrupt enable,IRQ pin active low  
			 		//bit5,0--enable TX Succeed interrupt enable,IRQ pin active low
			 //bit4,0--eanble TX time over interrupt enable,IRQ pin active low
			 //bit3,CRC enable,if EN_AA be set,this bit will be forced to high
			 //bit2,CRC width,0--one byte,1--two bytes
			 //bit1,RF POWER ON/OFF,1--ON, 0--OFF
			 //bit0,transmmit mode: 1--PTX,0--PRX 
			 
	BYTE ee_aa;      //'Enable Auto Acknowledgment'default value:0011 1111
			 // bit76 must be 00;
			 // bit 5-0 response to Pip5-0; bit: 1-en, 0-disen 
			 
	BYTE en_rxaddr;  //'Enabled RX addresses', default 0000 0011
			 //bit76 must be 00;
			 //bit 5-0 response to Pip5-0, bit: 1-en, 0-disen  
			 
	BYTE setup_aw;   //'address width',default 0000 0011
			 //bit765432 must be 000000;
			 //bit10,value must be 1~3, 1--3Bytes width,2--4Bytes,3--5Bytes 
			 
	BYTE setup_retr; //'Auto. Retransmite delay time and count', default 0000 0011
	                 //delay time(bit7~3):(bit7~3+1)*250+86us; 
	                 //retran count(bit2~0):0--disenable retran,otherwise 1~15 times
	                  
	BYTE rf_ch;      //'rf frequency channel' 2400+rf_ch,default:0000 0010 
		         // bit7 must be 0
		         // bit6~0 rf frequency channel,one step deputy 1MHZ
		         // we use frequency at less than 2.49GHZ,beause WLAN use frequency band 2.4G~2.4835Ghz
		         // we choice rf_ch = 100; thats 2.5GHZ
		          	
	BYTE rf_setup;   //'RF setup' default 0000 1111
			 // bit7~4 must be 00000 
			 // bit 3 data rate :0--1Mbps,1--2Mbps; 
	                 // bit 2~1 rf power:00,-18dbm,,01,-12dbm,,10,-6dbm,,11,0dbm
	                 // bit 0 must be 1   
	                 
	BYTE rx_addr_p0[5]; //pipe0 rx address buf, 
	
	BYTE rx_pw_p0;	    //'pipe0 rx payload width' 0000 0000   
			    //bit76 must be 00
			    //bit5~0,at less than must be one byte
			    //the most width is 32 bytes  
			    
	BYTE tx_addr[5];    //tx address buf
	BYTE tx_pw;          //tx payload width;at less than must be one byte;
	BYTE addr_width;    //rx/tx respond to setup_aw           
}L01_CFG;

//---------------------------------------------------------------------------
// extern functions
//---------------------------------------------------------------------------

void Wait10Us(void);
void GPIOInit(void);
void GPIO_Set(BYTE NB,BYTE state);

void CE_Pin(BYTE action);
void CSN_Pin(BYTE state);
void SCK_Pin(BYTE state);
void MOSI_Pin(BYTE state);
BYTE MISO_Pin(void);
BYTE IRQ_Pin(void);

BYTE Set_L01_Init(DataRF_Control *drc);

void L01_TX(BYTE *ptx_buf,BYTE length);
void L01_RX(BYTE *prx_buf,BYTE length);
void L01_RTX_LastFrame(void);
void L01_RxTx_SW(BYTE bMode);
BYTE L01_Polling_IRQ(BYTE * rev_buf,BYTE length);

//void L01_Set_Channel(BYTE rf_base,BYTE rf_ch);
//void L01_Set_Addr(BYTE * addr,BYTE lenth);
//void L01_Set_Tx_Power(BYTE bTxPower/*0-3*/);
//void L01_Set_RT_Count(BYTE bRtCount);
//void L01_Set_RT_Delay(BYTE bRtDelay);
void L01_RF_POW(BYTE on_off);// RF_POW_ON,RF_POW_OFF


void RFTest(void);

#endif