📄 arm_cm4.lst
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\ 0000002A 94FBF2F3 SDIV R3,R4,R2
\ 0000002E 03FB1243 MLS R3,R3,R2,R4
\ 00000032 9940 LSLS R1,R1,R3
\ 00000034 0843 ORRS R0,R1,R0
\ 00000036 .... LDR.N R1,??DataTable9_2 ;; 0xe000e280
\ 00000038 0860 STR R0,[R1, #+0]
94 NVICISER0 |= 1 << (irq%32);
\ 0000003A .... LDR.N R0,??DataTable9_3 ;; 0xe000e100
\ 0000003C 0068 LDR R0,[R0, #+0]
\ 0000003E 0121 MOVS R1,#+1
\ 00000040 2022 MOVS R2,#+32
\ 00000042 94FBF2F3 SDIV R3,R4,R2
\ 00000046 03FB1243 MLS R3,R3,R2,R4
\ 0000004A 9940 LSLS R1,R1,R3
\ 0000004C 0843 ORRS R0,R1,R0
\ 0000004E .... LDR.N R1,??DataTable9_3 ;; 0xe000e100
\ 00000050 0860 STR R0,[R1, #+0]
95 break;
\ 00000052 30E0 B.N ??enable_irq_4
96 case 0x1:
97 NVICICPR1 |= 1 << (irq%32);
\ ??enable_irq_3:
\ 00000054 .... LDR.N R0,??DataTable9_4 ;; 0xe000e284
\ 00000056 0068 LDR R0,[R0, #+0]
\ 00000058 0121 MOVS R1,#+1
\ 0000005A 2022 MOVS R2,#+32
\ 0000005C 94FBF2F3 SDIV R3,R4,R2
\ 00000060 03FB1243 MLS R3,R3,R2,R4
\ 00000064 9940 LSLS R1,R1,R3
\ 00000066 0843 ORRS R0,R1,R0
\ 00000068 .... LDR.N R1,??DataTable9_4 ;; 0xe000e284
\ 0000006A 0860 STR R0,[R1, #+0]
98 NVICISER1 |= 1 << (irq%32);
\ 0000006C .... LDR.N R0,??DataTable9_5 ;; 0xe000e104
\ 0000006E 0068 LDR R0,[R0, #+0]
\ 00000070 0121 MOVS R1,#+1
\ 00000072 2022 MOVS R2,#+32
\ 00000074 94FBF2F3 SDIV R3,R4,R2
\ 00000078 03FB1243 MLS R3,R3,R2,R4
\ 0000007C 9940 LSLS R1,R1,R3
\ 0000007E 0843 ORRS R0,R1,R0
\ 00000080 .... LDR.N R1,??DataTable9_5 ;; 0xe000e104
\ 00000082 0860 STR R0,[R1, #+0]
99 break;
\ 00000084 17E0 B.N ??enable_irq_4
100 case 0x2:
101 NVICICPR2 |= 1 << (irq%32);
\ ??enable_irq_2:
\ 00000086 .... LDR.N R0,??DataTable9_6 ;; 0xe000e288
\ 00000088 0068 LDR R0,[R0, #+0]
\ 0000008A 0121 MOVS R1,#+1
\ 0000008C 2022 MOVS R2,#+32
\ 0000008E 94FBF2F3 SDIV R3,R4,R2
\ 00000092 03FB1243 MLS R3,R3,R2,R4
\ 00000096 9940 LSLS R1,R1,R3
\ 00000098 0843 ORRS R0,R1,R0
\ 0000009A .... LDR.N R1,??DataTable9_6 ;; 0xe000e288
\ 0000009C 0860 STR R0,[R1, #+0]
102 NVICISER2 |= 1 << (irq%32);
\ 0000009E .... LDR.N R0,??DataTable9_7 ;; 0xe000e108
\ 000000A0 0068 LDR R0,[R0, #+0]
\ 000000A2 0121 MOVS R1,#+1
\ 000000A4 2022 MOVS R2,#+32
\ 000000A6 94FBF2F3 SDIV R3,R4,R2
\ 000000AA 03FB1243 MLS R3,R3,R2,R4
\ 000000AE 9940 LSLS R1,R1,R3
\ 000000B0 0843 ORRS R0,R1,R0
\ 000000B2 .... LDR.N R1,??DataTable9_7 ;; 0xe000e108
\ 000000B4 0860 STR R0,[R1, #+0]
103 break;
104 }
105 }
\ ??enable_irq_4:
\ 000000B6 10BD POP {R4,PC} ;; return
106 /***********************************************************************/
107 /*
108 * Initialize the NVIC to disable the specified IRQ.
109 *
110 * NOTE: The function only initializes the NVIC to disable a single IRQ.
111 * If you want to disable all interrupts, then use the DisableInterrupts
112 * macro instead.
113 *
114 * Parameters:
115 * irq irq number to be disabled (the irq number NOT the vector number)
116 */
117
\ In section .text, align 2, keep-with-next
118 void disable_irq (int irq)
119 {
\ disable_irq:
\ 00000000 10B5 PUSH {R4,LR}
\ 00000002 0400 MOVS R4,R0
120 int div;
121
122 /* Make sure that the IRQ is an allowable number. Right now up to 91 is
123 * used.
124 */
125 if (irq > 91)
\ 00000004 5C2C CMP R4,#+92
\ 00000006 03DB BLT.N ??disable_irq_0
126 printf("\nERR! Invalid IRQ value passed to disable irq function!\n");
\ 00000008 ........ ADR.W R0,`?<Constant "\\nERR! Invalid IRQ val...">_1`
\ 0000000C ........ BL printf
127
128 /* Determine which of the NVICICERs corresponds to the irq */
129 div = irq/32;
\ ??disable_irq_0:
\ 00000010 2020 MOVS R0,#+32
\ 00000012 94FBF0F0 SDIV R0,R4,R0
130
131 switch (div)
\ 00000016 0028 CMP R0,#+0
\ 00000018 03D0 BEQ.N ??disable_irq_1
\ 0000001A 0228 CMP R0,#+2
\ 0000001C 1BD0 BEQ.N ??disable_irq_2
\ 0000001E 0DD3 BCC.N ??disable_irq_3
\ 00000020 25E0 B.N ??disable_irq_4
132 {
133 case 0x0:
134 NVICICER0 |= 1 << (irq%32);
\ ??disable_irq_1:
\ 00000022 .... LDR.N R0,??DataTable9_8 ;; 0xe000e180
\ 00000024 0068 LDR R0,[R0, #+0]
\ 00000026 0121 MOVS R1,#+1
\ 00000028 2022 MOVS R2,#+32
\ 0000002A 94FBF2F3 SDIV R3,R4,R2
\ 0000002E 03FB1243 MLS R3,R3,R2,R4
\ 00000032 9940 LSLS R1,R1,R3
\ 00000034 0843 ORRS R0,R1,R0
\ 00000036 .... LDR.N R1,??DataTable9_8 ;; 0xe000e180
\ 00000038 0860 STR R0,[R1, #+0]
135 break;
\ 0000003A 18E0 B.N ??disable_irq_4
136 case 0x1:
137 NVICICER1 |= 1 << (irq%32);
\ ??disable_irq_3:
\ 0000003C .... LDR.N R0,??DataTable9_9 ;; 0xe000e184
\ 0000003E 0068 LDR R0,[R0, #+0]
\ 00000040 0121 MOVS R1,#+1
\ 00000042 2022 MOVS R2,#+32
\ 00000044 94FBF2F3 SDIV R3,R4,R2
\ 00000048 03FB1243 MLS R3,R3,R2,R4
\ 0000004C 9940 LSLS R1,R1,R3
\ 0000004E 0843 ORRS R0,R1,R0
\ 00000050 .... LDR.N R1,??DataTable9_9 ;; 0xe000e184
\ 00000052 0860 STR R0,[R1, #+0]
138 break;
\ 00000054 0BE0 B.N ??disable_irq_4
139 case 0x2:
140 NVICICER2 |= 1 << (irq%32);
\ ??disable_irq_2:
\ 00000056 .... LDR.N R0,??DataTable9_10 ;; 0xe000e188
\ 00000058 0068 LDR R0,[R0, #+0]
\ 0000005A 0121 MOVS R1,#+1
\ 0000005C 2022 MOVS R2,#+32
\ 0000005E 94FBF2F3 SDIV R3,R4,R2
\ 00000062 03FB1243 MLS R3,R3,R2,R4
\ 00000066 9940 LSLS R1,R1,R3
\ 00000068 0843 ORRS R0,R1,R0
\ 0000006A .... LDR.N R1,??DataTable9_10 ;; 0xe000e188
\ 0000006C 0860 STR R0,[R1, #+0]
141 break;
142 }
143 }
\ ??disable_irq_4:
\ 0000006E 10BD POP {R4,PC} ;; return
144 /***********************************************************************/
145 /*
146 * Initialize the NVIC to set specified IRQ priority.
147 *
148 * NOTE: The function only initializes the NVIC to set a single IRQ priority.
149 * Interrupts will also need to be enabled in the ARM core. This can be
150 * done using the EnableInterrupts macro.
151 *
152 * Parameters:
153 * irq irq number to be enabled (the irq number NOT the vector number)
154 * prio irq priority. 0-15 levels. 0 max priority
155 */
156
\ In section .text, align 2, keep-with-next
157 void set_irq_priority (int irq, int prio)
158 {
\ set_irq_priority:
\ 00000000 38B5 PUSH {R3-R5,LR}
\ 00000002 0400 MOVS R4,R0
\ 00000004 0D00 MOVS R5,R1
159 /*irq priority pointer*/
160 uint8 *prio_reg;
161
162 /* Make sure that the IRQ is an allowable number. Right now up to 91 is
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