📄 arm_cm4.lst
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###############################################################################
# #
# IAR ANSI C/C++ Compiler V6.10.1.52143/W32 for ARM 16/Apr/2011 16:44:05 #
# Copyright 1999-2010 IAR Systems AB. #
# #
# Cpu mode = thumb #
# Endian = little #
# Source file = E:\Project\15_K60\03_Software\02_My #
# program\K60_IAR\01_light\src\cpu\arm_cm4.c #
# Command line = "E:\Project\15_K60\03_Software\02_My #
# program\K60_IAR\01_light\src\cpu\arm_cm4.c" -D IAR -D #
# TWR_K60N512 -lCN "E:\Project\15_K60\03_Software\02_My #
# program\K60_IAR\01_light\bin\Flash\List\" -lB #
# "E:\Project\15_K60\03_Software\02_My #
# program\K60_IAR\01_light\bin\Flash\List\" -o #
# "E:\Project\15_K60\03_Software\02_My #
# program\K60_IAR\01_light\bin\Flash\Obj\" --no_cse #
# --no_unroll --no_inline --no_code_motion --no_tbaa #
# --no_clustering --no_scheduling --debug --endian=little #
# --cpu=Cortex-M4 -e --fpu=None --dlib_config #
# D:\iar\arm\INC\c\DLib_Config_Normal.h -I #
# "E:\Project\15_K60\03_Software\02_My #
# program\K60_IAR\01_light\src\common\" -I #
# "E:\Project\15_K60\03_Software\02_My #
# program\K60_IAR\01_light\src\cpu\" -I #
# "E:\Project\15_K60\03_Software\02_My #
# program\K60_IAR\01_light\src\cpu\headers\" -I #
# "E:\Project\15_K60\03_Software\02_My #
# program\K60_IAR\01_light\src\drivers\" -I #
# "E:\Project\15_K60\03_Software\02_My #
# program\K60_IAR\01_light\src\drivers\uart\" -I #
# "E:\Project\15_K60\03_Software\02_My #
# program\K60_IAR\01_light\src\drivers\gpio\" -I #
# "E:\Project\15_K60\03_Software\02_My #
# program\K60_IAR\01_light\src\drivers\mcg\" -I #
# "E:\Project\15_K60\03_Software\02_My #
# program\K60_IAR\01_light\src\drivers\wdog\" -I #
# "E:\Project\15_K60\03_Software\02_My #
# program\K60_IAR\01_light\src\projects\" -I #
# "E:\Project\15_K60\03_Software\02_My #
# program\K60_IAR\01_light\src\" -Ol --use_c++_inline #
# List file = E:\Project\15_K60\03_Software\02_My #
# program\K60_IAR\01_light\bin\Flash\List\arm_cm4.lst #
# Object file = E:\Project\15_K60\03_Software\02_My #
# program\K60_IAR\01_light\bin\Flash\Obj\arm_cm4.o #
# #
# #
###############################################################################
E:\Project\15_K60\03_Software\02_My program\K60_IAR\01_light\src\cpu\arm_cm4.c
1 /*
2 * File: arm_cm4.c
3 * Purpose: Generic high-level routines for ARM Cortex M4 processors
4 *
5 * Notes:
6 */
7
8 #include "common.h"
9
10 /***********************************************************************/
11 /*
12 * Configures the ARM system control register for STOP (deep sleep) mode
13 * and then executes the WFI instruction to enter the mode.
14 *
15 * Parameters:
16 * none
17 *
18 * Note: Might want to change this later to allow for passing in a parameter
19 * to optionally set the sleep on exit bit.
20 */
21
\ In section .text, align 4, keep-with-next
22 void stop (void)
23 {
24 /* Set the SLEEPDEEP bit to enable deep sleep mode (STOP) */
25 SCB_SCR |= SCB_SCR_SLEEPDEEP_MASK;
\ stop:
\ 00000000 .... LDR.N R0,??DataTable9 ;; 0xe000ed10
\ 00000002 0068 LDR R0,[R0, #+0]
\ 00000004 50F00400 ORRS R0,R0,#0x4
\ 00000008 .... LDR.N R1,??DataTable9 ;; 0xe000ed10
\ 0000000A 0860 STR R0,[R1, #+0]
26
27 /* WFI instruction will start entry into STOP mode */
28 asm("WFI");
\ 0000000C 30BF WFI
29 }
\ 0000000E 7047 BX LR ;; return
30 /***********************************************************************/
31 /*
32 * Configures the ARM system control register for WAIT (sleep) mode
33 * and then executes the WFI instruction to enter the mode.
34 *
35 * Parameters:
36 * none
37 *
38 * Note: Might want to change this later to allow for passing in a parameter
39 * to optionally set the sleep on exit bit.
40 */
41
\ In section .text, align 4, keep-with-next
42 void wait (void)
43 {
44 /* Clear the SLEEPDEEP bit to make sure we go into WAIT (sleep) mode instead
45 * of deep sleep.
46 */
47 SCB_SCR &= ~SCB_SCR_SLEEPDEEP_MASK;
\ wait:
\ 00000000 .... LDR.N R0,??DataTable9 ;; 0xe000ed10
\ 00000002 0068 LDR R0,[R0, #+0]
\ 00000004 30F00400 BICS R0,R0,#0x4
\ 00000008 .... LDR.N R1,??DataTable9 ;; 0xe000ed10
\ 0000000A 0860 STR R0,[R1, #+0]
48
49 /* WFI instruction will start entry into WAIT mode */
50 asm("WFI");
\ 0000000C 30BF WFI
51 }
\ 0000000E 7047 BX LR ;; return
52 /***********************************************************************/
53 /*
54 * Change the value of the vector table offset register to the specified value.
55 *
56 * Parameters:
57 * vtor new value to write to the VTOR
58 */
59
\ In section .text, align 2, keep-with-next
60 void write_vtor (int vtor)
61 {
62 /* Write the VTOR with the new value */
63 SCB_VTOR = vtor;
\ write_vtor:
\ 00000000 .... LDR.N R1,??DataTable9_1 ;; 0xe000ed08
\ 00000002 0860 STR R0,[R1, #+0]
64 }
\ 00000004 7047 BX LR ;; return
65 /***********************************************************************/
66 /*
67 * Initialize the NVIC to enable the specified IRQ.
68 *
69 * NOTE: The function only initializes the NVIC to enable a single IRQ.
70 * Interrupts will also need to be enabled in the ARM core. This can be
71 * done using the EnableInterrupts macro.
72 *
73 * Parameters:
74 * irq irq number to be enabled (the irq number NOT the vector number)
75 */
76
\ In section .text, align 2, keep-with-next
77 void enable_irq (int irq)
78 {
\ enable_irq:
\ 00000000 10B5 PUSH {R4,LR}
\ 00000002 0400 MOVS R4,R0
79 int div;
80
81 /* Make sure that the IRQ is an allowable number. Right now up to 91 is
82 * used.
83 */
84 if (irq > 91)
\ 00000004 5C2C CMP R4,#+92
\ 00000006 03DB BLT.N ??enable_irq_0
85 printf("\nERR! Invalid IRQ value passed to enable irq function!\n");
\ 00000008 ........ ADR.W R0,`?<Constant "\\nERR! Invalid IRQ val...">`
\ 0000000C ........ BL printf
86
87 /* Determine which of the NVICISERs corresponds to the irq */
88 div = irq/32;
\ ??enable_irq_0:
\ 00000010 2020 MOVS R0,#+32
\ 00000012 94FBF0F0 SDIV R0,R4,R0
89
90 switch (div)
\ 00000016 0028 CMP R0,#+0
\ 00000018 03D0 BEQ.N ??enable_irq_1
\ 0000001A 0228 CMP R0,#+2
\ 0000001C 33D0 BEQ.N ??enable_irq_2
\ 0000001E 19D3 BCC.N ??enable_irq_3
\ 00000020 49E0 B.N ??enable_irq_4
91 {
92 case 0x0:
93 NVICICPR0 |= 1 << (irq%32);
\ ??enable_irq_1:
\ 00000022 .... LDR.N R0,??DataTable9_2 ;; 0xe000e280
\ 00000024 0068 LDR R0,[R0, #+0]
\ 00000026 0121 MOVS R1,#+1
\ 00000028 2022 MOVS R2,#+32
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