lpc11xx_syscon.c

基于MDK的LPC1100处理器开发应用例程

/***********************************************************************//**
 * @file	: lpc11xx_syscon.c
 * @brief	: Contains all functions support for SYSCON firmware library on LPC11xx
 * @version	: 1.0
 * @date	: 20. Jan. 2010
 * @author	: Coocox
 **********************************************************************/

/* Peripheral group ----------------------------------------------------------- */
/** @addtogroup SYSCON
 * @{
 */

/* Includes ------------------------------------------------------------------- */
#include "lpc11xx_syscon.h"
#include "lpc11xx_libcfg.h"


#if _SYSCON


/* Public Functions ---------------------------------------------------------- */
/** @defgroup SYSCON_Public_Functions
 * @{
 */

/*********************************************************************//**
 * @brief 		Sets remap mode, selects whether the ARM interrupt vectors 
 *              are read from the boot ROM, the flash, or the SRAM
 * @param[in]	MapMode	remap mode, should be one of the following:
 *              - MAP_BootLoader_MODE : Interrupt vectors are re-mapped 
 *                                      to Boot ROM
 *              - MAP_RAM_MODE        : Interrupt vectors are re-mapped 
 *                                      to Static RAM
 *              - MAP_FLASH_MODE      : Interrupt vectors are not re-mapped 
 *                                      and reside in Flash.          
 *
 * @return none
 **********************************************************************/
void SYSCON_MemRemap(uint32_t MapMode)
{
    CHECK_PARAM(PARAM_MapMode(MapMode)); 

    LPC_SYSCON->SYSMEMREMAP = MapMode;
}


/*********************************************************************//**
 * @brief 		Get PLL Lock status
 * @param[in]	None
 * @return  The new state of Lock (SET or RESET)
 **********************************************************************/
FlagStatus SYSCON_GetLockStatus(void)
{
    FlagStatus lockstatus = RESET;

    if (LPC_SYSCON->SYSPLLSTAT & SYSCONF_PLL_LOCK) {
        lockstatus = SET;
    } else {
        lockstatus = RESET;
    }  

    return lockstatus;
}


/*********************************************************************//**
 * @brief 		Select PLL clock source
 * @param[in]	ClkType clock source, it can be:
 *               - SYSCON_PLL_SOURCE_IRC    : IRC oscillator
 *               - SYSCON_PLL_SOURCE_SYSOSC : System oscillator
 *               - SYSCON_PLL_SOURCE_RES    : Reserved
 * @return      None
 **********************************************************************/
void SYSCON_PLLClkSel(uint32_t ClkType)
{
    CHECK_PARAM(PARAM_ClkType(ClkType));    

    LPC_SYSCON->SYSPLLCLKSEL = ClkType;

    //SYSCON_PLLUpdate();
}


/*********************************************************************//**
 * @brief 		Updates the clock source of the system PLL with the new 
 *              input clock after the SYSPLLCLKSEL register has been 
 *              written to. In order for the update to take effect, 
 *              first write a 0, then write 1
 * @param[in]	None
 * @return      None
 **********************************************************************/
void SYSCON_PLLUpdate(void)
{
    LPC_SYSCON->SYSPLLCLKUEN = 1; 
    LPC_SYSCON->SYSPLLCLKUEN = 0; 
    LPC_SYSCON->SYSPLLCLKUEN = 1; 

    while (!(LPC_SYSCON->SYSPLLCLKUEN & 1));
}

/*********************************************************************//**
 * @brief 		Configure PLL multiplier and divider values
 * @param[in]   msel Feedback divider value (msel + 1, 1 - 32)
 *              psel Post divider ratio P   (P * 2), it can be
 *               - SYSCON_PLL_P_1 : P = 1
 *               - SYSCON_PLL_P_2 : P = 2
 *               - SYSCON_PLL_P_4 : P = 4
 *               - SYSCON_PLL_P_8 : P = 8
 * @return      None
 **********************************************************************/
void SYSCON_PLLConfig(uint32_t msel, uint32_t psel) 
{
    uint32_t reg = 0;

    CHECK_PARAM(PARAM_MSEL(msel));
    CHECK_PARAM(PARAM_PSEL(psel));    

    reg = msel - 1;
  
    switch (psel) {
        case SYSCON_PLL_P_1:
            break;
        case SYSCON_PLL_P_2:
            reg |= (uint32_t)1<<6;
            break;
        case SYSCON_PLL_P_4:
            reg |= (uint32_t)2<<6;
            break;
        case SYSCON_PLL_P_8:
            reg |= (uint32_t)3<<6;
            break;
        default: break;
    }
    
    LPC_SYSCON->SYSPLLCTRL = reg;
}


/*********************************************************************//**
 * @brief 	   Reset the SPI or I2C peripherals	
 * @param[in]  Periph it can be	
 *              - SYSCON_RSTPeriph_SSP0 : Reset SSP0
 *              - SYSCON_RSTPeriph_I2C  : Reset I2C                           
 *              - SYSCON_RSTPeriph_SSP1 : Reset SSP1
 *              NewState new state of the specified peripheral, it can be:
 *              - ENABLE  : Resets the peripheral
 *              - DISABLE : Peripheral reset de-asserted
 *
 * @return none
 **********************************************************************/
void SYSCON_PeriphResetCmd(uint32_t Periph, FunctionalState NewState)
{
    if(NewState == ENABLE) {
        LPC_SYSCON->PRESETCTRL &= (~Periph) & 0x7;  
    } else if (NewState == DISABLE) {
        LPC_SYSCON->PRESETCTRL |= Periph & 0x7;          
    }       
}


/*********************************************************************//**
 * @brief 		Configure power supply for each peripheral according to NewState
 * @param[in]	Periph	Type of peripheral used to enable power,
 *     					should be one of the following:
 *              -  SYSCON_AHBPeriph_SYS        : AHB to APB bridge
 *              -  SYSCON_AHBPeriph_ROM	       : ROM
 *              -  SYSCON_AHBPeriph_RAM	       : RAM
 *              -  SYSCON_AHBPeriph_FLASHREG   : Flash register interface
 *              -  SYSCON_AHBPeriph_FLASHARRAY : Flash array access
 *              -  SYSCON_AHBPeriph_I2C        : I2C
 *              -  SYSCON_AHBPeriph_GPIO	   : GPIO
 *              -  SYSCON_AHBPeriph_CT16B0     : 16-bit counter/timer 0
 *              -  SYSCON_AHBPeriph_CT16B1     : 16-bit counter/timer 1
 *              -  SYSCON_AHBPeriph_CT32B0     : 32-bit counter/timer 0
 *              -  SYSCON_AHBPeriph_CT32B1     : 32-bit counter/timer 1
 *              -  SYSCON_AHBPeriph_SSP0       : SSP0
 *              -  SYSCON_AHBPeriph_UART       : UART
 *              -  SYSCON_AHBPeriph_ADC        : ADC
 *              -  SYSCON_AHBPeriph_WDT        : WDT
 *              -  SYSCON_AHBPeriph_IOCON      : IOCON
 *              -  SYSCON_AHBPeriph_SSP1       : SSP1             
 * @param[in]	NewState	New state of Peripheral Power, should be:
 * 				- ENABLE	: Enable power for this peripheral
 * 				- DISABLE	: Disable power for this peripheral
 *
 * @return none
 **********************************************************************/
void SYSCON_AHBPeriphClockCmd(uint32_t Periph, FunctionalState NewState)
{
    if(NewState == DISABLE) {
        LPC_SYSCON->SYSAHBCLKCTRL &= (~Periph) & SYSCON_AHBPeriph_BITMASK;
    } else if (NewState == ENABLE) {
        LPC_SYSCON->SYSAHBCLKCTRL |= Periph & SYSCON_AHBPeriph_BITMASK;    
    }  	
}


/*********************************************************************//**
 * @brief 		 Selects the main system clock source
 * @param[in]	 SYSCON_MCK_source Clock source, it can be:
 *                - SYSCON_MCK_IRC      : IRC oscillator
 *                - SYSCON_MCK_PLLINPUT : Input clock to system PLL
 *                - SYSCON_MCK_WDTOSC   : WDT oscillator
 *                - SYSCON_MCK_PLL      : System PLL clock out 
 * @return none
 **********************************************************************/
void SYSCON_MCKSel(uint32_t SYSCON_MCK_source) 
{
    CHECK_PARAM(PARAM_MCKSEL(SYSCON_MCK_source));    
    
    LPC_SYSCON->MAINCLKSEL = SYSCON_MCK_source;
    
    //SYSCON_MCKUpdate();       
}

/*********************************************************************//**
 * @brief 		 Updates the clock source of the main clock with the new 
 *               input clock
 * @param[in]	 None
 * @return       None
 **********************************************************************/
void SYSCON_MCKUpdate (void)
{
    LPC_SYSCON->MAINCLKUEN = 1;                 
    LPC_SYSCON->MAINCLKUEN = 0;
    LPC_SYSCON->MAINCLKUEN = 1;

    /* Wait until updated */
    while (!(LPC_SYSCON->MAINCLKUEN & 1));
}


/*********************************************************************//**
 * @brief 		Divides the main clock to provide the system clock to 
 *              the core, memories, and the peripherals. The system clock 
 *              can be shut down completely by setting the DivVal to 0x0.
 * @param[in]	DivVal	Value of divider           
 *
 * @return none
 **********************************************************************/
void SYSCON_SetAHBClockDiv(uint32_t DivVal) 
{
    CHECK_PARAM(PARAM_DIVVAL(DivVal));  
    
    LPC_SYSCON->SYSAHBCLKDIV = DivVal;
}

/*********************************************************************//**
 * @brief 		Configures the SPI0 peripheral clock SPI0_PCLK. The 
 *              SPI0_PCLK can be shut down by setting the DIV bits to 0x0.
 * @param[in]	DivVal	Value of divider           
 *
 * @return none
 **********************************************************************/
void SYSCON_SetSPI0ClockDiv(uint32_t DivVal)
{
    CHECK_PARAM(PARAM_DIVVAL(DivVal));
    LPC_SYSCON->SSP0CLKDIV = DivVal;
}


/*********************************************************************//**
 * @brief 		Configures the SPI1 peripheral clock SPI10_PCLK. The 
 *              SPI10_PCLK can be shut down by setting the DivVal to 0x0.
 * @param[in]	DivVal	Value of divider           
 *
 * @return none
 **********************************************************************/
void SYSCON_SetSPI1ClockDiv(uint32_t DivVal)
{
    CHECK_PARAM(PARAM_DIVVAL(DivVal));
    LPC_SYSCON->SSP1CLKDIV = DivVal;
}

/*********************************************************************//**
 * @brief 		Configures the UART peripheral clock UART_PCLK. The 
 *              UART_PCLK can be shut down by setting the DivVal to 0x0.
 * @param[in]	DivVal	Value of divider           
 *
 * @return none
 **********************************************************************/
void SYSCON_SetUARTClockDiv(uint32_t DivVal)
{
    CHECK_PARAM(PARAM_DIVVAL(DivVal));
    LPC_SYSCON->UARTCLKDIV = DivVal;
}


/*********************************************************************//**
 * @brief 		Determines the divider values for the watchdog clock wdt_clk
 * @param[in]	DivVal Value of divider           
 *
 * @return none
 **********************************************************************/
void SYSCON_SetWDTClockDiv(uint32_t DivVal)
{
    CHECK_PARAM(PARAM_DIVVAL(DivVal));
    LPC_SYSCON->WDTCLKDIV = DivVal;