config.h

使用ads1.2编译器

/********************************/
/*     存储器0的配置             */
/********************************/
#define IDCY_0    (0x01)     	  //该域控制着一个存储器组内部的读写访问之间以及访问一个存储器组和访问另一个存储器组之间EMC需要给定的空闲CCLK周期最小数目以避免器件间总线的相互争用空闲CCLK周期数为该域的值加1
#define WST1_0    (0x16<<5)     //该域控制着读访问的长度对Burst ROM的连续读访问除外读访问的长度以CCLK周期来计量其值是该域的值加3
#define RBLE_0    (0x01<<10)     //当存储器组由字节宽度或未按字节区分的器件组成时该位为0这时在读访问时EMC将BLS3:0输出拉高当存储器组由含有字节选择输入的16位和32位宽器件组成时该位为1这时在读访问时EMC将BLS3:0输出拉低
#define WST2_0    (0x01<<11)     //对于SRAM区该域控制着写访问的长度写访问长度由以下几部分组成
#define BUSERR_0  (0x00<<24)     //如果EMC检测到一个大于32位数据访问的AMBA请求时该位被置位这也是惟一一种可知的该位被置位的情况ARM7TDMI-S不会出现这样的请求
#define WPERR_0   (0x00<<25)     //如果试图对一个WP位为1的存储器组进行软件写入操作时该位置位通过写入1将该位清零
#define WP_0      (0x00<<26)     //该位为1时表明存储器组写保护
#define BM_0      (0x00<<27)     //该位为1时表明这是一个Burst ROM区
#define MW_0      (0x00<<28)     //该域控制着存储器组数据总线的宽度008位0116位1032位11保留
#define AT_0      (0x00<<30)     //该域通常写入00

/********************************/
/*     存储器2的配置             */
/********************************/
#define IDCY_2    (0x01)     	  //该域控制着一个存储器组内部的读写访问之间以及访问一个存储器组和访问另一个存储器组之间EMC需要给定的空闲CCLK周期最小数目以避免器件间总线的相互争用空闲CCLK周期数为该域的值加1
#define WST1_2    (0x16<<5)     //该域控制着读访问的长度对Burst ROM的连续读访问除外读访问的长度以CCLK周期来计量其值是该域的值加3
#define RBLE_2    (0x01<<10)     //当存储器组由字节宽度或未按字节区分的器件组成时该位为0这时在读访问时EMC将BLS3:0输出拉高当存储器组由含有字节选择输入的16位和32位宽器件组成时该位为1这时在读访问时EMC将BLS3:0输出拉低
#define WST2_2    (0x01<<11)     //对于SRAM区该域控制着写访问的长度写访问长度由以下几部分组成
#define BUSERR_2  (0x00<<24)     //如果EMC检测到一个大于32位数据访问的AMBA请求时该位被置位这也是惟一一种可知的该位被置位的情况ARM7TDMI-S不会出现这样的请求
#define WPERR_2   (0x00<<25)     //如果试图对一个WP位为1的存储器组进行软件写入操作时该位置位通过写入1将该位清零
#define WP_2      (0x00<<26)     //该位为1时表明存储器组写保护
#define BM_2      (0x00<<27)     //该位为1时表明这是一个Burst ROM区
#define MW_2      (0x00<<28)     //该域控制着存储器组数据总线的宽度008位0116位1032位11保留
#define AT_2      (0x00<<30)     //该域通常写入00
/********************************/
/*     本机的配置             */
/********************************/
#define Fosc            (11059200)                    //晶振频率,10MHz~25MHz，应当与实际一至
#define Fcclk           (Fosc * 5)                  //系统频率55296000，必须为Fosc的整数倍(1~32)，且<=60MHZ
#define Fcco            (Fcclk * 4)                 //CCO频率221184000，必须为Fcclk的2、4、8、16倍，范围为156MHz~320MHz
#define Fpclk           ((Fcclk / 4) * 1 )           //VPB时钟频率13824000，只能为(Fcclk / 4)的1 ~ 4倍
/********************************/
/* PENDING BIT */
//CAUTION:You must clear the pending bit as general special register.
//        it's different way with KS32C6x00 
/********************************/
#define INT_WDT		(0x1)
#define INT_00		(0x1<<1)
#define INT_ICER	(0x1<<2)
#define INT_ICEX	(0x1<<3)
#define INT_TIME0	(0x1<<4)
#define INT_TIME1	(0x1<<5)
#define INT_UART0	(0x1<<6)
#define INT_UART1	(0x1<<7)
#define INT_PWM0	(0x1<<8)
#define INT_IIC		(0x1<<9)
#define INT_SPI		(0x1<<10)
#define INT_X		(0x1<<11)
#define INT_PLL		(0x1<<12)
#define INT_RTC		(0x1<<13)
#define INT_EINT0	(0x1<<14)
#define INT_EINT1	(0x1<<15)
#define INT_EINT2	(0x1<<16)
#define INT_EINT3	(0x1<<17)

/********************************/
/* VIC通道位 */
//
/********************************/
#define VIC_WDT		(0)
#define VIC_00		(1)
#define VIC_ICER	(2)
#define VIC_ICEX	(3)
#define VIC_TIME0	(4)
#define VIC_TIME1	(5)
#define VIC_UART0	(6)
#define VIC_UART1	(7)
#define VIC_PWM0	(8)
#define VIC_IIC		(9)
#define VIC_SPI		(10)
#define VIC_X		(11)
#define VIC_PLL		(12)
#define VIC_RTC		(13)
#define VIC_EINT0	(14)
#define VIC_EINT1	(15)
#define VIC_EINT2	(16)
#define VIC_EINT3	(17)
/* BIT */
#define BIT_0	(0x1)
#define BIT_1	(0x1<<1)
#define BIT_2	(0x1<<2)
#define BIT_3	(0x1<<3)
#define BIT_4	(0x1<<4)
#define BIT_5	(0x1<<5)
#define BIT_6	(0x1<<6)
#define BIT_7	(0x1<<7)
#define BIT_8	(0x1<<8)
#define BIT_9	(0x1<<9)
#define BIT_10	(0x1<<10)
#define BIT_11	(0x1<<11)
#define BIT_12	(0x1<<12)
#define BIT_13	(0x1<<13)
#define BIT_14	(0x1<<14)
#define BIT_15	(0x1<<15)
#define BIT_16	(0x1<<16)
#define BIT_17	(0x1<<17)
#define BIT_18	(0x1<<18)
#define BIT_19	(0x1<<19)
#define BIT_20	(0x1<<20)
#define BIT_21	(0x1<<21)
#define BIT_22	(0x1<<22)
#define BIT_23	(0x1<<23)
#define BIT_24	(0x1<<24)
#define BIT_25	(0x1<<25)
#define BIT_26	(0x1<<26)
#define BIT_27	(0x1<<27)
#define BIT_28	(0x1<<28)
#define BIT_29	(0x1<<29)
#define BIT_30	(0x1<<30)
#define BIT_31	(0x1<<31)
/*
*********************************************************************************************************
*                                              DATA TYPES
*                                         (Compiler Specific)
*********************************************************************************************************
*/

typedef unsigned char  BOOLEAN;
typedef unsigned char  INT8U;                    /* Unsigned  8 bit quantity                           */
typedef signed   char  INT8S;                    /* Signed    8 bit quantity                           */
typedef unsigned short INT16U;                   /* Unsigned 16 bit quantity                           */
typedef signed	 short INT16S;             		 /*  16 bit quantity                           */
typedef unsigned long  INT32U;                   /* Unsigned 32 bit quantity                           */
typedef signed   long  INT32S;                   /* Signed   32 bit quantity                           */
typedef float          FP32;                     /* Single precision floating point                    */
typedef double         FP64;                     /* Double precision floating point                    */

#define BYTE           INT8S                     /* Define data types for backward compatibility ...   */
#define UBYTE          INT8U                     /* ... to uC/OS V1.xx.  Not actually needed for ...   */
#define WORD           INT16S                    /* ... uC/OS-II.                                      */
#define UWORD          INT16U
#define LONG           INT32S
#define ULONG          INT32U