events

跨平台性能调试工具

event:0X0F1 counters:1 um:zero minimum:1000 name:PM_LSU_REJECT_LMQ_FULL_GRP15 : (Group 15 pm_lsu_reject1) LSU reject due to LMQ full or missed data coming
event:0X0F2 counters:2 um:zero minimum:1000 name:PM_FLUSH_IMBAL_GRP15 : (Group 15 pm_lsu_reject1) Flush caused by thread GCT imbalance
event:0X0F3 counters:3 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_SRQ_GRP15 : (Group 15 pm_lsu_reject1) Marked SRQ flushes
event:0X0F4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP15 : (Group 15 pm_lsu_reject1) Instructions completed
event:0X0F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP15 : (Group 15 pm_lsu_reject1) Run cycles

#Group 16 pm_lsu_reject2, LSU rejects due to reload CDF or tag update collision
event:0X100 counters:0 um:zero minimum:1000 name:PM_LSU0_REJECT_RELOAD_CDF_GRP16 : (Group 16 pm_lsu_reject2) LSU0 reject due to reload CDF or tag update collision
event:0X101 counters:1 um:zero minimum:1000 name:PM_LSU1_REJECT_RELOAD_CDF_GRP16 : (Group 16 pm_lsu_reject2) LSU1 reject due to reload CDF or tag update collision
event:0X102 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP16 : (Group 16 pm_lsu_reject2) IOPS instructions completed
event:0X103 counters:3 um:zero minimum:1000 name:PM_L1_WRITE_CYC_GRP16 : (Group 16 pm_lsu_reject2) Cycles writing to instruction L1
event:0X104 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP16 : (Group 16 pm_lsu_reject2) Instructions completed
event:0X105 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP16 : (Group 16 pm_lsu_reject2) Run cycles

#Group 17 pm_lsu_reject3, LSU rejects due to ERAT, held instuctions
event:0X110 counters:0 um:zero minimum:1000 name:PM_LSU0_REJECT_ERAT_MISS_GRP17 : (Group 17 pm_lsu_reject3) LSU0 reject due to ERAT miss
event:0X111 counters:1 um:zero minimum:1000 name:PM_LSU1_REJECT_ERAT_MISS_GRP17 : (Group 17 pm_lsu_reject3) LSU1 reject due to ERAT miss
event:0X112 counters:2 um:zero minimum:1000 name:PM_LWSYNC_HELD_GRP17 : (Group 17 pm_lsu_reject3) LWSYNC held at dispatch
event:0X113 counters:3 um:zero minimum:1000 name:PM_TLBIE_HELD_GRP17 : (Group 17 pm_lsu_reject3) TLBIE held at dispatch
event:0X114 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP17 : (Group 17 pm_lsu_reject3) Instructions completed
event:0X115 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP17 : (Group 17 pm_lsu_reject3) Run cycles

#Group 18 pm_lsu_reject4, LSU0/1 reject LMQ full
event:0X120 counters:0 um:zero minimum:1000 name:PM_LSU0_REJECT_LMQ_FULL_GRP18 : (Group 18 pm_lsu_reject4) LSU0 reject due to LMQ full or missed data coming
event:0X121 counters:1 um:zero minimum:1000 name:PM_LSU1_REJECT_LMQ_FULL_GRP18 : (Group 18 pm_lsu_reject4) LSU1 reject due to LMQ full or missed data coming
event:0X122 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP18 : (Group 18 pm_lsu_reject4) IOPS instructions completed
event:0X123 counters:3 um:zero minimum:1000 name:PM_BR_ISSUED_GRP18 : (Group 18 pm_lsu_reject4) Branches issued
event:0X124 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP18 : (Group 18 pm_lsu_reject4) Instructions completed
event:0X125 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP18 : (Group 18 pm_lsu_reject4) Run cycles

#Group 19 pm_lsu_reject5, LSU misc reject and flush events
event:0X130 counters:0 um:zero minimum:1000 name:PM_LSU_REJECT_SRQ_LHS_GRP19 : (Group 19 pm_lsu_reject5) LSU SRQ rejects
event:0X131 counters:1 um:zero minimum:1000 name:PM_LSU_REJECT_RELOAD_CDF_GRP19 : (Group 19 pm_lsu_reject5) LSU reject due to reload CDF or tag update collision
event:0X132 counters:2 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP19 : (Group 19 pm_lsu_reject5) Flush initiated by LSU
event:0X133 counters:3 um:zero minimum:1000 name:PM_FLUSH_GRP19 : (Group 19 pm_lsu_reject5) Flushes
event:0X134 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP19 : (Group 19 pm_lsu_reject5) Instructions completed
event:0X135 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP19 : (Group 19 pm_lsu_reject5) Run cycles

#Group 20 pm_flush1, Misc flush events
event:0X140 counters:0 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP20 : (Group 20 pm_flush1) IOPS instructions completed
event:0X141 counters:1 um:zero minimum:1000 name:PM_LSU_FLUSH_UST_GRP20 : (Group 20 pm_flush1) SRQ unaligned store flushes
event:0X142 counters:2 um:zero minimum:1000 name:PM_FLUSH_IMBAL_GRP20 : (Group 20 pm_flush1) Flush caused by thread GCT imbalance
event:0X143 counters:3 um:zero minimum:1000 name:PM_DC_INV_L2_GRP20 : (Group 20 pm_flush1) L1 D cache entries invalidated from L2
event:0X144 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP20 : (Group 20 pm_flush1) Instructions completed
event:0X145 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP20 : (Group 20 pm_flush1) Run cycles

#Group 21 pm_flush2, Flushes due to scoreboard and sync
event:0X150 counters:0 um:zero minimum:1000 name:PM_ITLB_MISS_GRP21 : (Group 21 pm_flush2) Instruction TLB misses
event:0X151 counters:1 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP21 : (Group 21 pm_flush2) IOPS instructions completed
event:0X152 counters:2 um:zero minimum:1000 name:PM_FLUSH_SB_GRP21 : (Group 21 pm_flush2) Flush caused by scoreboard operation
event:0X153 counters:3 um:zero minimum:1000 name:PM_FLUSH_SYNC_GRP21 : (Group 21 pm_flush2) Flush caused by sync
event:0X154 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP21 : (Group 21 pm_flush2) Instructions completed
event:0X155 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP21 : (Group 21 pm_flush2) Run cycles

#Group 22 pm_lsu_flush_srq_lrq, LSU flush by SRQ and LRQ events
event:0X160 counters:0 um:zero minimum:1000 name:PM_LSU_FLUSH_SRQ_GRP22 : (Group 22 pm_lsu_flush_srq_lrq) SRQ flushes
event:0X161 counters:1 um:zero minimum:1000 name:PM_LSU_FLUSH_LRQ_GRP22 : (Group 22 pm_lsu_flush_srq_lrq) LRQ flushes
event:0X162 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP22 : (Group 22 pm_lsu_flush_srq_lrq) IOPS instructions completed
event:0X163 counters:3 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP22 : (Group 22 pm_lsu_flush_srq_lrq) Flush initiated by LSU
event:0X164 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP22 : (Group 22 pm_lsu_flush_srq_lrq) Instructions completed
event:0X165 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP22 : (Group 22 pm_lsu_flush_srq_lrq) Run cycles

#Group 23 pm_lsu_flush_lrq, LSU0/1 flush due to LRQ
event:0X170 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_LRQ_GRP23 : (Group 23 pm_lsu_flush_lrq) LSU0 LRQ flushes
event:0X171 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_LRQ_GRP23 : (Group 23 pm_lsu_flush_lrq) LSU1 LRQ flushes
event:0X172 counters:2 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP23 : (Group 23 pm_lsu_flush_lrq) Flush initiated by LSU
event:0X173 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP23 : (Group 23 pm_lsu_flush_lrq) IOPS instructions completed
event:0X174 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP23 : (Group 23 pm_lsu_flush_lrq) Instructions completed
event:0X175 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP23 : (Group 23 pm_lsu_flush_lrq) Run cycles

#Group 24 pm_lsu_flush_srq, LSU0/1 flush due to SRQ
event:0X180 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_SRQ_GRP24 : (Group 24 pm_lsu_flush_srq) LSU0 SRQ flushes
event:0X181 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_SRQ_GRP24 : (Group 24 pm_lsu_flush_srq) LSU1 SRQ flushes
event:0X182 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP24 : (Group 24 pm_lsu_flush_srq) IOPS instructions completed
event:0X183 counters:3 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP24 : (Group 24 pm_lsu_flush_srq) Flush initiated by LSU
event:0X184 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP24 : (Group 24 pm_lsu_flush_srq) Instructions completed
event:0X185 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP24 : (Group 24 pm_lsu_flush_srq) Run cycles

#Group 25 pm_lsu_flush_unaligned, LSU flush due to unaligned data
event:0X190 counters:0 um:zero minimum:1000 name:PM_LSU_FLUSH_ULD_GRP25 : (Group 25 pm_lsu_flush_unaligned) LRQ unaligned load flushes
event:0X191 counters:1 um:zero minimum:1000 name:PM_LSU_FLUSH_UST_GRP25 : (Group 25 pm_lsu_flush_unaligned) SRQ unaligned store flushes
event:0X192 counters:2 um:zero minimum:1000 name:PM_BR_ISSUED_GRP25 : (Group 25 pm_lsu_flush_unaligned) Branches issued
event:0X193 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP25 : (Group 25 pm_lsu_flush_unaligned) IOPS instructions completed
event:0X194 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP25 : (Group 25 pm_lsu_flush_unaligned) Instructions completed
event:0X195 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP25 : (Group 25 pm_lsu_flush_unaligned) Run cycles

#Group 26 pm_lsu_flush_uld, LSU0/1 flush due to unaligned load
event:0X1A0 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_ULD_GRP26 : (Group 26 pm_lsu_flush_uld) LSU0 unaligned load flushes
event:0X1A1 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_ULD_GRP26 : (Group 26 pm_lsu_flush_uld) LSU1 unaligned load flushes
event:0X1A2 counters:2 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP26 : (Group 26 pm_lsu_flush_uld) Flush initiated by LSU
event:0X1A3 counters:3 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP26 : (Group 26 pm_lsu_flush_uld) IOPS instructions completed
event:0X1A4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP26 : (Group 26 pm_lsu_flush_uld) Instructions completed
event:0X1A5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP26 : (Group 26 pm_lsu_flush_uld) Run cycles

#Group 27 pm_lsu_flush_ust, LSU0/1 flush due to unaligned store
event:0X1B0 counters:0 um:zero minimum:1000 name:PM_LSU0_FLUSH_UST_GRP27 : (Group 27 pm_lsu_flush_ust) LSU0 unaligned store flushes
event:0X1B1 counters:1 um:zero minimum:1000 name:PM_LSU1_FLUSH_UST_GRP27 : (Group 27 pm_lsu_flush_ust) LSU1 unaligned store flushes
event:0X1B2 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP27 : (Group 27 pm_lsu_flush_ust) IOPS instructions completed
event:0X1B3 counters:3 um:zero minimum:1000 name:PM_LSU_FLUSH_GRP27 : (Group 27 pm_lsu_flush_ust) Flush initiated by LSU
event:0X1B4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP27 : (Group 27 pm_lsu_flush_ust) Instructions completed
event:0X1B5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP27 : (Group 27 pm_lsu_flush_ust) Run cycles

#Group 28 pm_lsu_flush_full, LSU flush due to LRQ/SRQ full
event:0X1C0 counters:0 um:zero minimum:1000 name:PM_LSU_FLUSH_LRQ_FULL_GRP28 : (Group 28 pm_lsu_flush_full) Flush caused by LRQ full
event:0X1C1 counters:1 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP28 : (Group 28 pm_lsu_flush_full) IOPS instructions completed
event:0X1C2 counters:2 um:zero minimum:1000 name:PM_MRK_LSU_FLUSH_LRQ_GRP28 : (Group 28 pm_lsu_flush_full) Marked LRQ flushes
event:0X1C3 counters:3 um:zero minimum:1000 name:PM_LSU_FLUSH_SRQ_FULL_GRP28 : (Group 28 pm_lsu_flush_full) Flush caused by SRQ full
event:0X1C4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP28 : (Group 28 pm_lsu_flush_full) Instructions completed
event:0X1C5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP28 : (Group 28 pm_lsu_flush_full) Run cycles

#Group 29 pm_lsu_stall1, LSU Stalls
event:0X1D0 counters:0 um:zero minimum:1000 name:PM_GRP_MRK_GRP29 : (Group 29 pm_lsu_stall1) Group marked in IDU
event:0X1D1 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_LSU_GRP29 : (Group 29 pm_lsu_stall1) Completion stall caused by LSU instruction
event:0X1D2 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP29 : (Group 29 pm_lsu_stall1) IOPS instructions completed
event:0X1D3 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_REJECT_GRP29 : (Group 29 pm_lsu_stall1) Completion stall caused by reject
event:0X1D4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP29 : (Group 29 pm_lsu_stall1) Instructions completed
event:0X1D5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP29 : (Group 29 pm_lsu_stall1) Run cycles

#Group 30 pm_lsu_stall2, LSU Stalls
event:0X1E0 counters:0 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP30 : (Group 30 pm_lsu_stall2) IOPS instructions completed
event:0X1E1 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_DCACHE_MISS_GRP30 : (Group 30 pm_lsu_stall2) Completion stall caused by D cache miss
event:0X1E2 counters:2 um:zero minimum:10000 name:PM_CYC_GRP30 : (Group 30 pm_lsu_stall2) Processor cycles
event:0X1E3 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_ERAT_MISS_GRP30 : (Group 30 pm_lsu_stall2) Completion stall caused by ERAT miss
event:0X1E4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP30 : (Group 30 pm_lsu_stall2) Instructions completed
event:0X1E5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP30 : (Group 30 pm_lsu_stall2) Run cycles

#Group 31 pm_fxu_stall, FXU Stalls
event:0X1F0 counters:0 um:zero minimum:1000 name:PM_GRP_IC_MISS_BR_REDIR_NONSPEC_GRP31 : (Group 31 pm_fxu_stall) Group experienced non-speculative I cache miss or branch redirect
event:0X1F1 counters:1 um:zero minimum:1000 name:PM_CMPLU_STALL_FXU_GRP31 : (Group 31 pm_fxu_stall) Completion stall caused by FXU instruction
event:0X1F2 counters:2 um:zero minimum:1000 name:PM_IOPS_CMPL_GRP31 : (Group 31 pm_fxu_stall) IOPS instructions completed
event:0X1F3 counters:3 um:zero minimum:1000 name:PM_CMPLU_STALL_DIV_GRP31 : (Group 31 pm_fxu_stall) Completion stall caused by DIV instruction
event:0X1F4 counters:4 um:zero minimum:10000 name:PM_INST_CMPL_GRP31 : (Group 31 pm_fxu_stall) Instructions completed
event:0X1F5 counters:5 um:zero minimum:10000 name:PM_RUN_CYC_GRP31 : (Group 31 pm_fxu_stall) Run cycles