smallcore.tan.summary

周立功公司的SOPC源代码

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 7.927 ns
From           : D[7]
To             : nios2e_1C6:inst|vga:the_vga|vga_avalon_interface:the_vga_avalon_interface|vga_logic:u1|sram_if:sram_if|rd_data_r[7]
From Clock     : 
To Clock       : SYS_CLK0
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 13.026 ns
From           : nios2e_1C6:inst|vga:the_vga|vga_avalon_interface:the_vga_avalon_interface|vga_logic:u1|fifo:fifo|dcfifo:dcfifo_component|dcfifo_rt21:auto_generated|alt_sync_fifo_idm:sync_fifo|dpram_fcr:dpram4|altsyncram_0cc1:altsyncram14|ram_block15a7~portb_address_reg6
To             : VGA_RGB[1]
From Clock     : SYS_CLK0
To Clock       : 
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 2.124 ns
From           : altera_internal_jtag~TDO
To             : altera_reserved_tdo
From Clock     : 
To Clock       : 
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 1.747 ns
From           : altera_internal_jtag~TDIUTAP
To             : nios2e_1C6:inst|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|wdata[7]
From Clock     : 
To Clock       : altera_internal_jtag~TCKUTAP
Failed Paths   : 0

Type           : Clock Setup: 'VGA_PLL:inst3|altpll:altpll_component|_clk0'
Slack          : 2.189 ns
Required Time  : 100.01 MHz ( period = 9.999 ns )
Actual Time    : 128.04 MHz ( period = 7.810 ns )
From           : nios2e_1C6:inst|vga:the_vga|vga_avalon_interface:the_vga_avalon_interface|vga_logic:u1|ico_module:ico_module|x_inc_r[6]
To             : nios2e_1C6:inst|vga:the_vga|vga_avalon_interface:the_vga_avalon_interface|vga_logic:u1|ico_module:ico_module|ico_rd_addr_r[5]
From Clock     : VGA_PLL:inst3|altpll:altpll_component|_clk0
To Clock       : VGA_PLL:inst3|altpll:altpll_component|_clk0
Failed Paths   : 0

Type           : Clock Setup: 'pll:inst1|altpll:altpll_component|_clk0'
Slack          : 6.738 ns
Required Time  : 48.00 MHz ( period = 20.833 ns )
Actual Time    : 70.95 MHz ( period = 14.095 ns )
From           : nios2e_1C6:inst|cpu:the_cpu|i_read
To             : nios2e_1C6:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_debug:the_cpu_nios2_oci_debug|monitor_go
From Clock     : pll:inst1|altpll:altpll_component|_clk0
To Clock       : pll:inst1|altpll:altpll_component|_clk0
Failed Paths   : 0

Type           : Clock Setup: 'VGA_PLL:inst3|altpll:altpll_component|_clk1'
Slack          : 9.085 ns
Required Time  : 25.00 MHz ( period = 39.999 ns )
Actual Time    : N/A
From           : nios2e_1C6:inst|vga:the_vga|vga_avalon_interface:the_vga_avalon_interface|vga_logic:u1|fifo:fifo|dcfifo:dcfifo_component|dcfifo_rt21:auto_generated|alt_sync_fifo_idm:sync_fifo|dffe7a[5]
To             : nios2e_1C6:inst|vga:the_vga|vga_avalon_interface:the_vga_avalon_interface|vga_logic:u1|fifo:fifo|dcfifo:dcfifo_component|dcfifo_rt21:auto_generated|alt_sync_fifo_idm:sync_fifo|dffe8a[5]
From Clock     : VGA_PLL:inst3|altpll:altpll_component|_clk0
To Clock       : VGA_PLL:inst3|altpll:altpll_component|_clk1
Failed Paths   : 0

Type           : Clock Setup: 'SYS_CLK2'
Slack          : 16.062 ns
Required Time  : 48.00 MHz ( period = 20.833 ns )
Actual Time    : 209.60 MHz ( period = 4.771 ns )
From           : delay_reset_block:inst6|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[0]
To             : delay_reset_block:inst6|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[0]
From Clock     : SYS_CLK2
To Clock       : SYS_CLK2
Failed Paths   : 0

Type           : Clock Setup: 'altera_internal_jtag~TCKUTAP'
Slack          : N/A
Required Time  : None
Actual Time    : 104.20 MHz ( period = 9.597 ns )
From           : sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]
To             : nios2e_1C6:inst|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|sr[17]
From Clock     : altera_internal_jtag~TCKUTAP
To Clock       : altera_internal_jtag~TCKUTAP
Failed Paths   : 0

Type           : Clock Hold: 'pll:inst1|altpll:altpll_component|_clk0'
Slack          : 0.822 ns
Required Time  : 48.00 MHz ( period = 20.833 ns )
Actual Time    : N/A
From           : nios2e_1C6:inst|cpu:the_cpu|ic_fill_dp_offset[1]
To             : nios2e_1C6:inst|cpu:the_cpu|ic_fill_dp_offset[1]
From Clock     : pll:inst1|altpll:altpll_component|_clk0
To Clock       : pll:inst1|altpll:altpll_component|_clk0
Failed Paths   : 0

Type           : Clock Hold: 'VGA_PLL:inst3|altpll:altpll_component|_clk1'
Slack          : 0.861 ns
Required Time  : 25.00 MHz ( period = 39.999 ns )
Actual Time    : N/A
From           : nios2e_1C6:inst|vga:the_vga|vga_avalon_interface:the_vga_avalon_interface|vga_logic:u1|fifo:fifo|dcfifo:dcfifo_component|dcfifo_rt21:auto_generated|alt_sync_fifo_idm:sync_fifo|dffe7a[4]
To             : nios2e_1C6:inst|vga:the_vga|vga_avalon_interface:the_vga_avalon_interface|vga_logic:u1|fifo:fifo|dcfifo:dcfifo_component|dcfifo_rt21:auto_generated|alt_sync_fifo_idm:sync_fifo|dffe8a[4]
From Clock     : VGA_PLL:inst3|altpll:altpll_component|_clk0
To Clock       : VGA_PLL:inst3|altpll:altpll_component|_clk1
Failed Paths   : 0

Type           : Clock Hold: 'VGA_PLL:inst3|altpll:altpll_component|_clk0'
Slack          : 0.881 ns
Required Time  : 100.01 MHz ( period = 9.999 ns )
Actual Time    : N/A
From           : nios2e_1C6:inst|vga:the_vga|vga_avalon_interface:the_vga_avalon_interface|vga_logic:u1|fifo:fifo|dcfifo:dcfifo_component|dcfifo_rt21:auto_generated|alt_sync_fifo_idm:sync_fifo|dffe5a[2]
To             : nios2e_1C6:inst|vga:the_vga|vga_avalon_interface:the_vga_avalon_interface|vga_logic:u1|fifo:fifo|dcfifo:dcfifo_component|dcfifo_rt21:auto_generated|alt_sync_fifo_idm:sync_fifo|dffe9a[2]
From Clock     : VGA_PLL:inst3|altpll:altpll_component|_clk1
To Clock       : VGA_PLL:inst3|altpll:altpll_component|_clk0
Failed Paths   : 0

Type           : Clock Hold: 'SYS_CLK2'
Slack          : 1.321 ns
Required Time  : 48.00 MHz ( period = 20.833 ns )
Actual Time    : N/A
From           : delay_reset_block:inst6|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[9]
To             : delay_reset_block:inst6|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[9]
From Clock     : SYS_CLK2
To Clock       : SYS_CLK2
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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