main.c

基于dsp 5509a关于EMAC通信的测试

#include <csl.h>
#include <csl_emifa.h>
#include <csl_i2c.h>
#include <csl_gpio.h>
#include <csl_irq.h>
#include <csl_chip.h>
#include <csl_dat.h>
#include "Ethernet\netsocket.h"

SOCKET              m_hSocket;


void     RcvFromNet();
Uint8    Data[100];


TIMER_Handle hTimer1;
Uint16 eventId1;

static EMIFA_Config Seeddm642ConfigA = 
{
	EMIFA_GBLCTL_RMK
	(
		EMIFA_GBLCTL_EK2RATE_FULLCLK,//X EMIF input clock
		EMIFA_GBLCTL_EK2HZ_CLK,		//eclkout2 continue output during hold
		EMIFA_GBLCTL_EK2EN_ENABLE,	//eclkout2 enable output
		EMIFA_GBLCTL_BRMODE_MRSTATUS,	//bus request is memory access or refresh pending/in progress
		EMIFA_GBLCTL_NOHOLD_DISABLE,
		EMIFA_GBLCTL_EK1HZ_CLK,		//eclkout1 continue output during hold
		EMIFA_GBLCTL_EK1EN_ENABLE,	//eclkout1 enable output
		EMIFA_GBLCTL_CLK4EN_ENABLE,	//clkout4 output enable
		EMIFA_GBLCTL_CLK6EN_ENABLE	//clkout6 output enable
	),
	0xffffffd3,		//64BIT SDRAM
//	0xffffff33,		//32BIT SDRAM
//	0xffffff93,		//16bit SDRAM
//	0xffffff83,		//8bit SDRAM
	0xffffff02,
	0x22a28a22,
	0x22a28a22,
	EMIFA_SDCTL_RMK
	(
		EMIFA_SDCTL_SDBSZ_4BANKS,	//SDRAM bank size 4 banks
		EMIFA_SDCTL_SDRSZ_12ROW,	//row number = 12
		EMIFA_SDCTL_SDCSZ_8COL,		//column number = 8
		EMIFA_SDCTL_RFEN_ENABLE,	//SDRAM refresh enable
		//EMIFA_SDCTL_INIT_NO,		//SDRAM 配置完每个CE空间后，不初始化
		EMIFA_SDCTL_INIT_YES,		//SDRAM 配置完每个CE空间后，初始化
		EMIFA_SDCTL_TRCD_OF(2),		//TRCD = (Trcd / Tcyc) - 1
		EMIFA_SDCTL_TRP_OF(2),		//TRP = (Trp / Tcyc) - 1
		EMIFA_SDCTL_TRC_OF(8),
		EMIFA_SDCTL_SLFRFR_DISABLE	//self refresh mode disable
	),
	EMIFA_SDTIM_RMK
	(
		EMIFA_SDTIM_XRFR_DEFAULT,	//EXT TIMER default
		EMIFA_SDTIM_PERIOD_OF(2083)	//refresh period,clockout1 = 10ns
	),
	EMIFA_SDEXT_RMK
	(
		EMIFA_SDEXT_WR2RD_OF(0),	//cycles between write to read command = 1,subtract 1 is 0
		EMIFA_SDEXT_WR2DEAC_OF(1),	//cycles between write to precharge = 2
		EMIFA_SDEXT_WR2WR_OF(1),	//cycles between write to write = 2
		EMIFA_SDEXT_R2WDQM_OF(1),	//cycles between read to bex = 2
		EMIFA_SDEXT_RD2WR_OF(0),	//cycles between read to write = 1
		EMIFA_SDEXT_RD2DEAC_OF(1),	//
		EMIFA_SDEXT_RD2RD_OF(0),	//
		EMIFA_SDEXT_THZP_OF(2),		//Troh = 3 cycle
		EMIFA_SDEXT_TWR_OF(1),		//Twr = 1 clock +6 ns
		EMIFA_SDEXT_TRRD_OF(0),		//Trrd = 12ns
		EMIFA_SDEXT_TRAS_OF(5),		//Tras = 42ns
		EMIFA_SDEXT_TCL_OF(1)		//cas latency = 3 clock
	),
	0x00000002,
	0x00000002,
	0x00000002,
	0x00000002
};

TIMER_Config timerCfg1 = {
    TIMER_FMKS(CTL, INVINP, NO)             |
    TIMER_FMKS(CTL, CLKSRC, CPUOVR8)        |
    TIMER_FMKS(CTL, CP, PULSE)              |
    TIMER_FMKS(CTL, HLD, YES)               |
    TIMER_FMKS(CTL, GO, NO)                 |
    TIMER_FMKS(CTL, PWID, ONE)              |
    TIMER_FMKS(CTL, DATOUT, 0)              |
    TIMER_FMKS(CTL, INVOUT, NO)             |
    TIMER_FMKS(CTL, FUNC, TOUT),
    
    TIMER_FMKS(PRD, PRD, OF(750000)),
    TIMER_FMKS(CNT, CNT, OF(0))
};

CHIP_Config SEEDDM642percfg = {          //配置DSP工作环境，使能VP口，使能I2C模块 
	CHIP_VP2+\
	CHIP_VP1+\
	CHIP_VP0+\
	CHIP_I2C
};

void InitTimer()
{
    /* Open the timer */
    hTimer1 = TIMER_open(TIMER_DEV1, TIMER_OPEN_RESET);
    /* Configure the timer in one-shot mode */
    TIMER_config(hTimer1, &timerCfg1);
    /* Get Event Id associated with Timer 1, for use with */
    /* CSL interrupt enable functions.                    */         
    eventId1 = TIMER_getEventId(hTimer1);
    
    /* Map the logical event to a physical interrupt */
    IRQ_map(eventId1, 15);
	/* Clear any pending Timer interrupts */
    IRQ_reset(eventId1);
	/* Enable timer interrupt */
    IRQ_enable(eventId1);
}
void main()
{
	int          i;
	Uint32       LocalIP=0xc0a80128;     //192.168.1.40	
    struct sockaddr_in  mSocketAddr;
    
    CSL_init();
    //UartInit(1);
	/*EMIFA的初始化，将CE0设为SDRAM空间，CE1设为异步空间
	 注，DM642支持的是EMIFA，而非EMIF*/
	EMIFA_config(&Seeddm642ConfigA);

    net_init(LocalIP);
    InitTimer();
    
    tftp_init();
    m_hSocket=socket(AF_INET, SOCK_STREAM, TCP);
    
    mSocketAddr.sin_family=AF_INET;
    mSocketAddr.sin_addr.s_addr = INADDR_ANY; 
    mSocketAddr.sin_port=8000; 
    
    bind(m_hSocket,&mSocketAddr,sizeof(mSocketAddr));
    listen(m_hSocket,0);
    MsgAsyncSelect(m_hSocket,FD_READ,&RcvFromNet);
    TIMER_start(hTimer1);
    
	for(i=0;i<100;i++)
	{
	   Data[i]=i;
	}
	
	
	//puts("Net Test\n");
	
	while(1)
	{	
		i =0 ;   
	}
		
}

void RcvFromNet()
{   
    int     i;
    int     Len;
    int     BufLen;
    struct sockaddr_in  ClientAddr;
    
    i=recvfrom(m_hSocket, (char *)Data, 100, 0, \
                &ClientAddr,&BufLen);
                
    if(i!=-1)
    {
      	i=-1;
	    while(i==-1)
	    {
	        i=sendto (m_hSocket,Data,BufLen,0,&ClientAddr, \
	                  sizeof(ClientAddr));
	    }   
    }
    
}