dm642main.c

基于DM642

#include <csl.h>
//#include <DSP_autocor.h>
#include <csl_emifa.h>
#include <csl_i2c.h>
#include <csl_gpio.h>
#include <csl_irq.h>
#include <csl_chip.h>
#include <csl_dat.h>
#include "iic.h"
#include "vportcap.h"
#include "vportdis.h"
//#include "sa7121h.h"
#include "SAA7113H.h"				//视频解码芯片
//#include "TVP51xx.h"

extern EDMA_Handle hEdmaVPCapChaAY;
extern	EDMA_Handle hEdmaVPCapChaACb;
extern	EDMA_Handle hEdmaVPCapChaACr;

/*emifa设置结构*/
static EMIFA_Config Seeddm642ConfigA = 
{
	EMIFA_GBLCTL_RMK
	(
		EMIFA_GBLCTL_EK2RATE_FULLCLK,//X EMIF input clock
		EMIFA_GBLCTL_EK2HZ_CLK,		//eclkout2 continue output during hold
		EMIFA_GBLCTL_EK2EN_ENABLE,	//eclkout2 enable output
		EMIFA_GBLCTL_BRMODE_MRSTATUS,	//bus request is memory access or refresh pending/in progress
		EMIFA_GBLCTL_NOHOLD_DISABLE,
		EMIFA_GBLCTL_EK1HZ_CLK,		//eclkout1 continue output during hold
		EMIFA_GBLCTL_EK1EN_ENABLE,	//eclkout1 enable output
		EMIFA_GBLCTL_CLK4EN_ENABLE,	//clkout4 output enable
		EMIFA_GBLCTL_CLK6EN_ENABLE	//clkout6 output enable
	),
	0xffffffd3,		//64BIT SDRAM
//	0xffffff33,		//32BIT SDRAM
//	0xffffff93,		//16bit SDRAM
//	0xffffff83,		//8bit SDRAM
	0xffffff02,
	0x22a28a22,
	0x22a28a22,
	EMIFA_SDCTL_RMK
	(
		EMIFA_SDCTL_SDBSZ_4BANKS,	//SDRAM bank size 4 banks
		EMIFA_SDCTL_SDRSZ_12ROW,	//row number = 12
		EMIFA_SDCTL_SDCSZ_8COL,		//column number = 8
		EMIFA_SDCTL_RFEN_ENABLE,	//SDRAM refresh enable
		//EMIFA_SDCTL_INIT_NO,		//SDRAM 配置完每个CE空间后，不初始化
		EMIFA_SDCTL_INIT_YES,		//SDRAM 配置完每个CE空间后，初始化
		EMIFA_SDCTL_TRCD_OF(2),		//TRCD = (Trcd / Tcyc) - 1
		EMIFA_SDCTL_TRP_OF(2),		//TRP = (Trp / Tcyc) - 1
		EMIFA_SDCTL_TRC_OF(8),
		EMIFA_SDCTL_SLFRFR_DISABLE	//self refresh mode disable
	),
	EMIFA_SDTIM_RMK
	(
		EMIFA_SDTIM_XRFR_DEFAULT,	//EXT TIMER default
		EMIFA_SDTIM_PERIOD_OF(2083)	//refresh period,clockout1 = 10ns
	),
	EMIFA_SDEXT_RMK
	(
		EMIFA_SDEXT_WR2RD_OF(0),	//cycles between write to read command = 1,subtract 1 is 0
		EMIFA_SDEXT_WR2DEAC_OF(1),	//cycles between write to precharge = 2
		EMIFA_SDEXT_WR2WR_OF(1),	//cycles between write to write = 2
		EMIFA_SDEXT_R2WDQM_OF(1),	//cycles between read to bex = 2
		EMIFA_SDEXT_RD2WR_OF(0),	//cycles between read to write = 1
		EMIFA_SDEXT_RD2DEAC_OF(1),	//
		EMIFA_SDEXT_RD2RD_OF(0),	//
		EMIFA_SDEXT_THZP_OF(2),		//Troh = 3 cycle
		EMIFA_SDEXT_TWR_OF(1),		//Twr = 1 clock +6 ns
		EMIFA_SDEXT_TRRD_OF(0),		//Trrd = 12ns
		EMIFA_SDEXT_TRAS_OF(5),		//Tras = 42ns
		EMIFA_SDEXT_TCL_OF(1)		//cas latency = 3 clock
	),
	0x00000002,
	0x00000002,
	0x00000002,
	0x00000002
};

/*SEEDDM642的IIC的设置结构*/
I2C_Config SEEDDM642IIC_Config = {
    0,  /* master mode,  i2coar;采用主模式   */
    0,  /* no interrupt, i2cimr;只写，不读，采用无中断方式*/
    (20-5), /* scl low time, i2cclkl;  */
    (20-5), /* scl high time,i2cclkh;  */
    1,  /* configure later, i2ccnt;*/
    0,  /* configure later, i2csar;*/
    0x4ea0, /* master tx mode,     */
            /* i2c runs free,      */
            /* 8-bit data + NACK   */
            /* no repeat mode      */
    (37-1), /* 4MHz clock, i2cpsc  */
};



CHIP_Config SEEDDM642percfg = {          //配置DSP工作环境，使能VP口，使能I2C模块 
	CHIP_VP2+\
	CHIP_VP1+\
	CHIP_VP0+\
	CHIP_I2C
};

I2C_Handle hSeeddm642i2c;
int portNumber;
int portNumber1;
int portNumber2;

/*图像句柄的声明*/
VP_Handle vpHchannel0;
VP_Handle vpHchannel1;
VP_Handle vpHchannel2;

/*确定图像的参数*/
int numPixels = 720;//720;//每行720个像素
int numLines  = 288;//576;//每帧576行（PAL）
/*采集与存储缓冲区的首址*/
Uint32 capYbuffer  = 0x80000000;
Uint32 capCbbuffer =0x800675c0;//0x80033ae0;
Uint32 capCrbuffer = 0x8009b0a0;//0x8004d850;//
//Uint32 capCbbuffer = 0x6190;  
//Uint32 capCrbuffer = 0x6190;

Uint32 desYbuffer  = 0x80100000;	//EDMA搬移的目的地址
Uint32 desCbbuffer = 0x801675c0; 
Uint32 desCrbuffer = 0x8019b0a0;


Uint32 disYbuffer1  = 0x80200000;
Uint32 disCbbuffer1 = 0x802675c0; 
Uint32 disCrbuffer1 = 0x8029b0a0;

Uint32 disYbuffer2  = 0x80300000;
Uint32 disCbbuffer2 = 0x803675c0; 
Uint32 disCrbuffer2 = 0x8039b0a0;


Uint32 disYbuffer3  = 0x80400000;
Uint32 disCbbuffer3 = 0x804675c0; 
Uint32 disCrbuffer3 = 0x8049b0a0;
/*图像格式标志*/
Uint8 NTSCorPAL = 0;
extern far void vectors();
/*图像采集完成标志*/
extern volatile Uint32 capNewFrame;//u4采集完成标志，在VP口采集完成中断程序中置一，
                                   //表示当前图像已经采集完成，下同。
extern volatile Uint32 capNewFrame1;//u2采集完成标志
extern volatile Uint32 capNewFrame2;//u7采集完成标志
extern volatile Uint32 capNewFrame3;//u9采集完成标志
extern volatile Uint32 disNewFrame;
/*EDMA打开标志与VP2口的A，B通道判断标志*/
extern volatile Uint8 ED;
extern volatile Uint8 WV;

/*此程序可将四个采集口的数据经过Video Port0送出*/
void main()
{
	int fcnt=0;
	Uint8 addrI2C;
	int i,j = 0;
	Uint8 vFromat,vFromat1;
	Uint32 vc_stat0,vc_ctl0;
	//Uint8 lineTMP0,lineTMP1;
	Uint16 YPOS = 0,XPOS = 0;
	Uint16 maxYPOS = 0,maxXPOS = 0;
	Uint8 tmpFILED;
/*-------------------------------------------------------*/
/* perform all initializations                           */
/*-------------------------------------------------------*/
	/*Initialise CSL，初始化CSL库*/
	CSL_init();
	CHIP_config(&SEEDDM642percfg);
/*----------------------------------------------------------*/
	/*EMIFA的初始化，将CE0设为SDRAM空间，CE1设为异步空间
	 注，DM642支持的是EMIFA，而非EMIF*/
	EMIFA_config(&Seeddm642ConfigA);
/*----------------------------------------------------------*/
	/*中断向量表的初始化*/
	//Point to the IRQ vector table
    IRQ_setVecs(vectors);
    IRQ_nmiEnable();
    IRQ_globalEnable();
    IRQ_map(IRQ_EVT_VINT1, 11);//即将VP1通道中断对应为CPU中断11.
    IRQ_map(IRQ_EVT_VINT0, 10);//即将VP0通道中断对应为CPU中断10.
    //IRQ_map(IRQ_EVT_VINT2, 12);//即将VP2通道中断对应为CPU中断12.
    IRQ_reset(IRQ_EVT_VINT0);
    IRQ_reset(IRQ_EVT_VINT1);
    /*打开一个数据拷贝的数据通路*/
    DAT_open(DAT_CHAANY, DAT_PRI_LOW, DAT_OPEN_2D);			//dma或edma;DAT_OPEN_2D is for 2d copies
/*----------------------------------------------------------*/	
	/*进行IIC的初始化*/
	hSeeddm642i2c = I2C_open(I2C_PORT0,I2C_OPEN_RESET);
	I2C_config(hSeeddm642i2c,&SEEDDM642IIC_Config);
/*----------------------------------------------------------*/
/*初始化saa7113h    *///PAL制式
	addrI2C = 0x48>>1;	//for U33,RTS0 strapped to gnd via a 10k resistor				      
	_IIC_read(hSeeddm642i2c, addrI2C,0x00, &vFromat);
	_IIC_read(hSeeddm642i2c, addrI2C,0x41, &vFromat);
	_IIC_read(hSeeddm642i2c, addrI2C,0x45, &vFromat);
	_IIC_read(hSeeddm642i2c, addrI2C,0x1f, &vFromat);
	for(i = 0x41;i<0x58;i++)		//默认值
		{
			_IIC_write(hSeeddm642i2c, 
					   addrI2C,
					   i, 
					   0xff);
		}
	for(i =0; i<28; i++)			//剩余的寄存器配置成默认值
	{
		
			_IIC_write(hSeeddm642i2c, 
					   addrI2C,
					   (SAA7113H[i].regsubaddr), 
					   (SAA7113H[i].regvule));
			
	}

	
    EVMDM642_waitusec(100);
    
    _IIC_read(hSeeddm642i2c, addrI2C,0x1f, &vFromat);
	_IIC_read(hSeeddm642i2c, addrI2C,0x60, &vFromat1);

/*************************************/
while(fcnt<10)
{
	EMIFA_config(&Seeddm642ConfigA);
/*----------------------------------------------------------*/	
	/*初始化Video Port*/
	/*将Vedio Port设为采集输入，以下初始化顺序依次为u4通道，u2通道，u7通道，u9通道*/
	portNumber = 0;
	vpHchannel0 = bt656_8bit_ncfc(portNumber);//打开一个VP口，进行采集，
	                                          //并配置相应DMA通道，函数体详见vportcap.c中子函数
	//bt656_capture_start(vpHchannel0);
	/*等待第一帧数据采集完成*/
	while(capNewFrame == 0){
		//EVMDM642_waitusec(40000);
		/* set VCEN bit to enable capture，使能VCA口 */
		//VP_FSETH(vpHchannel0, VCACTL, VCEN, VP_VCACTL_VCEN_DISABLE);
		/* clear BLKCAP in VCA_CTL to enable capture DMA events */
		//VP_FSETH(vpHchannel0, VCACTL, BLKCAP,VP_VCACTL_BLKCAP_BLOCK);
		
		/* set VCEN bit to enable capture，使能VCA口 */
	//	VP_FSETH(vpHchannel0, VCACTL, VCEN, VP_VCACTL_VCEN_ENABLE);
		/* clear BLKCAP in VCA_CTL to enable capture DMA events */
	//	VP_FSETH(vpHchannel0, VCACTL, BLKCAP,VP_VCACTL_BLKCAP_CLEAR);
		vc_stat0 = VP_RGET(VCASTAT0);

		vc_ctl0 = VP_RGET(VCACTL0);
		YPOS = (vc_stat0 & 0x0fff0000)>>16;
		XPOS = (vc_stat0 & 0x0fff);
	//	XPOS = (VP_RGET(VCASTAT0) & 0x0fff) ;
		if(YPOS>maxYPOS) maxYPOS = YPOS;
		if(XPOS>maxXPOS)maxXPOS = XPOS;
		tmpFILED = (vc_stat0 & 0x1000)>>12;
	
	}
	capNewFrame =0;
	
		vc_stat0 = VP_RGET(VCASTAT0);
		vc_ctl0 = VP_RGET(VCACTL0);
		YPOS = (vc_stat0 & 0x0fff0000)>>16;
		XPOS = (vc_stat0 & 0x0fff);
	//	XPOS = (VP_RGET(VCASTAT0) & 0x0fff) ;
		if(YPOS>maxYPOS) maxYPOS = YPOS;
		if(XPOS>maxXPOS)maxXPOS = XPOS;
		tmpFILED = (vc_stat0 & 0x1000)>>12;
	
	VP_close(vpHchannel0);//采集完成，关闭VP口
	
	j =0;
	for(i=0x80100000;i<0x80200000;i++)		//initial the destination address's content
		{
			*(Uint32 *)i = 0;
		}
	for(i=0;i<numLines;i++)								//nunlines=288;numpixels=720
		{
		/*传送Y缓冲区*/									//y:cb:cr=4:2:2;
		DAT_copy((void *)(capYbuffer + i * numPixels), 	//dat_copy(src,des,bytecnt),edma
	             (void *)(desYbuffer + j * numPixels),
	             numPixels);
		DAT_copy((void *)(capYbuffer + (i +numLines)* numPixels), 
	             (void *)(desYbuffer +( j +1)* numPixels),	//y为720*576
	             numPixels);								//奇偶场合并。偶场后接着放奇场。
		
	    /*传送Cb缓冲区*/
	    	DAT_copy((void *)(capCbbuffer + (i +(numLines)) * (numPixels >> 1)), 
	             (void *)(desCbbuffer + j * (numPixels >> 1)),
	             numPixels>>1);
		DAT_copy((void *)(capCbbuffer + i * (numPixels >> 1)), 
	             (void *)(desCbbuffer + (j+1) * (numPixels >> 1)),
	             numPixels>>1);								//cb先放奇场；cb为360*576；
		
		/*传送Cr缓冲区*/
	    	DAT_copy((void *)(capCrbuffer + (i +(numLines))* (numPixels >> 1)), 
	             (void *)(desCrbuffer + j * (numPixels >> 1)),
	             numPixels>>1);
		DAT_copy((void *)(capCrbuffer + i * (numPixels >> 1)), 
	             (void *)(desCrbuffer + (j+1) * (numPixels >> 1)),
	             numPixels>>1);								//the same with cb;
		
		j = j+2;
	 }
	 fcnt++;
	 EDMA_close(hEdmaVPCapChaAY);		//make up for extern declare
	 EDMA_close(hEdmaVPCapChaACb);
	 EDMA_close(hEdmaVPCapChaACr);

	 };
while(1);		//改动这里。使其在第一帧采集完毕后，重新采集，肯定不是最优
}